Write Control word, read status word Unidrive SP

All,
I have a cRIO-9024 with an NI 9853 and I'm trying to configure and control an Emerson Unidrive SP using CAN port 0. I have the Indsutrial Communication for CANOpen 1.0.1 driver installed (on PC and cRIO) and I've been able to successfully read certain registers on the drive using SDOs.
I'm still confused as to the configuration and use of SDOs and PDOs (learning a lot, though), but what I want to do at the moment is be able to write to the drive control word (parameter 1.42) and read the status word (parameter 10.40). I have been doing a LOT of digging through manuals and LV CANOpen examples, and I think that the addresses that I need to use for these two values are 0x2001, sub-index 2A for the control word and 0x200A, sub-index 28 for the status word.
I've had no luck in running the CANopencRIOPDODemo VI (from the cRIOCANopenbasic example project), it causes a CANopen module error and kicks the cRIO offline, I end up having to reboot it to restore communication between it and my laptop.
At any rate, any light anyone can shed on this particular issue, as well as configuring and using SDOs/PDOs in general would be GREATLY appreciated.
Thanks!

I can't find the page at the moment. I've been through so many of them it may just be that I'm thinking of the fact that a few places (this one, for instance: http://zone.ni.com/devzone/cda/epd/p/id/5474) state that the 9853 works with CANopen. Now, it indeed does work with CANopen, but it's not a CANopen module, it's a CAN module. The way it works (specifically with FPGA) is to simply use two FPGA I/O nodes (1 read, 1 write) with the default NI CAN frame array of 6 U32 controls. This leads one to the LabVIEW CANopen library, which doesn't work with my cRIO for some reason (confrmed by Richard Van De Graaf at NI). I then ended up attempting to use the Ind. Com. driver, which only supports true CANopen modules like the 9881.
At this point I've removed all the references to CAN1 from my FPGA VI and I'm having some degree of success. The engineers at NI I've spoken with (Larry Hawkins most recently, and someone named Julianne, through Larry) feel that somehow my network or node is seeing the presense of the two CAN ports as two masters. I've no idea how this is possible as I never once have called CAN1, only CAN0. I/O nodes connected to CAN1 existed in my FPGA VI existed, and that's it.
There's really no point in me uploading the latest version of my FPGA VI (sorry you couldn't view it, no idea what happened there), as I've changed it back to the same structure as that of the FPGA VI in the CANopen Basics for cRIO example project. I just gave the controls and indicators descriptive names.
I can now only successfully read index 0x1009, which is the manufacturer hardware version register. I was able to read 0x1008 and 0x100A, but now they just give me back ASCII gibberish. Not sure why, especially since 0x1009 works. I suspect that it's drive-specific.
The other issue I'm having now is that as soon as I powered the system up this morning, I tried to read 0x1009 and right after the WriteSDO VI wrote the frame to initiate the SDO upload protocol, the following SDO Read kept returning an ID value of 0x701, which is a response to a Node Guard status request. This puzzled me because I don't have any code that requests that status. I hacked in a couple of calls to the NMT VI to stop the node, reset it, the set it to the pre-operational state again. This has cleared the 0x701 response issue, but now only the first read I try to do (I'm just testing SDO reads and writes right now) returns any data to my top-level RT VI. If I stop it and read a different index, I'll get the expected response, but only that one, the others still won't return data.
I can post my code a bit later if you like, I'm going to go see if any of the default values in the drive have changed somehow.
Thanks!

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FPGA Read/Write Control Issues

Hello all! Rather new to using FPGA, but I have an interesting issue that's popping up.
Currently pulling in RAW voltage data from a set of sensors (Pressure Transducers, Load Cells, etc) through a cRIO DAQ. Have the FPGA file setup to pull in that data already and have the main VI and all the sub-VIs working just fine.
What I'm trying to do is save the raw voltage data (TDMS files) on the lower level and the convert and display on the upper level so that I don't have to convert and save (speed up saving data). So that leaves 3 distinct levels/sections:
On FPGA that pulls in the raw data
On FPGA that saves the raw data
Main VI that does all the controls/conversions/displays etc.
Number two is where I'm having an issue. I want to save all the data in parallel so I'm creating a save FPGA for each I/O device (8 Relays to command solenoid valves, 3 Pressure Transducers, 1 Load Cell, 4 Thermocouples). To do this I want to create a separate VI for each device (not sure if that's a smart thing to do).
The issue I'm having is when I use the FPGA Read/Write control to read in from the Target and save to the TDMS. When I only use a single FPGA target reference the lines are broken, but as soon as I switch to two targets, it now works.
Any reason why it might be doing this? Any ideas/suggestions at all on how to go about setting this up in general?
Thanks!

Hi,
HySoR wrote:
The issue I'm having is when I use the FPGA Read/Write control to read in from the Target and save to the TDMS. When I only use a single FPGA target reference the lines are broken, but as soon as I switch to two targets, it now works.
Could you take a screenshot and post this part of your code? I'm having trouble understanding what you are describing.
Craig H. | CLA | Systems Engineer | National Instruments

FPGA Read/Write Control Function Issues

Hello all! Rather new to using FPGA, but I have an interesting issue that's popping up.
Currently pulling in RAW voltage data from a set of sensors (Pressure Transducers, Load Cells, etc) through a cRIO DAQ. Have the FPGA file setup to pull in that data already and have the main VI and all the sub-VIs working just fine.
What I'm trying to do is save the raw voltage data (TDMS files) on the lower level and the convert and display on the upper level so that I don't have to convert and save (speed up saving data). So that leaves 3 distinct "levels/sections":
On FPGA that pulls in the raw data
On FPGA that saves the raw data
Main VI that does all the controls/conversions/displays etc.
Number two is where I'm having an issue. I want to save all the data in parallel so I'm creating a save FPGA for the I/O devices (8 Relays to command solenoid valves, 3 Pressure Transducers, 1 Load Cell, 4 Thermocouples).
The issue I'm having is when I use the FPGA Read/Write control to read in from the Target and save to the TDMS. When I only use a single FPGA target reference the lines are broken, but as soon as I switch to two targets, it now works.
I've attached a screen cap of the current problem. The set-up on the bottom (with only one target) doesn't work. But the second I add more than one target, it works.
Any reason why it might be doing this? Any ideas/suggestions at all on how to go about setting this up in general?
Thanks!
Attachments:
FPGAError.jpg ‏35 KB

HySoR,
You might check the documentation for "data" terminal of "TDMS Write" (http://zone.ni.com/reference/en-XX/help/371361H-01/glang/tdms_file_write/). One DBL element is not accepted, but 1D DBL array is accepted.
data is the data to write to the.tdmsfile. This input accepts the following data types:
Analog waveform or a 1D array of analog waveforms
Digital waveform
Digital table
Dynamic data
1D or 2D array of:
Signed or unsigned integers
Floating-point numbers
Timestamps
Booleans
Alphanumeric strings that do not contain null characters

LaTeX vs Writer vs Word

Back in May, I wrote an article with a fairly detailed comparison between the output of the same document in LaTeX, Writer, and Word, using the exact same layout, to see what the differences really are (most of the comparisons of this kind I've seen before have used different fonts, different page layout etc, which doesn't really give much of a basis for a comparison).
Anyway, the other day, it ended up on reddit.org, and I was reminded of it. Now that TeXlive is a hot topic, I figured I might as well post the link here too:
http://oestrem.com/thingstwice/?p=65
Feel free to comment

broch wrote:
I only read this:
Ligatures
But wait: there's more. Some letter combinations are more difficult than others. The letter "f" is particularly troublesome, and therefore, there's a long tradition — back to Gutenberg, actually — of making special characters for the combinations "fi" "fl" and "ff" (and "ffi" and "ffl") — so called ligatures. Most fonts actually have these, but again, W&W doesn't use them. This is a consequence of the WYSIWYG paradigm:
which is not true.
as both oo writer and word handle ligatures pretty well.
No, they don't. You can of course insert the ligature characters directly, but the "fi" ligature will not be handled as the characters "f" and "i" and will thus misbehave in certain situations. Besides, you will have to insert every one of them manually.
Or did I misunderstand what you meant?
However one of linux DTP (scribus) or text proseccors can handle all possible ligatures and glyphs. Best would be to try OTF fonts with some ligatures simply missing under linux even though inDesign handles these well.
Compare InDesign CS3 and latex
Sure, there are other programs which do this, but that was not the topic of the article. Nor was it: "can this be done in Linux?" :-)
SmallCaps is another mistake.
1) under linux there are two ways for oo writer to properly handle SmallCaps
-method one: open writer, select "Character" tool, within a font select SmallCaps
-method two (assuming that you ever used PS fonts and you know how to handle them)
edit *.afm file and change "FamilyName" to let's say FontNameSC
now install font with spadmin and there you have it
Your method one is the one that is discussed in the article. As it is said there, that is not really a true Small Caps solution, but a workaround which only gives decent results.
Method two is hardly an option for most users, and again requires a lot of manual labour. Again: you can of course use all these characters, but it is not integrated in the work-flow the application offers.

How can i correct a letter if i write a word not correctly

For example, i want to write the word" bedroom"but i write instead "badroom"
How do i correct only the letter a without deleting all the word?

If you press and hold the screen where the incorrect spalling is, then after a second or two you should get a magnifying glass appear on the screen which should let you position the insertion point accurately so that you can correct the word. You can then use the same process to re-position the insertion point again.

When playing music itunes pops out every 30 s on the forefront. It drives me crazy as I can't surf, write on word or do anything else while listenning music without being constantly interrupted. How can I stop it ?

When playing music itunes pops out every 30 s on the forefront. It drives me crazy as I can't surf, write on word or do anything else while listenning music without being constantly interrupted. How can I stop it ?

Do you have Logitech Gaming Software installed? If so, uninstall it and see if it resolves the issue.

Frequency Control Word (PXI-5402): Rounded up or down?

A further question wrt PXI-5402 standard function generation.
The frequency control word is calculated by dividing the desired output frequency by the sample clock frequency (100MHz for a PXI-5402) and multiplying it by 2^N where 'N' is the width of the DDS accumulator (48 for the PXI-5402). As the frequency control word is an integer does any fractional residual result in the control word being rounded up or rounded down?
e.g. if a I request a frequency of 1Hz I get a control word of 2814749.767 which would give an actual output frequency of 0.99999997 Hz if rounding down or 1.00000008 Hz if rounding up.
Thanks.

I believe the FCW gets rounded. I actually was able to find a LV demo for you, but it was made for the 5411. You would need to change some values to make it work for the 5402/5406: http://www.ni.com/example/28757/en/
Keep in mind that all of the DDS calculations are actually implemented in HW on an FPGA, see figure 2: http://www.ni.com/white-paper/5516/en/. The tuning word here is the same as the FCW. This image used to be used on that white paper before it was updated. The adder in Figure 2 is the same adder in this image below.
Also, as I have mentioned before, the accuracy for the Sample Clock above for the 5402 is 25ppm. If the actual frequency you are generating is such a concern, are you using an external high accuracy clock source? What is your application?
Product Support Engineer
National Instruments

Incorrect data type when writing to FPGA Read/Write Control

I have run in to a problem this morning that is causing me substantial headache. I am programming a CompactRIO chassis running in FPGA mode (not using the scan engine) with LabVIEW 2012. I am using the FPGA Read/Write Control function to pass data from the RT Host to the FPGA Target. The data the RT host is sending comes from a Windows host machine (acting as the UI) and is received by the RT Host through a network published variable.
The network published shared variable (shared between the RT and Windows system) is a Type Def cluster containing several elements, one of which is a Type Def cluster of fixed point numerics. The RT system reads this shared variable and breaks out the individual elements to pass along to various controls on the FPGA code's front panel. The FPGA's front panel contains a type def cluster (the same type def cluster, actually) of fixed point numerics.
The problem comes in the RT code. After I read the shared variable I unbundle the cluster by name, exposing the sub-cluster of fixed point numerics. I then drop an FPGA Read/Write Control on the RT block diagram and wire up the FPGA reference. I left click on the FPGA Read/Write Control and select the cluster of fixed point numerics. I wire these together and get a coercion dot. Being a coercion dot hater, I hover over it the dot and see that the wire data type is correct (type def cluster of fixed point numerics), but the terminal data type is listed as a cluster containing a Boolean, code integer and source string, also known as an error cluster. I delete the wire and check the terminal data type on the Read/Write Control, which is now correctly listed as a type def cluster of fixed point numerics. Rewiring it causes the terminal to revert back to the error cluster. I delete the wire again and right click on the terminal to add a control. Sure enough, a type def cluster of fixed point numerics appears. Right clicking and adding an indicator to the unbundle attached to the network shared variable produces the proper result. So, until they are attached to each other, everything works fine. When I wire these two nodes together, one spontaneously changes to a error cluster.
Any thoughts would be appreciated.

My apologies I never got back to responding on this. I regret that now because I got it to work but never posted how. I ran in to the exact same problem today and returned to this post to read the fix. It wasn't there, so I had to go through it all over again.
The manifestation of the problem this time was that I was now reading from the Read/Write FPGA front panel control and writing to a network published shared variable. Both of these (the published shared variable and the front panel control) were based on a strict type defined cluster, just like in the original post. In this instance, it was a completely different cluster in a completely different project, so it was not a one-off thing.
In addition to getting the coercion dot (one instance becoming an error cluster, recall), LabVIEW would completely explode this time around. If I saved the VI after changing type definition (I was adding to the cluster) I would get the following error:
Compile error. Report this problem to N.I. Tech Support. Copy cvt,csrc=0xFF
LabVIEW would then crash hard and shutdown without completing the save. FYI, I'm running LabVIEW 12.0f3 32-bit.
If I would then reopen the RT code, the same crash would occur immediately, ad nauseam. The only way to get the RT code to open was to change the type defined cluster back to the way it was (prior to adding the new element).
I didn't realize it last time around (what originally prompted this post), but I believe I was adding to a type def cluster when this occurred the first time.
So, how did I fix it this time around? By this point I tried many, many different things, so it is possible that something else fixed it. However, I believe that all I had to do was to build the FPGA code that the RT code was referencing. I didn't even have to deploy it or run it... I just had to build it. My guess is that the problem was the FPGA Reference vi (needed to communicate with the FPGA) is configured (in my case) to reference a bit file. When the development FPGA Main.vi ceases to match the bit file, I think that bad things happen. LabVIEW seems to get confused because the FPGA Main.vi development code is up and shows the new changes (and hence has the updated type def), but when you ask the RT code to do something substantial (Open, Save, etc), it refers to the old bit file that has not yet been updated. That is probably why the error getting thrown was a compile error.
I'm going to have to do an additional round of changes, so I will test this theory. Hopefully I will remember to update this post with either a confirmation or a retraction.

FPGA Up Cast Funktion deletes Values form Read/Write Controll

Hello Everybody,
I Have an other Problem with my RT-FPGA cRIO...
I have now managed to read the module IDs to convert this combination in a certain casenumber and this one then selects the FPGA File. Now is that I have inbounded various FPGA Bitfiles. If I composed them by the the "Up Cast function" to a universal reference then there will disappear some elements by using the Read / Write Control .
I have a picture attached that this Clarifies!
The first two R / W Controller have been up before the cast and the third upcast diverted after.
I hope you can help me!
thank you in advance before
MaJahn

Even now I've noticed the function Invoce methode: Read TEDS is also no longer supported.
Why?!
The both VIs are exactly the same during the Modules in it are different.
Iam using LabVIEW 2009 and the newest Drivers from the NI site!

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Hi Akiel,
Thanks for your question, I'm guessing the reasoning behind this is that you have a large number of indicators?
Whilst there isn't an in-built way of dynamically referencing which indicator on the FPGA to read from, there is a custom FPGA interface tool which may be of some use to you:
https://decibel.ni.com/content/docs/DOC-17185
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FPGA Read Write Control Coercion

I am getting a coercion indication using a FPGA read write control. I have attached a screen capture of the context help. For some reason it is looking for an error cluster?
Attachments:
FPGA Coercion Context Help.png ‏36 KB

The NI 9229 Data Rate Control.
See attachments
Attachments:
FPGA Coercion VI.png ‏76 KB
FPGA Coercion VI 2.png ‏129 KB

How do you apply rules based on read status?

I migrated to Mail.app from PowerMail, and one of the powerful options available when creating a filter/rule in PowerMail was the ability to check the status of the message (message is/is not read) before applying the rest of the rule.
Is there a way to apply this same check within a rule in Mail.app?
This option is used to create rules that file mail ONLY AFTER it has been read.
Obviously, the user must apply the rule manually since rules are only fired off when mail comes in, or when one highlights one or more message(s) and then selects the "Apply Rules" option from the contextual menu or from the Message menu.
What makes this so powerful is that rather than having to manually file every message after you read it you can create rules that check status for read, if it is check to see if it matches other criteria, and if it does, put it in a folder with other like messages.
Like many people, I have a large number of folders and subfolders into which I file my messages. By creating such a rule, I only have to file a message that matches other criteria once, use that to set up the criteria for the rule, and on subsequent messages that match that criteria, I only have to apply the rule after I have read it.
I could just file all the messages directly into their appropriate folders, but then I have to keep watch on the subfolders for new mail, rather than just watching the inbox, reading the new mail, then using the Apply Rules item to have the read message checked and then filed based on the criteria that it matches.
The logic might look like this.
Is Read status true
AND
The subject contains "Intranet"
THEN
Move message to /On My Mac/Work Mail/Current Projects/Intranet Project/ mail folder
THEN
Stop processing rules.
Without the ability to test the message's "read status" I have to select the message, right click to select "Move To>" from the contextual menu, then mouse through four sub panes to put the read message in the folder where I want to store it.
I also cannot select a number of read messages and use the Apply Rules option to allow my filing rules to move any number of read messages to their proper storage folders.
If anyone has a method for doing this, please let me know. It is the one thing I miss most about PowerMail.
Message was edited by: rnsyderpsu

I have been doing some of this, and while it does provide some of the functionality that is lost without the ability to apply rules only to read messages, it is not a complete solution. One of the biggest drawbacks is that it is not easy to selectively limit what new mail shows up the smart mailbox. One approach that works, sort of, is to limit the smart mailbox to only messages from people in my address book. However, not all relevant messages are from people already in my mailbox, so it requires constantly double checking to make sure that things are slipping through the cracks.
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Hi
is ther any API to write text to the Internet Explorer Status
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Thanks
Kasem

No but, you could call a javascript and pass a string to
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Look under ExternalInterface class to call javascript
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IDoc Control Record and Status Record Code, where is it!!!

Hi,
Where can i see the code for generation of control record and status record of IDoc.
   Thanks in advance for your answers

hi ,
1.first create an segment with the fields u want tcode we31 relase it .
2. create an idoc and assign segment to it tcode we30.
3.crate a message type tcode we81
4.assign that message to idoc tcode we 82.
do the ale configarations .
now u can write the code in our sender system
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parameters : p_mestyp like edmsg-msgtyp default 'ZKKUMSG',
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data : c_segment like edidd-segnam value 'ZKKUSEG',        "Data record (IDoc)-Segment type
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data : begin of i_tab occurs 0,
          ZKSNO   like ZKSTD-ZKSNO,
          ZKSNAME like ZKSTD-ZKSNAME,
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data : w_itab like i_tab.
data : s_segment like ZKKUSEG.
data : i_edidd like edidd occurs 0 with header line.
data : i_control_record like edidc.
data : i_comm_idoc like edidc occurs 0 with header line.
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here you have take ur internal table
*select single zsno zsname from zkiran into corresponding fields of itab where zsno = p_sno.
*4.     create control record into internal table.
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i_control_record-idoctp = c_idoctp.         "Basic type
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i_control_record-rcvprn = p_logsys.         "Partner Number of Recipient
*5.     create data record into internal table.
*i_edidd-segnam =   c_segment.
loop at i_tab into w_itab.
s_segment-zksno    = w_itab-ZKSNO.                     "Application Data
s_segment-zksname = w_itab-ZKSNAME.
i_edidd-sdata     = s_segment.
i_edidd-segnam    = c_segment.
clear w_itab.
append i_edidd.
endloop.
*6.     Process ALE Service Layer using the function module MASTER_IDOC_DISTRIBUTE. It returns the corresponding IDoc No.s.
call function 'MASTER_IDOC_DISTRIBUTE'
exporting
    master_idoc_control            = i_control_record
tables
    communication_idoc_control     = i_comm_idoc
    master_idoc_data               = i_edidd
exceptions
    error_in_idoc_control          = 1
    error_writing_idoc_status      = 2
    error_in_idoc_data             = 3
    sending_logical_system_unknown = 4
    others                         = 5.
if sy-subrc <> 0.
message id sy-msgid type sy-msgty number sy-msgno
          with sy-msgv1 sy-msgv2 sy-msgv3 sy-msgv4.
endif.
*7.     Display Communication IDocs.
loop at i_comm_idoc.
write : / 'Communication IDoc No. is : ', i_comm_idoc-docnum.
endloop.
*8.     Commit Work.
commit work.
i hope this sample code help u .
thanks

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i need to write one control file to upload data from .txt file to oracle table.
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2006041210:40:22
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data1 "to_date(:data1, 'YYYYMMDDHH24:MI:SS')"

Write Control word, read status word Unidrive SP

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