X Series is here – New Counter Features!

Question

Hey All,
The new X Series Multifunction DAQ devices have been announced – check them out here.
I’m posting here because I think X Series has several new counter features that many on this forum have been looking for. The user manual
will have all of these details and more with timing diagrams but I
thought I’d summarize a few of the sexier features and open it up for
comments/feedback.
First off – what stayed the same between
M Series/TIO counters and X series counters? The pinouts between M and
X series are the same so the PFI lines and default counter pinouts are
the same. The DAQmx programming is the same (you’ll need DAQmx 9.0, it
should be up this afternoon) and all the functionality that was
supported by M Series is supported by X Series, though a few behaviors
may have changed. Counters are still 32 bit.
Now on to
the fun stuff – the big one that I tend to overlook: X Series has 4
counters per board! They all have the same features and Freq Out is
still there too (with an additional 20MHz timebase).
Timebases:
X Series devices have 100MHz, 20MHz and 100kHz timebases. Note the
difference between 80MHz on M series and 100MHz on X series. DAQmx will
take care of the difference for you, unless you were programming in
terms of ticks and hardcoded in numbers based off of a 80MHz clock. 
Counter
FIFOs: X Series has a 127 sample FIFO per counter. When combined with
PCIe/PXIe, our benchmarked buffered counter rates went from ~350k on M series
(with a 2 sample FIFO) with a single counter to 10MHz on all four
counters (160MB/s streaming rate). The FIFO also allows us to implement…
Buffered Counter Output: Probably my favorite new feature. You can
now use a multi point write on counters and write out a buffer of pulse
values. There are two timing modes for this: implicit and sample
clocked. With implicit timing, every idle/active pair you write is
generated as a pulse. You can vary the idle/active time for every pulse
in your pulse train. Check out the "Gen Dig Pulse
Train-Buff-Implicit-Cont.vi" shipping example. With sample clock
timing, the idle/active time are updated every time a sample clock is
received. Check out the "Gen Dig Pulse Train-Buff-Ext Clk-Cont.vi"
shipping example. These modes give you much more control over your
waveform – now everything about it can be hardware timed. Also, I’ve
benchmarked the output rates at 10MHz on all four counters at the same
time.
Finite pulse train with one counter: Each X Series
counter has an Embedded counter paired with it. The embedded counter
isn’t directly programmable, but it does allow you to do counter
operations on one counter that used to take two.  A finite pulse train
used to take two counters – one to generate the pulse train and one to
gate it. Now a counter generates the pulse train, and its embedded
counter counts the TCs and disables the counter when it reaches the
number of pulses to generate.
More sample clocked
measurement modes: Edge counting and encoder measurements always
supported sample clocks, all other counter measurements were implicitly
(timed by the measurement waveform) timed. With the addition of the
sample clock terminal to the counters now all counter measurements
(except for semi-period) support sample clock timing. You can now get
the pulse width of the pulse just before the sample clock rather than
getting all the pulse widths and figuring out where they happened in
time. Why not semi period? We added a new “pulse” measurement instead
that returns a sample that contains the high and low time (or high and
low ticks, or frequency and duty cycle) so for each sample clock edge
you get a full pulse spec. Semi period still supports the same
measurements it used to, just not sample clocked. Speaking of sample
clocked…
Sample clocked frequency/period measurement
with averaging: X Series still supports the three frequency modes: Low
frequency 1 counter, 2 counter High Frequency and 2 counter Large
Range. In addition it supports sample clocked averaging. This is
essentially a method that is high accuracy method based on the sample
clock rate. With the same measurement time it has the same accuracy as
the Large range mode but it doesn’t take two counters.  Note, counters
do not have their own internal sample clock so you have to provide them
with an external signal.
Hope this helps,
Andrew S
National Instruments
Multifunction DAQ Product Support Engineer
Getting Started with NI-DAQmx
Measurement Fundamentals

Answer 1

Hi guys,
I drew up a schematic of one of the applications I need to get running in our lab. To recap:
1)      We have several piezo controllers for nanopositioning of samples under a microscope, some of them driven by a digital circuit that handles coordinate programming and trigger line programming (for syncing detectors to the piezo motion), other controllers are analog and need to be driven by voltages.
2)      We would like to emulate the behavior of the digital controller using the analog HW (we have much more analog controllers than digital ones).
3)      The basic implementation is like this (see also slide one in the attached pdf file) and runs perfectly:
a.       A global pulsetrain ticks with a certain frequency
b.      At each tick a voltage is written on an AO line and this tick is also sent to an RTSI line to sync multiple detectors
4)      To fully emulate the digital controller we also need to implement 4 trigger lines that exist on the digital controller. These trigger lines allow for fully programmable pulsetrain output that is in sync with the movement of the piezo. Slide two in the attached pdf illustrates what is needed. These trigger lines allow for much more intricate syncing of our detectors (only measure during certain parts of the motion instead of all the time).
After a lot of thinking and experimenting with the existing M series boards back here I came to the conclusion that the desired behavior is not possible with an M series board since they only allow for the output of “simple” pulsetrains with a given frequency.
Looking at this webpage (http://zone.ni.com/devzone/cda/tut/p/id/9384#toc3) however, I think that the X series board would offer exactly what we need since it allows for buffered counter output that enables definition of very complex pulstrain “shapes”.
Looking at the schemes I provided, could someone confirm that the X-series covers our needs? If this is the case, we would be interested in purchasing these kinds of boards.
Cheers,
Kris Janssen
Attachments:
Raman Imaging Timing Implementation.pdf ‏76 KB