BCM7 or CC7 IVR channel limit

Hi,
I need to limit simultaneous calls in BCM7 IVR application.
In BCM6 there was IVR application parameter "Max queue size" - maximum number of simultaneous callers in current IVR.
According to manual in BCM7 there is custom parameter - MaxCallsInQueue.
Does anybody know if it is the same thing?
By default this paramater is missing so does it mean there is no limit for simultaneous calls?
Ragnar

Hi Ragnar,
I believe that there is no standard parameter to limit simultaneous IVR channels but you can build a Custom-IVR to handle this issue.
I suggest you to use the Early Queue IVR example available in BCM installation files (e.g. \install\7.0.X.X\Examples And Templates\Example_IVR_Early_Queuing.xml), build a python code to select BCM Monitoring database where you check the active calls at the moment and make a decision to connect or disconnect a call.
Query example to check IVR active calls in BCM database:
SELECT COUNT(*)
FROM [BCM_Monitoring].[dbo].[TAMCurrentContactList]
WHERE Type = 'IVR'
You can find useful information in SAP Note 1951158 (SAP Contact Center 7.0 - IVR Samples) where there is also an example how to connect to internal or external databases by using SAP Contact Center’s own ODBC API and use the results.
Best Regards,
Heber Olivar

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To get back to my original question, making a patch out of what was in that mailing list post:
Does this look ok?
drivers/gpu/drm/i915/i915_drv.c | 4 ++++
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_display.c | 34 +++++++++++++++++++++-------------
3 files changed, 26 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 004880aa3a948669b8b4e23d9ad73d132cff81d0..1d88f059a27321ecb681e2b7927bb69029fcb49a 100644
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unsigned int i915_lvds_fixed = 1;
module_param_named(lvds_fixed, i915_lvds_fixed, int, 0600);
+unsigned int i915_lvds_channels = 0;
+module_param_named(lvds_channels, i915_lvds_channels, int, 0600);
+MODULE_PARM_DESC(lvds_channels, "LVDS channels in use: 0=(default) probe hardware 1=single 2=dual");
+
unsigned int i915_lvds_downclock = 0;
module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3fa8681459aa596e12e885568e5b48f0c9a60719..a6aab43e5f39f2d5b92a69a284bf8f72a254ea7c 100644
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+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -886,6 +886,7 @@ extern int i915_max_ioctl;
extern unsigned int i915_fbpercrtc;
extern unsigned int i915_powersave;
extern unsigned int i915_lvds_fixed;
+extern unsigned int i915_lvds_channels;
extern unsigned int i915_lvds_downclock;
extern unsigned int i915_lvds_24bit;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 09f57f29c30c371c213944be473090a780a287db..4dc91400edd8935be45a229cf91292339bca0ce8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
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.find_pll = intel_find_pll_ironlake_dp,
+static int intel_is_dual_channel_mode(struct drm_crtc *crtc)
+{
+ struct drm_device *dev = crtc->dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ if (i915_lvds_channels) {
+ /* User has specified desired channel mode */
+ return (i915_lvds_channels == 2);
+ }
+
+ /* User has not specified mode so let's see
+ what the hardware is doing. */
+ return ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP);
+}
+
static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
@@ -653,8 +667,7 @@ static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc)
if (dev_priv->lvds_use_ssc && dev_priv->lvds_ssc_freq == 100)
refclk = 100;
- if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) ==
- LVDS_CLKB_POWER_UP) {
+ if (intel_is_dual_channel_mode(crtc)) {
/* LVDS dual channel */
if (refclk == 100)
limit = &intel_limits_ironlake_dual_lvds_100m;
@@ -677,18 +690,16 @@ static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc)
static const intel_limit_t *intel_g4x_limit(struct drm_crtc *crtc)
- struct drm_device *dev = crtc->dev;
- struct drm_i915_private *dev_priv = dev->dev_private;
const intel_limit_t *limit;
if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
- if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
- LVDS_CLKB_POWER_UP)
+ if (intel_is_dual_channel_mode(crtc)) {
/* LVDS with dual channel */
limit = &intel_limits_g4x_dual_channel_lvds;
- else
- /* LVDS with dual channel */
+ } else {
+ /* LVDS with single channel */
limit = &intel_limits_g4x_single_channel_lvds;
+ }
} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI) ||
intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG)) {
limit = &intel_limits_g4x_hdmi;
@@ -821,8 +832,7 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
* reliably set up different single/dual channel state, if we
* even can.
- if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
- LVDS_CLKB_POWER_UP)
+ if (intel_is_dual_channel_mode(crtc))
clock.p2 = limit->p2.p2_fast;
else
clock.p2 = limit->p2.p2_slow;
@@ -871,7 +881,6 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
int target, int refclk, intel_clock_t *best_clock)
struct drm_device *dev = crtc->dev;
- struct drm_i915_private *dev_priv = dev->dev_private;
intel_clock_t clock;
int max_n;
bool found;
@@ -886,8 +895,7 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
lvds_reg = PCH_LVDS;
else
lvds_reg = LVDS;
- if ((I915_READ(lvds_reg) & LVDS_CLKB_POWER_MASK) ==
- LVDS_CLKB_POWER_UP)
+ if (intel_is_dual_channel_mode(crtc))
clock.p2 = limit->p2.p2_fast;
else
clock.p2 = limit->p2.p2_slow;

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