6602 phase accuracy

Hello,
I'm wondering if anyone can comment on the phase error I can expect when using three channels in DMA on a PXI-6602 card. I'm interested in doing transmission error measurements using encoders attached to a 6602 card, and need to be certain the channels are measuring at the same time, or with an extremely low phase error. I looked through the 6602 manual and the support articles on ni.com, but was unable to find the information I was looking for (unless I missed it).
Thanks in advance.

Hi,
I believe what you are referring to is phase locking. You can find information on this in the 660x User Guide on pages 3-17.
I also found a helpful Knowledge Base on Phase Locked Loops. Pay attention to the links on the bottom of the article, they are helpful also.
I hope this helps!
Regards,
Ima
Applications Engineer
National Instruments
LabVIEW Introduction Course - Six Hours
Getting Started with NI-DAQmx

Similar Messages

How can i find out the resolution and accuracy of PXI-6602 module?

I have a 32 bit 8 channel PXI-6602 counter module. PXI card is interfaced to PC with MXI-4 link. How can i find out the resolution and accuracy of this system.What is the maximum accuracy and resolution i will get from this system. Because optical signal to cmos conversion signal is given as a input to the counter.

Hi chandhu,
Were you referring to the accuracy of the count register or the timing clock?
PXI-6602 specifications can be found in the NI 660x Specifications. The resolution of the count register is, as you’ve noted, 32 bits. This corresponds to a maximum count value of 4,294,967,295. As long as all of the edges are in accordance with TTL specifications, the accuracy of the count register is 100%.
On the other hand, the PXI-6602 baseclock accuracy takes on the baseclock accuracy of the PXI CLK 10 signal. Again, this is all found in the specifications.
You may also want to check out the NI 660x User Manual – it contains a lot of details on the operation of these counter/timer devices.
I hope this helps. Please post back if you have further questions.
Ed W.
Applications Engineer
National Instruments

Beat Detective Fans, I Have a Process That May Interest You.

Hi All,
As you may have realised by now, I've been trying to obtain Beat Detective functionality in Logic for a while (not sure why because I try to use it as little as possible but, I was bored), and have posted a few different techniques to do with this matter.
I've found a way to get similar results, using Logic, and a mixture of Audio to Score, Beat Mapping and regular Quantize. Please let me know if this process works for you.
I started by taking a drum track, recorded with multiple mics. It was recorded to a click and was quite tight, but not machine like tight in the way most A&R like things now (sigh). So what I did was this, and I only investigated this briefly ok so forgive me if it doesn't work for you:
-Take the bass drum channel for this instance, could be snare, could be a mix.
-Open up the sample editor.
-Open Audio to score, and get it to create a score/midi part from the bass drum hits and sit it on a channel nearby.
-Then using the beat mapping Global Track, analyze the midi file, NOT the audio file of the bass drum track using 1/4 bar division.
-This SHOULD create a tempo map making every 1/4 beat land on a bass drum beat.
-Select all the audio that is to be Quantized, eg Kick, Snare, Toms, Overheads, etc. And Option+Scissor cut a 1/4 beat into the region, causing Logic to cut on every 1/4 beat throughout the song.
-Now you see the drums seperated at every bass drum beat throughout the track.
-Then Lock all these regions to SMPTE, use the tempo track's alternative tempo to switch it back to the tempo the song was recorded at, in my case 130BPM. The midi and beat map will look odd now, but the audio should stay where it was and fit back the original click.
-Now you can use the event list to quantize all the regions to whatever division you want and all the channels of audio will stay in sync and maintain phase accuracy.
What I like to do then is while selecting all applicable regions roll back the left corner a little to smooth out any double attacks or gaps, and fade the lot with small (5ms-20ms) equal power fades.
You can of course create multiple midi parts from the kick, snare and whatever else and merge them before using beap mapping to trigger from more than just one channel.
Do let me know if this works for you, like I said I tried it briefly but think it should work.
Dave

Hi
I've been trying this method, combined with the Tab to Transient ideas on another thread, for cutting up drums that are a bit 'wobbly' and not played to a click.
I've found the simplest solution is to marquee the bass drum and snare drum tracks, tab down the song cutting on the transients (apple backslash cuts everything on the screen), skipping over the breaks to adjust later. Then locking to smpte, I highlight 8 bars or so and find the average tempo and set the grid to near that, and hard quantize the lot, or maybe verse by verse if I want to keep an eye on what's happening..
This way I have all the beats hard on the grid as a starting point, and I can play with the tempo, add midi drums easily or apply a groove template, but I can always get back to a recognizable rhythm.
Before this method, , I would cut the beats using strip silence, but the transients were inside the cut sections so they did not line up exactly to the grid which made adding midi drums difficult.
And when i tried the audio to score and make a beat map out of the midi notes then cut on the quarter notes, I still found it faster to cut on the transients than dragging the yellow lines to the beats. in fact i managed to sidestep beat mapping altogether.
One question though,
-Then using the beat mapping Global Track, analyze the midi file, NOT the audio file of the bass drum track using 1/4 bar division.
-This SHOULD create a tempo map making every 1/4 beat land on a bass drum beat.
implies a simple button press, but I can't find it so reverted to manually doing the beat mapping similar to beat mapping audio.
Is there a fast solution to beat mapping midi or is it the same as audio?

Can I use NI Measure for Excel for stimulus response sequence?

it seems the NI software 'Measure' for Excel allows for simple AI or AO but
not sequential AO/AI, e.g. stim AO measure AI repeat for N rows of data.
I can do one or the other but cannot see how to setup a button to
do such a sequence. It is amazing to me that such basic functionality
is not available out-of-the box, or am I missing something?
Are there any more detailed VBA examples available online other
than the extremely rudimentary ones provided on the CD?
Apparently, this 'Measure' product hasnt been updated since 1998?
Does this lack of development indicate there is a better alternative
for doing Excel-based data acquisition?
tia

I have see this KB before.
But I don't understand the simultaneous sampling.
"E-Series Data Acquisition Cards multiplex all acquired signals to a single A/D converter. This introduces a slight phase delay between the acquired signals. In the case of the Lock-In Amplifier, the signal to be analyzed would then be phased relative to the acquired reference signal. That phase delay would adversely affect the phase accuracy of the Lock-In Amplifier."
It mean I still can use E-series DAQ card, but the phase maybe not the real phase?
If I can use the E-series DAQ card for a Lock-in Amplifier, what should I change the Lock-in amplifier start-up kit?
Thanks

Any ideas on how to use a 6602 to do frequency division?

Uisng traditional DAQ.
The 6602 user manual says it can do frequency division but I can not find an shipping example for this operation.
In the end I want to be able to use the 6602 to handle the interface to a quadrature encoder.
I want the 6602 to generate a sample pulse I can use for other DAQ work.
I would like to get one pulse for both transitions of both the A and B signals, or otherwise stated;
A pulse when
A goes high
B goes high
A goes low
B goes low
I was thinking if I could configure a counter (or group) to operate as a frequency divider and use each of the encoders as a clock signal AND just do a divide by "1" I would have what I was after.
Big Picture (incase it makes a difference)
A quadrature encoder is coupled to a resolver I am testing. I need to corelate the angular displacement with the measurement from the resolver. While the shaft of the encoder and resolver are spinning, I want the encoder to clock the analog input samples.
Thank you for reading,
Ben
Ben Rayner
I am currently active on.. MainStream Preppers
Rayner's Ridge is under construction

Ben,
First the executive summary: Sorry, No Can Do.
You won't be able to generate a sampling clock pulse on the transition to each of the 4 quadrature states. Here's a thread I was involved in where a similar question was asked. If you need to correlate in exactly that manner, you may want to pick up a quadrature decoder chip such as the 7084. It'll generate a "pulse" whose width is controlled by selection of an RC time constant during circuit build. I put "pulse" in quotes because it isn't truly a TTL signal due to the long transition time. I would recommend that you plan on adding a Schmitt trigger to square it up, perhaps another to re-invert it back to original polarity.
However, all that being said, you may be better off using an internal sampling clock to drive analog and encoder position acquisition anyway. On many encoders I've used, the transitions are NOT perfect 1/4 divisions of the cycle. You can sometimes see this on the spec sheets where the A to B relative phase is given as, say, 90 +/- 15 degrees. There will also be a tolerance on the phasing of A's rising and falling edges, maybe 180 +/- 10 degrees (it's often a little tighter than the A to B phasing).
In practice, I've typically found that these deviations tend to be systematic rather than random. Of the company's 1000 similar encoders, the phase stays within the range 90 +/- 15. With my 1 instance, the phase may be 84 +/-3 around a full rev of the encoder. The point is that if you generate pulses with the quadrature transitions, the samples still won't *really* be equally-spaced in position. They'll just think they are.
I'd suggest at least considering high-speed sampling with an internal clock that's shared by both tasks. Then do a little bit of curve-fitting / interpolation to the data when you need to derive more precision.
Re: frequency division. You have to select a specific edge (either rising-only or falling-only) as the active edge. Your counter will then ignore the other type of edge. Also, you'll need to specify the # of edges each for the idle and pulse states. These must each be >= 2. So you can't divide by 1 - the best* you can do is to divide by 4. (*Technically, you could sort-of divide by 2 if you configure the counter to pulse rather than toggle its output. However you can't control the pulse width, and as I recall it's fixed at 50 nanoseconds.) Write back if you'd like to see an example.
-Kevin P.

"Operation could not be completed. (OSStatus error -6602.)"

What is this error about? I am trying to use the seagate at home backup harddrive and when i try to back it up to my time machine i get this message "Operation could not be completed. (OSStatus error -6602.)" what do i do?

jjbmmm wrote:
After signing into to NAS server, I get the following error:
Operation could not be completed. (OSStatus error -6602.)
Welcome to Apple's discussion groups.
I haven't reviewed it in detail for accuracy, but you might find useful advice in this post:
http://www.somelifeblog.com/2009/02/fixed-time-machine-backup-to-network.html

How can I calculate the frequency of a 2-4Hz three phase sine wave in 50msec?

I want to calculate the frequency of a sine wave using either all three phases or just one, but I want to know the frequency after 50 msec, I don't want to have to wait for a full period.

I have a mathematically sound suggestion but I do not know how well it will work in application. Most period measurements measure the time between a full period or several periods to eliminate the error introduced by the measuring device. Essentially the device error is made insignificant.
Mathematically you can do much more but there is a tradeoff between recording less information and knowing (or assuming) some values. For instance, if one knew the amplitude and could calculate the derivative of the signal, one could calculate the frequency. A sine wave can be represented by the function: A sin (BX)=C , where A is the amplitude, B is the frequency, C is the present measured value. If the equation is solved for X, we get: X=(sin^(-1)(C/A))/B. The d
erivative of the first equation is AB cos(BX)=C. If the equation for X is now substituted into the second equation, we get, AB cos(B (sin^(-1)(C/A))/B)=C. Solving for B we get B=C/(A cos(sin^(-1)(C/A))). Remember, we already know A and C, so we are done.
Practically every step and assumption in the above argument introduces possible error which will affect the accuracy of the frequency. Unfortunately it is a trade off and that is why at least a whole period needs to be measured to get an accurate frequency.
Jeremy Braden
National Instruments

Inaccuracy problem in MT Phase Locked Loop VI

Hello,
I'm using MT Phase Locked Loop VI(PLL VI hereafter) in LabVIEW with NI USRP2920(Kind of IQ converter) to measure carrier frequency and phase of input signal.
The PLL VI works fine when relatively low frequency signals like 500Hz are input, but when it comes to high frequency like 30kHz, the accuracy of frequency and phase estimation in PLL VI is significantly degraded. In my implementation, MT Baseband PLL is selected as an instance.
Can anyone describe why this things happen?
If it is difficult to measure high frequency with this PLL VI, does anyone know appropriate way to measure input IQ signal's carrier frequency and phase?
Thank you for reading through.
P.S.
In my implementation, FDMA is adopted. So, above "carrier" means kind of subcarrier which is downconverted to the baseband as IQ.

Aha! I found a solution! For future people looking for the answer - I highly recommend THIS link as a set of files that will get you 90% of the way there
https://decibel.ni.com/content/docs/DOC-1121
For people still reading - the difference is see in my attached JPG. The top example (mine) uses a multiply followed by a low pass filter. The problem is that that filter is non-monotonic with changing phase (i.e. that filter's DC output is maximum when phase is matched but decreases with both leading and lagging phase). The NI solution (bottom) is monotonic with phase (that is, phase difference between the LO and the input).
I can tell the NI solution is doing some complex (as in non-real numbers) math to extract the phase information. It looks a lot like in-phase & quadtrature extraction and maybe thats important. The key question I have going forward is - what does a blessed Hilbert Transform help me with ? What is its function? Reading the help - I do get a little buried in the Math of it.
-Thanks
Attachments:
ExampleCode.jpg ‏60 KB
PLL_Test2.vi ‏88 KB

How to generate a pulse on x number of events PCI-6602

I am running LabVIEW 5.1 full development with a PCI-6602 counter board.
I would like to generate an output pulse after counting x number of input pulses. I would also like to reset the counter with an external signal.
My application is I am trying to generate a second index pulse for an encoder.
I would like to count the pulses from encoder phase A and generate an output pulse on x number of counts. Then I would like to reset the counter using the encoder’s index pulse. This way I can change the phase of the “generated” index pulse with respect to the “real” index pulse by x number of counts (degrees) and maintain that regardless of encoder rpm.
Thanks
Brian

Brian,
There actually is a way to do what you want, but it gets a little complicated. I don't have LV on this machine so I'll have to just describe the idea. First a summary: the counter will repeatedly countdown to 0. Each time it reaches 0, it will generate a brief pulse which will in turn hw-reset the counter value to N. Then it will countdown to 0 again, etc. The same brief pulse could also be wired to a different encoder-measuring counter to create a "delayed" reset to 0 (or some other #).
1. Configure your counter for "position measurement" instead of "simple event counting". Set the encoder type to, um, I forget the name -- something like "two pulse encoder." It's the setting that will increment with every SOURCE edge and decrement with every AUX edge. Wire your encoder channel A to the counter's default AUX input (in position encoder mode, you must use the default input pins). Hard wire from the default SOURCE input to GND. Now every encoder edge will decrement the count, and nothing wlil ever increment it.
2. Configure the counter to use z-indexing. Set the z-index reload value to be N-1, where N is the # of encoder counts by which to delay the encoder's real z-index pulse. Set the z-index reload phase appropriately, probably to A low B low. Wire the real z-index pulse to the counter's GATE input.
3. Configure the counter to "pulse on terminal count" -- you do this using 'Counter Set Attribute.vi'. So N encoder edges after the real z-index pulse, you'll generate a pseudo-z-index with this counter.
4. You can wire this pseudo-z-index to the GATE input of the encoder-measuring counter. Now the encoder's z-index pulse is delayed by an amount you can program.
5. Note: this method requires the motion to be uni-directional.
Good luck!
-Kevin P.

Frequency divide by N doesn't work on Counter-Timer PCI-6602

Hello everybody,
I tried to do something basic ( ?) with this Counter-Timer 6602 Board, and it doesn’t work.
So I hope some people with more experience than me could understand what happens here.
1) What I need:
I need to generate 4 synchonised clocks, whose periods will be multiple of 1 ms.
2) What I have:
LabVIEW 7.0 and a PCI-6602 Counter-Timer Board in a DELL PC running under XP pro.
The PCI-6602 Counter-Timer Board has 8 counter timers named CTR 0, CTR 1, ... CTR7.
3) What I have already done, and that worked:
- Generate a 1 kHz “Master Clock” signal from CTR 4, configured by “Continuous Pulse Generator Config.vi” (found in “Data Acquisition, Counters...).
- configure CTR 0 and CTR 1 to work as frequency dividers, by use of “Down Counter or Divider Config.vi”.
- Apply the output signal of CTR 4 (OUT ) to the SOURCE inputs of CTR 0 and CTR 1 by means of physical wiring in the SCB-68 connection box.
When I do this, I get two nice secondary clock signals on my oscilloscope screen, ( with periods = 3 ms, or 5 ms or whatever multiples of 1 ms I choose) from CTR 0 and CTR 1 outputs , very clean and perfectly in phase with the 1 kHz Master Clock.
So far, so good...
But I still need 2 more secondary clocks...
One would say: “No problem, do the same trick with two other counters...” Well, not so simple, it seems...
4) What I tried to do, and that didn’t work:
When I try to do the same frequency division with any of the remaining counters, (CTR2 to CTR7), the program stops and I get an error “ –10020 : Time base not valid “.
I can’t figure out what happens here: I thought any counter could be configured to work as a frequency divider, but it seems not to be so, and I am stuck here.
Has anyone an idea about how to fix this type of problem?
Attached file: hor_div02New.vi
Attachments:
hor_div02New.vi ‏123 KB

karolik,
I'm just adding a followup in English. As Marc L. mentioned, the particular vi named "Down Counter or Divider Config" isn't compatible with the 6602. While the 6602 does have the ability to generate 4 synchronized clocks, a different syntax is needed. Here's how I'd do it:
Traditional NI-DAQ
1. Configure a continuous pulsetrain on CTR 4. Route its output to, say, RTSI 4. Don't start it yet.
2. Configure CTR 0,1,2,3 for continuous pulsetrains using RTSI 4 as their "timebase source." Start them.
3. Start the CTR 4 pulsetrain.
4. Now CTR's 0-3 should generate separate clocks with synchronized phasing.
DAQmx
1. Configure a continuous pulsetrain on CTR 4. Don't start it yet.
2. Configure CTR 0,1,2,3 for continuous pulsetrains using "Ticks" for units. Use a DAQmx property node (probably Channel property node, but am not 100% sure and don't have a LV PC handy to check) to specify that the "ctr4 internal output" should be used as the timebase. Start them.
3. Start the CTR 4 pulsetrain.
4. Now CTR's 0-3 should generate separate clocks with synchronized phasing.
-Kevin P.

Phase Lock problem with a PXI-1000 chassis

As already discussed here, we had an application running smoothly on a 1042 chassis with a 8186 controller.
We generate two sine waves in phase quadrature, using two 5411 boards.
Unfortunately, we are now obliged to use a PXI-1000 with a 8170 controller, and we don't get anymore the expected results : the signals are generated with the correct frequency and amplitude, but the phase offset is totally unstable, as observed on an oscilloscop.
We are using the Synchronized wave generation NI example. Are we missing something ?
Please consider that we are not specialists in electronics, just plain biologists .
We need help URGENTLY !!!
Chilly Charly (aka CC)
E-List Master - Kudos glutton - Press the yellow button on the left...

One thing that I noticed between the 1000 and the 1042 is that the 1000 has the Fan integrated with the power supply, so the fan is probably run off AC. In the 1042, the fan is run off DC and as stated in the specifications greatly reducing electronic noise. It could be that your phase offset is caused by the AC fan in the 1000.
You might want to try to move everything as far away from the power supply and fan as possible (if it is possible) to see if this helps at all.
Also, the 1042 and 1000 have a 10 MHz reference signal for timing pusposes to each of the modules. The 1042 has an accuracy (skew) of 250 ps between each of the mudules. The 1000 has a skew of 1 ns, obviously much greater of an error (less accurate), which could be causing some issues as well.
I do not know what freq you are operating at, but you may be able to filter some of the 60 Hz frequencies out with a smaller capacitor 0.1uF or so.
Good luck.
Kenny
Kenny

How do I synchronize a pulse output to a sine wave input on a pci-6602 card?

I have a sine wave from a function generator as the input on the source of a counter. Input frequencies vary from 2-60 kHz. I want to produce a pulse train at a different frequency (10 Hz), but in phase with the sine wave. I have only been using Labview 5.1 for a short time. I am using the PCI-6602 card with a SCB-68 connecting block.

Hello;
Unfortunately, you can't connect a analog sinewave to the counter source. Counters only work with digital TTL signal type. To accomplish that task, you will need a MIO board working in sync with the 6602 you already have.
Regards
Filipe A.
Applications Engineer
National Instruments

Multiple pulse generation off master, 6602

I would like to generate 4 pulse trains phased with respect to the master pulse train. The example vi I am working with shows phasing relative to the preceeding pulse train (counter), so changing the phase of only one channel on the fly requires rephasing all subsequent channels. I would prefer not to do this. This example uses a "counter group" of 2 and sets the nth gate to the n-1 output ("other counter output"). Can I use a larger counter group and refer all channel gates back to the master pulse train? In doing so would this alleviate the need to use the Route Signal vi in going from one counter group to the next? I am using an 8 channel, NI 6602 card.

I'd like to try to give you an answer, but I might first need to ask some questions:
A. Is the "Master" pulse train an external signal or something you are going to generate from the 6602?
B. You talk about phasing, so I assume that the other 4 pulse trains need to have the same frequency as the master -- is this correct?
C. Do you need both rising and falling edges to be phased to the Master, or only one of the edges?
Here's an outline for how to handle an external Master, where the other 4 pulse trains are at the same frequency but only the rising edges have the desired phasing relationship. (You could also do it this way for an internally-generated Master.) They will be directly referenced to the Master, so you can change the phasing on any one of them without affecting the others.
1. Physically wire the Master pulse train to a legal Gate input. (If your Master is internally generated you could use RTSI and save the screwdriver work.)
2. Program the other 4 counters to be in "retriggerable pulse" mode, using max internal timebase as a Source, and the pin from step (1) as a Gate. Program Gate polarity to be sensitive to rising edges. Output polarity can probably left as default (low state during delay or when inactive, high state during pulse). Each one has to be configured separately, using a unique group #
3. Program the pulse parameters to use for delay, and a minimal pulse duration. The short duration allows the counter to be ready to be re-triggered as soon as possible after the needed delay, allowing you to approach 360 degree lag.
4. It sounds like you already know how to pass in a new delay parameter "Pulse Spec 1" and issue the "Switch Cycle" command when you need to change the phase on the fly.
(If you have an internally generated Master where you can know the exact period, you could also have passed in the new pulse duration parameter "Pulse Spec 2" such that the sum is always == Master pulse train period. This way you can maintain phasing relationships on both rising *and* falling edges.)
However, if you have an external Master and need phasing on both rising and falling edges, I'm afraid I'm stumped.
Regarding "grouping" the counters: I don't think it can be done yet. But you can set up 4 individual counters with each one mapped to use the same physical signal for its programmed Gate (used here for retriggering).
Since all 4 will be programmed similarly, you might clean up your block diagram a bit by carrying the task id's through as an array, over which you auto-index a For loop. Also think about whether to pass the error cluster through as an array (individual error chain for each counter) or a shift register (shared for all slave counters).
Regarding "other counter output." This is more restricted than it might sound. You don't get to choose which "other" counter you want. You get what NI has predetermined as each counter's "other." Specifically, they are paired on the 6602 as follows:
(0,1), (2,3), (4,5), (6,7) so that Counter #3 is the "other" counter for Counter #2, vice versa, and likewise for each other pair.

Alternative to PCI-6023E + PCI-6602

Hello,
I am already using a system to acquire 16 analog inputs data (at 50Hz) and 100Hz PWM signals (counters) and to send 100Hz PWM signals to external devices. Because it deals with 12 concurrent counters I bought 2 x PCI-6602 counter boards on top of a PCI-6023E for the 16 analog inputs (through a SC2345 box). This works all well.
I now have to build a simplified and portable solution that has to run on a laptop. I was thinking about a DAQ-6036E or DAQ-6024E (or even DAQ-6062E) and keep a SC2345 but do not know if I will get the same functionalities particularly for the PWM counting (in and out). I have to be able to count the high edge of the square signal at 100Hz while acquiring my analog inputs; also be able to generate those 100Hz signals. Will I be able to connect my counter in and counter out (one of each) to the SC2345 to do that?
Thanks for your comments,
Christophe

Hello Christ0phe,
Looking at your current specifications and hardware, the best suitable solution for a portable appication with >2 counters would be the Compact RIO Platform.
As this is an FPGA based platform, you can implement (theoretically) as much counters for PWM generation and reading as you want.
As you are an existing DAQ user, you will not be able to reuse your existing code. The cRIO platform uses the NI-RIO driver which is using some different program logic than the NI-DAQmx driver.
Why is the Compact RIO platform the best solution?
Well, the cRIO chassis can be powered by a simply DC power supply. Depending which chassis this is between 9 and 30 VDC.
The cRIO platform also has a dedicated controller inside which will run your LabVIEW code. The PWM logic itself can run on the FPGA integrated in the cRIO chassis.
So, the laptop will not be use for any calculation, only for monitoring and control of your application.
If you want to stay with the NI DAQ plaform I see two other portable solutions:
The first one is to make the swtich to the PXI platform.
There is a small chassis (PXI-1033) which has an integrated MXI-interface. Using MXI technology, you can control a PXI chassis from another PC, including a laptop (using ExpressCard, not PCMCIA).
For the PXI platform you can use identical or similar DAQ boards as you have now, reusing your existing LabVIEW code.
Drawback of the PXI-1033 is that it can only be powered by 230VAC, you will have to provide a DC-to 230VAC converter yourself to be able to use it in the field.
For your information. It's becoming harder and harder to find laptops with PCMCIA slots, ExpressCard is the successor available on most new laptops.
But please have a look at following article concerning laptop compatibility: http://zone.ni.com/devzone/cda/tut/p/id/5035
A last solution is to use the cDAQ plaform.
Again a fully portable DAQ solution, but as it uses the same technology as the 'normal' DAQ boards, it only has 2 counters on board.
As your PWM speeds are quite slow, it may although be possible to use this platform for multiple PWM signal generation and reading. All will depend on the desired PWM accuracy (resolution) and if they all share the same signal period.
It is possible to use the 2 on-board counters as a known sample clock to generate and read the PWM pulses using correlated DIO.
Correlated DIO means that your digital input and output signals are hardware clocked (synchronized with other available clock source). On the cDAQ platform, your I/O modules must be placed in slot 1-4 of the cDAQ chassis to be able to use correlated DIO. Possible I/O modules are in the C-series 940x range.
Drawback: all your calculations have to be done on the fly in LabVIEW. You will need to write code to generate an array
of digital waveform data, then output it using hardware timed DIO
synchronized to generate counter clock. For the readout of the PWM signal, you will have to count (within the LV application) the number of tick (of pulses) of the sample clock during which the PWM signal was 'high' and calculate based on the known timing information the PWM on-time, period (and if needed duty cycle).
More info about cDAQ and Correlated DIO:
NI-DAQmx: Correlated Digital I/O with NI CompactDAQ and LabVIEW
Can I Use Different Sample Clocks for Correlated DI and DO?
Some examples exist:
CompactDAQ - Generating More Than 2 Pulse Trains
NI-DAQmx: Digital Channel Pulse Width Modulation (PWM)
This info should already help you make a selection.
But please contact you local National Instruments office if you need more information.
Best regards,
Best regards,
Joeri
National Instruments
Applications Engineering
http://www.ni.com/ask
Make our forums great:
If you like the answer, don't forget to "Kudos!".
"Accept the Solution" if your question is answered!

Generate and synchronize 6 digital channels with differents phases/frequencies/duty cycles/...

Hello,
For some kind of tests we need to generate, with a 6534 card, 6 signals.
The 6534 has 32 digital E/S and can go up to 20MB/s !
Each channel must be independant so that it can have it's own frequency and duty cycle. But for exemple the second channel can be delayed in reference at first channel. I put an image so that you can understand better what i try to do (3 signals are shown but six are needed).
I see a lot of things on forum that are close to my probleme, but none seems to be as advanced as mine.
http://sine.ni.com/devzone/cda/epd/p/id/4683 -> 6534 doesn't have timers
http://forums.ni.com/ni/board/message?board.id=40&message.id=5167 -> Just a phase probleme
http://forums.ni.com/ni/board/message?board.id=170&message.id=261289 -> Another board
http://forums.ni.com/ni/board/message?board.id=40&message.id=5090 -> Another probleme
I contacted NI support, they send me an exemple on "patterns" but it generates frequencies that are multiple of one with no phase consideration or duty cycle.
Any idea ?
Thanks in advance for your advice and help.
Eric.
Message Edité par Eric31 le 08-10-2007 06:52 AM
Message Edité par Eric31 le 08-10-2007 06:55 AM
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At best, that's gonna be a pain in the neck with that board. If you need very precise timing for freqs, duty cycles and offsets, it gets worse. If they need to change on-the-fly, it'll be near-impossible.
1. You can only operate 1 hw-timed digital output task at a time. So all 6 signals must be part of that 1 task.
2. Thus, you need to define an output buffer representing the states of those 6 bits throughout your entire generation.
3. There's a bunch of greatest common factor and least common multiple stuff needed to figure out the right output rate and buffer size, assuming you'll want to regenerate repetitively. You first need the gcf of all the transition times to come up with the right output rate since all the transitions need to occur on some integer multiple of the output period.   You'll then need the lcm of the 6 signals' periods, combined with the output rate, to size up a buffer that can be regenerated.
4. Forming the output data array may be quite complex.   Personally, I always do my stuff with raw arrays and I know that interleaving all those signals can be quite tricky, especially if there may be an occasional simultaneous transition.   However, I suppose there's a chance that some of the digital waveform functions *might* make this step a bit simpler. I just haven't played around with that format much.
Editorial opinion: Buy a 6602. You can trigger 6 counters to start with different initial phasing, and will be able to change freq & duty cycle on-the-fly for each one independently.
Editorial opinion #2: For higher channel count apps, I'd also recommend checking out the DIO-64 board put out by Viewpoint Systems, an NI Alliance partner. It gives you much smarter hardware-timed DIO. With the NI board, there can be huge amounts of redundant info in the DO buffer. If you find that your GCF is 10 microsec, but the time between consecutive transitions is 10 millisec, you'll have to stuff 1000 identical values into your output buffer.   With Viewpoint's board, your data acq buffer *only* contains data at the transition times. Timing is controlled by delivering a separate array defining the timestamps that correspond to those transitions.
-Kevin P.

6602 phase accuracy

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