Controlling processor on the timed loop

Controlling attributes of a Timed Loop does not seem very straight forward to me! I experience crashing my VI very often when my Timed Loops are featured with controlled period and sometimes processor and offset on their next iterations. Of course there are queues between the Timed Loops, too. Not yet sure of the cause of the frequent crash!

Hi Siamak,
Good Morning and I hope your well today. Thanks for your post.
I have seen you have received no support so far.
Can I ask if you have carried out any further troubleshooting of the issue? Have you got a simple example peice of code which reproduces the crash?
If you think its your wide application - how have you design it?
Kind Regards
James Hillman
Applications Engineer 2008 to 2009 National Instruments UK & Ireland
Loughborough University UK - 2006 to 2011
Remember Kudos those who help!

Similar Messages

Using timer/counter with PCI-6221/USB-6210 to control timed-loop VI

Dear all,
I need to ask about two devices and one of their functionalities, PCI-6221 and USB-6210. For our NI-based system, we need to control some timings in a Timed-Loop vi, for that currently we are using PCI-6221 and we give external TTL signal (at 1 kHz) to it,
recenntly we need to make some changes and for that we found USB 6210 DAQ to be more suitable, but we need to clear ourselves on some specific things.
Can the counter/timers functions available in the either PCI 6221 or USB 6210 can be used to control the Timed-loop VI by giving external clock or by using their own internal clock source?
Although we are using external clock with the PCI 6221 but we want to know about the usage of their internal clock, also are controlling timed-loop also possible for USB-6210
Also... What if we use the RTOS, are they still able to control the timed-loop VI without giving any 'EXTERNAL CLOCK' and using the internal clock sources of the DAQs
Waiting for reply,
Bests,
RaJaf
Solved!
Go to Solution.

Ben,
I having read previous email which I send earlier with general overview, we discussed in more detail within our team and I am giviing the specific answers.
Please check in RED the most recent answers. Blue are the questions/suggestions by your side.
1.    Using Internal hardware clock of PCI-6221 would enable us get rid of external clock, but how to divert the internal hardware clock to the current settings. Any idea (can you provide us with some reference manul for otherwise). I mean is there some flag-bit etc. or VI
2.       Is it also meant that with the installation of RTOS the timed-loop can directly get the timing source from the internal hardware clock PCI-6221? --- How???
3.       In order to make desktop to work as RT system, what is the hardware (motherboard, processor, etc..) requirement? What are the LabVIEW modules (specific name) that needed to be installed? Our platform is LabVIEW 8.6. (Currently we have windows-7 with i7 core processor)
What kind of application are you intending for this system? ---- high-speed laser scanning system.
Are you most concerned about accuracy, speed, or responsiveness? To control the laser mirror scanner to move at 1 kHz or 2 kHz speed. On the other hands, using PCI-5105 (128 MB memory) as a DAQ for real-time/on-the-fly data processing.
Bests,
RAJAF

Timed Loop timing source - Control Loop From Task is too slow

I'm trying to make a Timed Loop run at a period of 2 ms, with an analog input task running at 50 kHz as timing source. The input analog signal is scaled and fed into a synchronised analog output task on the same multifunction DAQ board. Using the built-in 1 kHz or 1 MHz clock as timing source for the Timed Loop works great, except for a slight time lag between the loop and my AI/AO tasks which over time becomes unacceptable because my task will be running for up to an hour. However, when I use the DAQmx Create Timing Source: Control Loop From Task vi to create a timing source, everything slows down and the fastest loop time I can get is around 20 ms. Any suggestions to get around this would be highly appreciated!
System: LabVIEW RT 8.0 with DAQmx 8.0 running on an NI PXI-8186; NI PXI-6251 used for analog input.

You're welcome!
You can build an array, and if your data is not hugh (100's of MB) this may be the easiest solution. However, we aways suggest implementing the Producer/Consumer Architecture. Keep the PID in the Producer loop, but move the File IO to the Consumer. Also, it appears that your instrument uses some form of serial communication, so that could cause lags in your system....
What is your application about in general, what performance are you hoping for, etc?
Joshua B.
National Instruments
NI Services
NI Support Resources
NI Training Resources

Timed loop in a subvi, one or the other runs but not both.

I have a vi with two sub vis. Each sub vi contains a timed loop that updates a global variable. In the top level vi I read from each global and display its content. When I run the top level vi I see only one global counting but not both. If I start and stop the top level vi the sub vis take turns counting but they never both count. If I replace the timed loop with a while loop in each subvi then both count. If I move the two timed loops from their respective sub vis and place them in the top level vi then both globals show counting. Can any body explain what is going on.
I'm using Labview 2010 SP1.
Attachments:
Test Of Timed Loop.zip ‏72 KB

Never Mind!
When I cloned the subvi I forgot to change the structure name of the timed loop. Placing an error indicator inside the subvi disclosed the error -808 (Error -808 occurred at an unidentified location. Possible reason(s):LabVIEW: The given name is already being used by the following timed structure.).

Who know the difference between the two Timed Loop structures in NI's examples named PAC Simulation.vi?

My LabVIEW version is LabVIEW 8.0.
When I look up the help document about Timed Loop, I find two examples about Timed Loop with the same file name and different file path.
One is "labview\examples\general\plat-timedloopframes.llb\PAC Simulation.vi",
and the other is "labview\examples\general\timedloop.llb\PAC Simulation.vi".
The function of these two examples is almost the same. But they display different results when running. I debug them and find that the value of Actual Start [f] of these two timed loop is different. Its value is constand in one vi and increasing in another vi. But the configuration of these two timed loops is the same.
Can anyone tell me the diffrence between these two timed loops?
Thanks!

After I posted this, I realized there was one more "Time" clock, namely the Time node on the Event structure. How is this clock (which I will call ET, for Event Time) related to the Global Start Time (or GST) and the TimeStamp (TS)?
ET represents time in milliseconds, using a U32. The largest value that can be represented is roughly 4 billion, but there are more than 30 billion milliseconds per year. Hence this "clock" cannot directly keep the same time as the GST or TS.
However, on the PC, if you multiply the ET value by a million (thereby converting the time to nanoseconds) and compare this value to GST, you'll see they are basically the same. Thus, on the PC, ET and GST are "in sync", but not in sync with TS.
On a real-time PXI system, we already established that TS and GST are "in sync" -- what about ET? Curiously, this does not seem to be synchronized with anything.
A Word to the Wise -- when I originally added the Event structure, I synchronized it with the Timed Loop using a Value(Signalling) property node, which worked fine on the PC, but failed to fire on the PXI. I'd forgotten that you can't use this trick on real-time systems, as they have no Front Panel objects, hence the implementation using Dynamic Events.
Attachments:
TS GST ET VI.png ‏16 KB

LabVIEW RT, Timed loop, finished late, Call by reference

I have a timed loop triggered by the sample clock of a DAQ-Card. The sample Clock is 8 kHz and the loop will run with dt = 4. Normally the loop is running without finished late[i-1]. But from time to time it happens that the loop is running extremly longer which means instead of 0.5 millisec it needs 4 - 5 millisec. It seems this doesn't never occur while accessing DAQmx.
The application uses plugin technologies and some of the VIs in the timed loop are preloaded and called by Call by Reference.
Does those VIs inherit the priority, execution system and CPU of the timed loop?
The application is running on LV RT 2009 on a Dual core PXI-Controller. The timed loop is bound to CPU 1. There is no difference runinng the application from the development environment or as a startup application.
For the measuring test I modified the application in a way that I don't have:
disk access for storing the result file
TCP/IP communication
Controls on the front panel of the top level VI
Waldemar
Using 7.1.1, 8.5.1, 8.6.1, 2009 on XP and RT
Don't forget to give Kudos to good answers and/or questions

To keep you informed:
I stripped the application and have left only the measurement storing module and the timed loop. The loop was using the microsecond timer running each 500 µsec. Additional all Non-Real-Time modules were loaded and only one module creates a XML string and sends it to the communication layer which will drop it because no TCP/IP port is open. The creation of the XML string is done each 300 ms.
In this case I don't have any finished late iterations
Next I added the DAQ Module. Now I get finished late again but with a lesser frequency as original.
I removed all unnesseccary tasks from the DAQ moulde leaving one task for a PXI-4204 for using as the clock source for the timed loop. No I get finished late seldom.
I removed the module which will send the XML string and I don't get finished late.
Next I was adding code to see memory allocation. I can when memory allocation is changing but it is not related to the finished late iterations.
Next time I have the chance to do more tests I will see which DAQ task triggers the finished late iterations. I have one AI task on a PXI-4204, 4 Counter tasks on a PXI-6602, 1 DI task on a PXI-6514, 1 DO task on a PXI-6514, 1 DI task on a PXI-6259, 1 DO task on a PXI-6259, 1 AO task on a PXI-6259 and 1 AO task on a PXI-6711.
The AI task on the PXI-4204 is running in Continous Sampling (Single Point HW Timed is not supported), all other tasks exept the DI and DO are Single Point HW Timed.
Waldemar
Using 7.1.1, 8.5.1, 8.6.1, 2009 on XP and RT
Don't forget to give Kudos to good answers and/or questions

Timed Loop in Producer/Consumer Loop

Hello!
I have a producer/consumer loop LabVIEW program setup to allow me to properly capture images that are quite large (8MP) at approximately 14 frames per second (FPS). The program works great when the consumer loop is a 'while loop' (records at 14fps no problem), but I wanted to make it into a timed loop, so that I may vary the FPS as required. An oddity arises when I do this. Anywhere below 12fps, the loop works fine and the data is recorded properly. However, when I bump it up to 13fps, the consumer calculated FPS goes haywire and starts jumping between ~9 and ~13fps (data processing gets bogged?). When I set the required FPS to 14, the loop executes at a steady 7FPS maximum. Is there something I can do to rectify this situation?
I have attached my .VI
Thanks in advance!
Solved!
Go to Solution.
Attachments:
ProcessSplitJPG-FPS.vi ‏100 KB

Palanski,
Are you using LabVIEW Real-Time? Timed loops in a windows OS don't really increase determinism more than a while loop with a wait until next multiple timer. Before you changed the producer consumer loop to include a while loop was the programming running correctly? You may also want to vuse the VI analyizer to see how long things are taking to run. I would leave the producer consumer loop in the traditional set up and change the FPS by controlling the wait timer, after benchmarking your code this should be done the same way as you have it for the timed loop
Sam S
Applications Engineer
National Instruments

Missed iterations of TTL triggered timed loop

Hello everyone,
I have a camera control VI that waits for TTL information from the camera shutter and uses it as a timing source for a timed loop. In this timed loop the camera is readout and analyzed. The program should react as soon a possible to a new image and therefore I set the timed loop to 'Discard missed items' so that it doesnt try to catch up (the events im trying to detect are quite rare and last several frames).
The problem is this: When I set the camera for a certain numebr of frames (for example 10.000 frames) sometimes due to the discarded frames the loop iteration number never reaches the expected last frame number and doesnt exit (it stays at 9.998 for instance). I noticed I can prevent this by deselecting 'maintain original phase' . However it is unclear to me what exactly happens with these settings in a TTL triggered situation like this.
Is it the case that the loop skips the new data but starts the next loop at the correct iteration number (+1)? Or is something else happening?
Im thankfull for any help!
Solved!
Go to Solution.

Dear j.win,
If you deselect "Maintain Original Phase", actually you will never discard any iteration, whatever the value of "Discard missed items". Instead, the loop will try to catch up with the late iterations.
Using an external timing source (your TTL for example) instead of an internal timing source does not change anything. You can use the "Period" (dt) input of the Timed Loop to specify when the loop is supposed to iterate (the unit is the "ticks" in the case of an external timing source). A value of "1" means that the Loop try to iterate at every ticks of the external timing source. If for some reason one iteration lasts longer than that, you will have a "late iteration". Also with a value of "1", it is not possible to modify the "phase", then the "Maintain Original Phase" parameter will just defined wether or not you skip the iteration. If "Maintain Original Phase" is false, the loop will execute immediatly after a late iteration to still execute it, but a bit latter. If the "Maintain Original Phase" is true, the loop will execute immediatly after a late iteraion if the "Discard missed item" is false otherwise the loop will skip the iteration.
Is it clearer now?
Regards,
Cédric | NI Belgium

CRIO rt timed loop w/ external clock trigger???

I have a feedback control system using a cRIO-9022 and an NI-9401 digital I/O module (among others). I want to use a timed-loop in my RT code to have the execution priority I require. I need to run the timed-loop from an external clock on the NI-9401 input pin. How can this be done?
Thanks,

Hi WhyNot,
Can you elaborate on whether you are using your cRIO's Scan Interface or FPGA Interface to communicate with your 9401? This will make a large difference on your ability to time Real-Time execution with edges coming into your 9401. If you are using the FPGA interface, you may either consider implementing timed loops directly on your FPGA (if the code is not too large), or using a FIFO read from your 9401 on your controller to programmatically gate the execution of your loops. The latter option will not technically be hardware timed but may achieve jitter rates on an order of magnitude of 10s-100s of microseconds depending on your code complexity. If you are using Scan Mode, you may still programmatically gate loop execution based on 9401 inputs but latency will be significant (several milliseconds).
Regards,
Chris E.
Applications Engineer
National Instruments
http://www.ni.com/support

Crash when calling dlll built by LV using timed loop.

I have built a dll with Labview 7.1. Then I use VC++ 6.0 to call this dll. Everything is fine except that it will crash after the whole program finishes. Without timed loop the program can exit normally. When built to exe file, it can also run normally. This happens in both Windows2000 and Windows XP.
Anyone knows the reason for this?
Thanks!

Now the timed loop stops correctly everytime both in Labview environment and standalone exe. But when I call the dll version from C. The c program has no response after the program finishes.
I built another small vi without timed loop to dll and called it. The c program exit normally. What is the problem?
The period of timed loop is 50ms. Is it too short? I found from other post that maybe I should use while loop instead of timed loop. But i need very accurate controling of time.
Any suggestions?
Thanks!

Using NI-9411 in a timed loop clock less than 40Mhz...

Hi,
I'm using a cRIO for motion control. I have a counter that I modified a little bit (from the softmotion examples) and once compiled (unfortunately after 1 hour ...), I have an error saying that I couldn't acheive the desired timed loop clock of 40.4 MHz... the clock rate able to acheived was 40.16 MHz (really near)...
So I had a derived clock of 38.75MHz but this time, before compiling, i have an error saying that theses inputs can't not work at with this time loop clock...
The timed loop counter for this encoder only have to be more than 8000 Hz (1rev/s with 8000 pulses/revolution)
What can I do?
Thank,
Patrick

I know that a 9411 device can run in a SCTL at 40Mhz.
What I don't understand is that I can't run the loop below than 40Mhz.
I read in the FAQ that some device can not run above 40Mhz, but in my case, I want to run in slower....
Can it be because I'm asking the same device to run 1 SCTL with DI0, DI1, DI2 at 40Mhz and 1 other SCTL with DI3 DI4 DI5 at a different loop rate.. (38.75MHz) ...
Thanks,
Patrick

LabVIEW crashes in timed loops

Hi,
I'm running LabVIEW 8 on a
Pentium D, 2 GB RAM, Windows XP sp2 with an ETS target Pentium 4, 256
MB RAM. I have two timed loops in a sequence, so they do not execute at
the same time. A similar sequence is on the target allowing me to make
a state machine between both computers.
The loops on the host
simply update the GUI for the user have a large period of 45-ms. This
makes the CPU usage virtually zero. Also, task manager tells me that
LabVIEW on the host only uses 200 MB of memory, so I know that the
computer is not running out of memory.
When I run the multiple
VIs, the host will randomly crash. It works about 9 times out of 10
with no crashes. Windows will tell me that it (is sorry and) has to
close LabVIEW on the host. The target side continues to run like
nothing happened. When I click on the link requesting details, I get
this information from Dr. Watson:
AppName: labview.exe
AppVer: 8.0.0.4005
ModName: lvalarms.dll
ModVer:8.0.0.6
Offset: 00001df4
I
have narrowed it down and I know that it will only crash in the two GUI
loops. Does anyone have any ideas about how to approach this problem?
-J

Recently, I have had similar problems with timed loops (LV8.0.1/W XP). According to NI's answer, this is linked to hyperthreading. Unfortunately, until now, my question if this incompatibility is a bug or not remains unanswered. Because my application is critical, I have replaced all the timed loops with while loops even if the crash didn't appear during a short test with disabled hyperthreading.
Hope this solves your problem.
Here is an extract of the exchange with JR Andrews from NI :
04/04/06
The preliminary investigation of the issue indicated that it may be due to hyperthreading (or having dual processors) and that disabling hyperthreading resolved the issue as a potential workaround. If you have the time and ability, I would be interested to know if you were seeing the issue on a hyperthreaded machine and if disabling hyperthreading does in fact resolve the issue for you. I can then pass that information on to the developer to assist them in fixing the issue.
Regards,
JR
JR Andrews | LabVIEW Real-Time & PDA Product Support Engineer | 512-683-2820
05/04/06
Even though your computers only have 1 processor, that processor may be using "Hyperthreading" to make it appear to the OS that there are 2 processors. You can check this by looking that Performance tab in the Windows Task manager or at the number of processors shown in the Device Manager. I've attached a screen shot of my system which is a single P4 processor which is hyperthreaded. Disabling the LV option for "Run with Multiple Thread" would probably not have any effect because to Timed Loops are always their own thread and that setting only applies to non-timed loop LabVIEW code. So I wanted to clarify that double check that your machine indeed does not have hyperthreading. To disable hyperthreading, you can go into the BIOS and you should be able to disable it. You can always go back and enable it again too.

Priority limits on a timed loop

Hi,
With reference to the value of priority in a timed loop, the help says that this value must be between 1 and 65,535.
Anyone know what these limits are referred?
Thanks for your time...
Solved!
Go to Solution.

amflores wrote:
Hi,
With reference to the value of priority in a timed loop, the help says that this value must be between 1 and 65,535.
Anyone know what these limits are referred?
Thanks for your time...
Timed loops run in a dedicated execution system at a priority above high priority but below "Time Critical" if there is more than one timed loop running the timed loops priority value is used to signal the OS which loop should get the larger amount of processor time. The lower the number the higher the priority requested. Some OS's even respect that number. Some do their own scheduling anyway.
Jeff

Can I run a fast timed loop?

It appears that a timed loop cannot run faster than 100 hz. In other words, the "period" input for a timed loop cannot be less than 10. Is this true? I am using the Elapsed Time VI to measure time increments. The time increments output from this VI are at least 0.01 secs regardless of how fast I attempt to run the time loop. Perhaps the limitation lies in the Elapsed Time VI, not in the Timed Loop. Should I try a different approach to measuring the delta time between iterations of a time loop? TIA.
-jlivermore

Here's the simple way to measure loop timing:
Actually, what else is running in your loop (e.g. property nodes, DAQ, etc.)? Can you show us your code? What is your LabVIEW version?
Message Edited by altenbach on 09-29-2008 11:22 AM
LabVIEW Champion . Do more with less code and in less time .
Attachments:
MeasureLoopTiming.PNG ‏7 KB

Unable to run Timed Loops

Bit of an odd one that had me scratching my head.
I have a development system consisting of a PC running a 7842R, acquiring analogue and digital data from the FPGA, loading it into a shared variable, and reading it out within a timed loop on the host as one parallel loop in a producer-consumer architecture.
All's well until one day last week when I noticed my host VI becoming unresponsive.
After a bit of digging, I find that the timed loop doesn't run at all. Replacing with a while loop with a wait at least allows me to show that the error is timed loop related, but it's not a viable long term option for me. Creating a new project and a new VI with a simple timed loop showed the same behaviour.
A restart of the system, and rerunning the same VIs, and no problems since.
So, questions:
1) Has anyone else seen this behaviour?
2) Any idea what causes it? A service crashing, for example?
3) Is there a way of recovering without a reboot? If it's a service crash, I'm hopeful.
The system will eventually form part of a production test environment, hence the query.
Edit - also, wiring error terminals of a timed loop is a good way of highlighting errors of course.
FWIW, LV2012 SP1 32bit, Win7 64bit, Core2 Duo, 4GB RAM, tassels from the handlebars etc.
CLD

The timed loop is used to read all elements from a DMA FIFO and load them into a buffer FGV, which spits out packets of N samples long once they've assembled within the FGV. Ordinarily, I'd do this with a timed while loop and be perfectly happy to do so. However, the elements are actually an interleaved array, meaning that I have to demux them in the correct order that they were loaded.
I use timed loops for a number of reasons: on my current Windows host, I've found that using a while loop has caused me more problems with respect to disordered packets, and that at least with using multiple timed loops (two, at most), I can assign priority to the acquire loop. Finally, it's also a development platform, and will be deployed onto an sbRIO once the electronics integration is finished in a week or two!
W.r.t. system resources, there's very little else running on that system, but that doesn't normally stop Windows
I recognise it's not ideal to run a software timed loop under Windows, but when you cannot run a blank project with Optimizing timed loop rate.vi from the shipped examples with nothing else running, it makes me curious to know why!
CLD

Controlling processor on the timed loop

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