Counting photomultplier TTLs per ms using the 6602
Hello all,
I have a question that seems related to Paul's (falkpl) (Or that he may know the answer to =)
http://forums.ni.com/ni/board/message?board.id=40&message.id=1883
I am trying to use the 6602 to make a histogram of continuous events in bins of 1ms.
As the subject of the post indicates, the events are TTL pulses from a photomultiplier tube. (variable frequency)
A key requirement would be to not miss any TTLs in between counts.
I've seen the timer examples and have picked up a lot from reading related posts like Pauls.
I am wondering if anyone knows the most accurate/precise way to implement this counting "setup"?
- Do I need an external gate to set the counter or is there a way I can use the 6602 to set 1ms counting bins?
- How do I ensure that the 1ms counting bins are as contigous as possible?
- I will probably need to change the timebase of counting so that it is not to fast (i.e. not counting noise) but is fast enough to satisfy the Nyquist criteria for these pulses. I am assuming this is easy.
I'm not sure if I need to use an internal or external gate to specify the beginnings and ends of the 1ms bins I'm counting with. I can also envision that I might instruct a counter to count for 1ms repeatedly, taking time only to read the counter value before starting again? I also realize that this is a frequency analysis of sorts, but I want to make sure I don't miss any pulses in between counts.
Somehow, I get the feeling this is a trivial question, as I would expect that this type of "frequency analysis" is used quite frequently.
Any ideas?
Thanks in advance,
Max
Max 90,
Sean's suggestion about buffered edge counting should work well and will be particularly handy if you want to know "at a glance" the cumulative total # of TTL pulses that have come in. You can find the pulses per 1 msec bin by doing a simple finite difference. Everything will be hw-timed, and you won't miss any pulses between bins.
Another possibility is to do buffered period measurement with the DAQmx units set to "Ticks." This would directly store the # of pulses during each 1 msec bin time.
Either way, you'll probably need to set the "Duplicate Count Prevention" property (buried down deep in the DAQmx Channel property node). I think the right setting is "True", but you can always try both True and False to see which works properly. One setting will actually store 0 values during 1 msec bins with no incoming TTL pulses, the other setting will simply ignore such intervals and only store a value during the intervals where there are 1+ pulses.
Finally a comment about your mention of "Nyquist criteria" in your original post. For most counter tasks, you wouldn't generally consider Nyquist criteria the way you would in an analog task. Consider your app: your 1 msec bins are the same as sampling at 1 kHz. However, it's apparent that you expect several TTL pulses to occur within some of those 1 msec bin times. So your signal can come in as fast as (perhaps) 5 kHz or more. If you automatically think of Nyquist, you might too quickly decide to sample at >10 kHz, which is both unnecessary and actually unhelpful for your app.
-Kevin P.
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Hello,
Here is my application: I need to use a 6602 counter/timer to generate a pulse train of certain frequency and duty cycle. On each rising edge of this pulse train, I need to output an arbitrary waveform on Ch. 0 of an niFGEN (5422) AND acquire data from CH. 0 of an niSCOPE (5124). I also need to synchronize the niFGEN and the niSCOPE to the same clock used for the pulse train (6602/ctr0). This process needs to continue until the user stops the system.
I can generate the pulse train using the 6602 just fine using ctr0, but the pulse train shows up on OUT0 by default. When setting up the niFGEN and niSCOPE to trigger on rising/positive slope edge, OUT0 is not an option for either device as a source for the digital rising edge (pulse train). The main options for both are PFI0-3 and RTSI lines.
Questions:
1.) Is there a way that I can direct the pulse train to a location (such as an RTSI line) where BOTH the niFGEN and the niSCOPE can use it as a start trigger for each rising edge? I noticed in MAX that a route can be made between ctr0's internal output and a trigger line and others. If this is a solution, could you please explain how to accomplish this?
2.) Once I configure the niFGEN and niSCOPE to be triggered on a digital rising edge, how can I effectively have this happen for every rising edge from the pulse train? In other words, can I just initiate the FGEN outside of the while loop and it will generate a waveform for each rising edge it sees at the source until the while loop is exitted?
3.) Is setting a reference clock for the niFGEN and the niSCOPE the same thing as synchronizing both devices using the same clock that generated the pulse train? It is not clear to me the difference, and why it would necessarily be useful.
Images of my current front panel and block diagram are attached. If you would rather have the actual VI's just let me know. Any help and/or explanation on this is greatly appreciated. Thanks in advance.
Attachments:
Front_Panel_Control.jpg 278 KB
Block_Diagram_Control.jpg 263 KBHello Cgifford,
Welcome to National Instruments Forums.
To output your signal to the PFI lines,
you can use external connectios between OUT0 and PFI lines. You can also use
the backplane to do so by routing into the same RTSI line.
1)
On the SCOPE and FGEN, the name of the
terminals are actually “PXI Trigger Line x/RTSIx” but on the 6602 you might
need to route the signal using the property:
You can also use the DAQmx route signal which perform the same opperation.
2)
This will depend on the frequency of
your pulse train. If this is lower than about 10 ms, then you can probably
place this on a loop and start and stop the acquisition every time. If the
frequency is higher than this, you will have to use:
- Scripting on the FGEN side (read more)
- MultiRecord Fetch (more information in the scope help file
section “Acquisition Functions Reading versus Fetching”).
3)
The short answer is yes. The longer one
might depend on how tight you need the synchronization to be (us, ns, ps). For
very tight synchronization, you should look into here.
Message Edited by Yardov on 06-18-2007 03:14 PM
Gerardo O.
RF Systems Engineering
National Instruments
Attachments:
property.JPG 7 KB -
Any ideas on how to use a 6602 to do frequency division?
Uisng traditional DAQ.
The 6602 user manual says it can do frequency division but I can not find an shipping example for this operation.
In the end I want to be able to use the 6602 to handle the interface to a quadrature encoder.
I want the 6602 to generate a sample pulse I can use for other DAQ work.
I would like to get one pulse for both transitions of both the A and B signals, or otherwise stated;
A pulse when
A goes high
B goes high
A goes low
B goes low
I was thinking if I could configure a counter (or group) to operate as a frequency divider and use each of the encoders as a clock signal AND just do a divide by "1" I would have what I was after.
Big Picture (incase it makes a difference)
A quadrature encoder is coupled to a resolver I am testing. I need to corelate the angular displacement with the measurement from the resolver. While the shaft of the encoder and resolver are spinning, I want the encoder to clock the analog input samples.
Thank you for reading,
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Ben Rayner
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First the executive summary: Sorry, No Can Do.
You won't be able to generate a sampling clock pulse on the transition to each of the 4 quadrature states. Here's a thread I was involved in where a similar question was asked. If you need to correlate in exactly that manner, you may want to pick up a quadrature decoder chip such as the 7084. It'll generate a "pulse" whose width is controlled by selection of an RC time constant during circuit build. I put "pulse" in quotes because it isn't truly a TTL signal due to the long transition time. I would recommend that you plan on adding a Schmitt trigger to square it up, perhaps another to re-invert it back to original polarity.
However, all that being said, you may be better off using an internal sampling clock to drive analog and encoder position acquisition anyway. On many encoders I've used, the transitions are NOT perfect 1/4 divisions of the cycle. You can sometimes see this on the spec sheets where the A to B relative phase is given as, say, 90 +/- 15 degrees. There will also be a tolerance on the phasing of A's rising and falling edges, maybe 180 +/- 10 degrees (it's often a little tighter than the A to B phasing).
In practice, I've typically found that these deviations tend to be systematic rather than random. Of the company's 1000 similar encoders, the phase stays within the range 90 +/- 15. With my 1 instance, the phase may be 84 +/-3 around a full rev of the encoder. The point is that if you generate pulses with the quadrature transitions, the samples still won't *really* be equally-spaced in position. They'll just think they are.
I'd suggest at least considering high-speed sampling with an internal clock that's shared by both tasks. Then do a little bit of curve-fitting / interpolation to the data when you need to derive more precision.
Re: frequency division. You have to select a specific edge (either rising-only or falling-only) as the active edge. Your counter will then ignore the other type of edge. Also, you'll need to specify the # of edges each for the idle and pulse states. These must each be >= 2. So you can't divide by 1 - the best* you can do is to divide by 4. (*Technically, you could sort-of divide by 2 if you configure the counter to pulse rather than toggle its output. However you can't control the pulse width, and as I recall it's fixed at 50 nanoseconds.) Write back if you'd like to see an example.
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Hello!
My problem appeared when I tried to update my code from Traditional NI-DAQ Legacy to DAQmx.
I am using 2 counters (counter 5 and counter 7) from PCI-6602, to generate pulse train, and also the Digital I/O lines of the port 0 (the lines form 0 to 7). What I do in my application is that I am starting to generate the pulse train on the output of the 2 counters, and after that I am playing with the state of the digital lines.
In traditional there was no problem using the counters and the digital lines in the same time, everything was going perfectly, but in DAQmx this is not possible.
What happens: I start to generate pulse train on the output of the counters, no errors encountered, but when I try to modify the state of one line of the digital port the generation of the pulse train is stopped. This is happening when I start the task associated to the digital port.
My question is: it is possible to create a channel on the digital lines without altered the channels created for the counters?
Another thing what I manage to see using the "Measurement & Automation Explorer" and Test panels for PCI-6602, basically is the same thing, I generate pulse train on the output of the counter 7 and try to start a task on the digital line, but I get one error :
"Error -200022 occurred at Test Panel
Possible Reason(s):
Measurements: Resource requested by this task has already been reserved by a different task.
Device: Dev4
Terminal: PFI8"
Instead if I use the counter 0 or counter 1 to generate pulse train I don't encounter the same problem.
Which resources are used by the counters 2 to 7 from the PCI-6602 board and the counters 0 and 1 do not use?
Thank in advance for any replies!
Ciprian
Solved!
Go to Solution.Hello Jordan, thank you for your reply.
I am sorry but I can not see or run your example, I don't use LabView, I use Visual C++ for developing.
Here is the code for generating the pulse train:
GeneratePulseTrain(unsigned long ulCount1, unsigned long ulCount2)
short nStatus = 0;
nStatus = DAQmxCreateTask("",&m_taskHandle);
nStatus = DAQmxCreateCOPulseChanTicks (m_taskHandle, "Dev4/count5", "", NULL, DAQmx_Val_Low, 0.0, ulCount1,ulCount2);
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nStatus = DAQmxSetTrigAttribute (m_taskHandle, DAQmx_ArmStartTrig_Type, DAQmx_Val_DigEdge);
nStatus = DAQmxSetTrigAttribute (m_taskHandle, DAQmx_DigEdge_ArmStartTrig_Edge, DAQmx_Val_Rising);
nStatus = DAQmxSetTrigAttribute (m_taskHandle, DAQmx_DigEdge_ArmStartTrig_Src,"Dev4/PFI17" );
//set the internal timebase
nStatus = DAQmxSetCOCtrTimebaseSrc(m_taskHandle,"Dev4/count5","20MHzTimeBase" );
nStatus = DAQmxStartTask(m_taskHandle);
return nStatus;
And the code where I try to set the digital line:
SetChannelState(short nState)
short nStatus = 0;
uInt8 wrtBuf0[1]={0};
nStatus = DAQmxCreateTask("",&m_taskHandle);
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nStatus = DAQmxCreateDOChan (m_taskHandle, "Dev4/port0/line0", "", DAQmx_Val_ChanPerLine);
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Generate a pulse train using a count from a quadrature encoder as the clock
I am trying to generate a pulse train with the same frequency as my quadrature encoder. Every time the encoder counts, I want the pulse to go high until the next count and then go low and so on. I am using a 6602 PCI card and a BNC 2121 accessory.
Maybe I'm not understanding your app, but I *think* you and I are approaching it from two very different directions.
As I understand it, you'd like to emit a pulse with each quad state change. Then that pulse would act as a counter Source signal. The counter will then increment on each pulse, to keep track of accumulated position. Further, you'd use your device-under-test (DUT) as a counter Gate signal, which would buffer the position count each time there's a rising edge on your DUT. The end result is a buffer of position values, captured at each rising edge of your DUT.
I'm talking about a different approach to produce the same data. You'd use 2 tasks on a M-series board. One of them is a hardware-timed digital input task based on "change detection." Each time one of the specified bits has a transition, your whole set of digital input bits can be captured and an internal "change detect pulse" is generated on the board. This task should be sensitive to the DUT edges.
The other task would be a buffered position measurement. It would receive the reference encoder inputs and internally do quad decode and keep a running count. The sampling clock for this task would be specified as the other task's "change detect pulse."
Net result: on each specified edge of your DUT, you'll buffer a reference encoder position value and a digital state of your DUT. You can choose to be sensitive to rising edges, falling edges, or (!!!!) both at once. You can also choose to be sensitive to many bits simultaneously. These are better capabilities than you get with the 6602 alone.
I *think* the 6220 should be ok, based on a quick overview of specs. I assume your 3.6 MHz is the rate of ref encoder quad state changes, right? In the approach I'm suggesting, you only need concern yourself with the rate of DUT edges which appear to be in the 10's of kHz or less.
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Is that also possible to use PCI-6602 be a motion controller + a counter + a frequency measurement in a same time parallely?
I don't decide yet (I don't know) which acquisition rate will be needed/required, higher is better.
(2) I'd like to apply an adaptive robust controller (yes, it is a closed loop system) under matlab with their feature called Real-Time-Workshop instead of using LV.
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Hi-
I'm using a PCI-6259 M-series board with the Nidaq MX
drivers in Labview 7. I am trying to use one counter to do
buffered edge counting (eg. count how many pulses appear on one input
in 400 successive time bins of 10 uS each following a digital start
pulse). That is, my inputs are:
Start Pulse (from experiment)
Count Pulse (from a photomultiplier tube in the experiment)
And I want to know:
# of pulses from 0 to 10 uS after the Start Pulse
# of pulses from 11 to 20 uS after the Start
Pulse (or, equally good, # of pulses from 0 to 20 uS....I can
subtract later)
# of pulses from 3991 to 4000 uS after the Start Pulse (or, # of pulses from 0 to 4000 uS...same thing)
The Count Digital Events-Buffered-Finite-Ext Clk.vi sample
appears to do half of this. I can set this up CTR0 with the Count
pulse (and possibly add the start pulse as an Arm Start....I can't use
a Start Trigger, right?). However, I need to generate a Sample
Clock Source at 100 kHz (to trigger the card to buffer the counter
value and start counting in the next bin). So, I tried to set up
CTR1 along the lines of Gen Dig Pulse Train-Finite-Dig Start.vi for
generating a finite pulse train starting on a digital trigger, and
connecting the output from CTR1 to the Sample Clock Source on
CTR0. However, I get an error -50103 saying the specified
resource is reserved if I do both at the same time. But, I can't
see any resource conflicts...the pulse generation on CTR1 works fine
alone, as well as the buffered counting on CTR0, and all the PFI pins
are different. Is there some reason I can't use both counters at
the same time?
I think I can use the FREQOUT pin on the card to generate a Sample
Clock Source at 100 kHz, since I think this is independent of CTR0
& CTR1. However, I can't trigger the FREQOUT to always start
when I get a Start Pulse (as I can if I trigger a Digital Pulse Train
to start on a digital trigger...or can I?)...so my bins will move
randomly by up to 10 uS.
This is an unrelated topic, but is there a discussion of
the relationship between the terminology in the manuals describing the
cards (SOURCE, GATE, OUTPUT terminals) and the terminology in NidaqMX
(Source Clock/SrcClk.Source, CI.CountEdges.Term, CO.Pulse.Term)?
Eg. is CTR0.GATE always the same thing as SrcClk.Source, or does it
depend on the mode of operation? If the M-series hardware manual
says to connect something to the SOURCE input, how do I assign an
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on the counter type, or is it always the same?Dave,
Hi, you brought up several questions / issues -- let me see if I can help with some of them:
I can set this up CTR0 with the Count pulse (and possibly add the start pulse as an Arm Start....I can't use a Start Trigger, right?).
Yes, you could set up this way. Also, as far as I know you're also correct that you need to configure for an "Arm Start" trigger using the DAQmx Trigger property node. The "Arm Start" trigger is used for counter input (measurement) apps while the regular "Start Trigger" can be used for counter output (pulse generation) tasks. I don't think I've experimented with recent versions of DAQmx though so it may have changed in 7.4 or 7.5
...I tried to set up CTR1 along the lines of Gen Dig Pulse Train-Finite-Dig Start.vi for generating a finite pulse train starting on a digital trigger, and connecting the output from CTR1 to the Sample Clock Source on CTR0. However, I get an error -50103 saying the specified resource is reserved if I do both at the same time
I highlighted the problem -- the FINITE pulse train. DAQmx uses CTR0 as a "helper" when you generate a finite pulse train on CTR1. It would generate a single pulse whose width corresponds to the exact amount of time needed for CTR1 to generate its specified # of pulses.
For your specific app, I think you could generate a triggered continuous pulse train with CTR1 -- this wouldn't need to use CTR0 as a helper. The Start Pulse would arm CTR0 at the same instant that CTR1 is started. If you set up CTR0 to acquire on the trailing edge of CTR1's pulses, then you'll get the time bins you want.
A final slight mod would be to setup CTR0 for measuring buffered periods (set units == "Ticks") instead of counting edges. In that mode, you wouldn't have to do the subtraction at the end.
This is an unrelated topic, but is there a discussion of the relationship between the terminology in the manuals describing the cards (SOURCE, GATE, OUTPUT terminals) and the terminology in NidaqMX (Source Clock/SrcClk.Source, CI.CountEdges.Term, CO.Pulse.Term)? Eg. is CTR0.GATE always the same thing as SrcClk.Source, or does it depend on the mode of operation?
There's an NI app note and some discussion forum hits if you search the site for "daqmx terminology."
If the M-series hardware manual says to connect something to the SOURCE input, how do I assign an alternate PFI pin to that SOURCE input in Labview? Does it depend on the counter type, or is it always the same?
Usually, that choice would be available under the DAQmx Channel property node. There'll be some place to define where the input signal is coming from, generally with "Term" or "Terminal" as part of its name. Sorry I can't be more specific as I'm not at my LV computer now.
Happy counting!
-Kevin P.
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