High Speed Streaming with Multiple FPGA FIFOs and TDMS Advanced Asynchronous (Data Ref)

Question

I am using an FPGA with adapter card (7962 with 5751) for data acquisition and signal processing. I have adapted the FlexRio example "High Throughput Streaming," which works very well for a transferring data from the FPGA via a single FIFO. This example uses the TDMS Advanced Asynchronous Write (Data Ref). The "High Throughput Streaming" example is similar to "Streaming External Data to a TDMS File (Windows)" but includes more code to prep the FIFO buffer size and TDMS size.
My question is how can I adapt this code to incorporate multiple FIFOs that write data to different channels in the TDMS file? Can I use multiple instances of  TDMS Advanced Asynchronous Write (Data Ref) in a single VI for each FIFO Acquire Read Region? If so, how do I insure that the correct data is written to the correct channel in the TDMS file?

Answer 1

Thank you DeppSu for your explanation, I will look into that.
But first, I want to be sure that the FPGA and the Hot general designs are correct, which for the moment I am not sure. So I have included my code.
I tried the Host vi several times, and it seems that it works sometimes and sometimes not, like there are some communication problems between the fpga and the host on the "read acquire region" method which is not executed. I managed to make it work randomly before, but not now. Maybe it is because of the reset that I added?
If someone could check my code and help me, I would really appreciate it since nobody in my workplace has the expertise to do so :-) If you see some obvious mistake, please share with me, I also added some comment boxes in the code with questions.
Delphine
Attachments:
thoughput.zip ‏1261 KB