I am trying to integrate simulink model (.mdl) file with SIT of Labview for RCP and HIL purpose. I am using Labview 8.6, Simulink 6.6 with RTW 6.6 and RTW embedded coder 4.6 ,Visual C Express 2008 and Visual C++ Express 2008.

I am trying to integrate simulink model (.mdl) file with SIT of Labview for RCP and HIL purpose. I am using Labview 8.6, Simulink 6.6 with RTW 6.6 and RTW embedded coder 4.6 ,Visual C Express 2008 and Visual C++ Express 2008. I have selected system target file as nidll.tlc,make command as make_rtw and template nidll_vs.tmf. When I try to generate .dll file I get the following error.
Attachments:
SITProblem.JPG ‏101 KB

Hi,
No . I could not solve the issue. Presently we are using microautobox (from Dspace)for doing the RCP.
Himadri 

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    Attachments:
    files.zip ‏77 KB

    You have two options to be able to probe this signal in the subsystem that should work fine for this small example you posted. Let me know if they also apply to your actual model.
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    Instead of probing the actual outport, you could probe the signal in the subsystem that is wired into the outport. In the case of your example that would be using_subsystem/Subsystem/Sum1:1.
    Hope this helps!
    Message Edited by Jarrod S. on 08-23-2007 10:59 AM
    Jarrod S.
    National Instruments

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