Interrupts on a NI-6602

Question

I want to get interrupt from my 6602 board, e.g. on a rising or
falling edge of an output.
I do register level programming. The RLPM does not fully describe all
related registers.
Does anyone have experience with this, or has the related
register-layout available?
I am looking for information about the:
Global Interrupt Control Register (address 0x770);
Global Interrupt Status Register (address 0x754);
Interrupt Acknowledge Register (address 0x4 for G0);
How do I specify I want an interrupt on an edge of the output, or on
an edge of the gate signal?
The Interrupt Enable Register only specifies TC (Terminal Count),
(address 0x092 for G0).
And how to acknowledge such an interrupt?
Thanks.

Answer 1

This is the answer to my own questions, it is working:
GLOBAL_INTERRUPT_STATUS_REG = 0x754, // One register on each TIO chip |size:32bit
GLOBAL_INTERRUPT_CONTROL_REG = 0x770, // One register on each TIO chip |size:32bit
enum GlobalInterruptControlRegBits
EnableInterrupts = (1 << 31), // For TIO(0) and TIO(1)
CascadeInterrupts = (1 << 29), // For TIO(0), cacade interrupts from TIO(1) through TIO(0)
INTERRUPT_ENABLE_REG = 0x92// for G0, for G1..G3 see RLPM page 3-18, 3-19
enum InterruptEnableRegBits
TCInterruptEnableG02 = (1 << 6), // for counter G0, G2, G4, G6, see RLPM page 3-18
TCInterruptEnableG13 = (1 << 9), // for counter G1, G3, G5, G7, see RLPM page 3-19
GateInterruptEnable
G02 = (1 << 8), // for counter G0, G2, G4, G6, not in RLPM
GateInterruptEnableG13 = (1 << 10), // for counter G1, G3, G5, G7, not in RLPM
STATUS_REG = 0x04 // for G0, for G1..G3 see RLPM page 3-28
enum StatusRegBits
// see RLPM page 3-28
assertsInt = (1 << 15),
TCStatus = (1 << 3), // bit03
GateIntStatus = (1 << 2), // bit02 Not in RLPM,
InterruptAckReg = 0x04, // 0x004 (G0), 0x006 (G1), 0x104 (G2), 0x106 (G3) | Write-only | size:16bit
enum InterruptAckRegBits
// Not in RLPM
GateErrorConfirm = (1 << 5),
TCErrorConfirm = (1 << 6),
TCInterruptAck = (1 << 14),
GateInterruptAck = (1 << 15),
Have fun with it.