LV7 finite pulse train on digital line.

I was wondering how I would go about creating a digital pulse train on a digital out line. I saw some example that LV7 came with but they were not too clear on what was going on, and also it involed the couter, which in my case I dont really need, Im actually controlling a stepper motor with the pulses.

Hi Weizbox,
What DAQ board will you be using to generate the digital pulse train?
Regards,
Brooks W.
National Instruments

Similar Messages

How to make a pulse train on DO line useing E-series in LV7

Im trying to make a finite TTL pulse train that I would like to put on DO-0. Ive gone over some of the VIs that have came with the program but none of them seem to do this. I dont need a starting trigger or anyhting like that. All i really need to get going is to make about a finite 1-3Khz TTL pulse width on my Digital out. Thanks a lot!

LV7 has several example VI's on how to produce a pulse train. If you are using an E series card, then you should use the GPCTR output for your application.
I am using an E-Series Card to generate finite pulses and it works fine on the CTR output.
Have a look at "Finite Pulse Train (DAQ-STC).vi" in your Example Finder.

Inverting and outputing a finite pulse train

I am using a PCI-6602 card and labview to generate 4 digital finite pulse trains (2MHz to 6MHz range) to be sent to a amplifiing circuit that will drive transducers. I have a VI based on a finite pulse train sample VI I found, but the driver requires both the signal, and the inverted version of the signal. I tired using XOR gates to do this before, but because of rise and fall times, the signals end up overlapping a slight bit, which causes a short between +V and -V supplied to the amplifier. Is there a easy way to have Labview invert my signals while having no overlap? I have access to another PCI-6602 if needed.
I tagged a jpeg of what my VI looks like at the bottom. Any help in this matter would be much appreciated.
Thanks
Attachments:
4xcount.jpg ‏67 KB

You could write out the same signals to the 4 more lines and invert the logic on those lines using a channel property node»digital output»invert lines.
Doug Farrell
Product Manager - Condition Monitoring
National Instruments
National Instruments Condition Monitoring

Finite pulse train with variable pulse widths

Greetings LabVIEW developers,
Does anyone have code that can show me how to use E-series counters to generate a finite pulse train where the individual pulse widths vary? I need to generate a series of 20 pulses with the high time for each pulse randomly varying between 50 and 1000 microseconds. The low time for each pulse needs to be constant (around 50 microseconds).
Thanks,
Ryan Wright

Ryan,
Sorry, but this isn't possible with the counter/timers. I've been wanting this capability myself for about 6 years now.
Personally, I think it's an unfortunate "hole" in product capability. The other major data acq hw allows you to capture and later replicate a signal of interest. You can capture an analog waveform with AI and later play it back with AO. You can capture a digital pattern and later play it back with timed DIO. You can capture buffered semi-periods with a counter -- but you can't play play them back later. So for your app, you'll need to generate the variable freq using timed DIO. The new M-series boards ought to work for this, or a dedicated high-speed digital board.
There's another product that I think is even better for timed DIO though and it's put out by one of NI's "Alliance partners" -- Viewpoint systems. Here's an example of why I like it. Let's say you need to generate 20 pulses within 60 seconds. The times of the pulses need to be precise to within 1 usec, and they have no common divisors. The NI method will require you to use an update rate of 1 MHz and you'll create a buffer of 60 MB to represent the digital pattern at every usec. The Viewpoint method needs a buffer of 40 entries. Each entry is a combination of a timestamp and a pattern to generate at that timestamp. That pattern will just stay there until the next defined timestamp. So all you do is define the digital pattern at the instants when one or more bits will change. It works analogously for digital input - if you capture with 1 usec resolution for 1 minute but there are only 20 pulses (40 digital transitions), you only capture the 40 relevant timestamps & patterns instead of a full 60 MB.
If interested, look for the PCI-DIO64 at Viewpoint's website.
-Kevin P.

Finite Pulse Train

Dear All,
I have an application where I am using digital finite pulses (see attached example) but I want the generation to be stopped by the user too in addition to the task completed function.
Also, when I use generate finite pulse / generate continuous pulses can I use the other counter to count the pulses.
I am using PCI 6221 & LV8.0
Regards
James
Attachments:
FINITE PULSE TRAIN.vi ‏26 KB

Hello james!
Thanks for your post. I think what you want to do instead of "wait until DAQmx task is done" just use the "is DAQmx tasks done". That way you only call the VI once in software and it either returns true or false. If you "wait" until the task is done then you program loop will not continue until the task is finished. Take a look at the following pictures that shows you how I would do it. The task will give you a warning and tell you that you have not finished generating all the pulses yet but its just a warning and the task will stop. Let me know if you have any other questions and if this helps you with your application.
Cheers!
Corby_B
http://www.ni.com/support
Attachments:
False case keep generating.JPG ‏44 KB
True case STOP program.JPG ‏43 KB

Loss of Synchronization for Finite Pulse Train generation

I have successfully generated a finite pulse train on my 6608. My program is based off an example I got from NI Zone (Square_Wave_Trigger.zip).
Unfortunately, the Finite Pulse Train loses synchronization every once in a while, and I'm not sure why. Is there anyway to prevent the loss of synchronization???
When I say loss of synchronization, here is what I mean exactly. I'm generating 4 pulses, but every once in a while, when I reprogram my equipment, I lose those 4 pulses. They seem to go out of phase or something.
I have included my code as well (Sync.txt), which is slightly different from the example code. In my code, the finite pulse train is generated by the "Sequence Gating Pulse"
and the "USIP Firing Sequence" lines of code, which are clearly marked.
Any help would be greatly appreciated. =)
Attachments:
Sync.txt ‏14 KB
TIOgenSquareWaveStartTrig.C ‏6 KB

I lose the pulse train until I reset my counters. The pulse train shifts out of phase with the main pulse. It's easier to see in the pictures below.
Attachments:
Good_Pulses.jpg ‏203 KB
Shifted_Pulses.jpg ‏220 KB

PXI 6602 - Retriggerable Finite Pulse Train Generation

Hi,
I have a VI in LV7.1 where I configure PXI 6602 to generate finite pulses whenever a trigger is received. And the Retriggerable Property is set to TRUE. I look for the task to complete in order to proceed with the other operations.. This actually works. As soon as the pulses are generated DAQmx Task Done becomes TRUE.
The same VI I upgraded to LV 2011but this time the 'DAQmx Task Done?' never becomes TRUE even after the trigger is received and pulses are generated.
Does anyone know if the 'DAQmx Task Done?' functionality is changed in higher version of LabVIEW so that it no more works as it was in LV 7.1?
Is yes, then do you know what property to use to know that the operation is done?
Any help is highly appreciated.
Thanks.

CORRECTION TO PREVIOUS POSTING THERE WAS AN ERROR IN HOW I DESCRIBED THE PROBLEM:
I have a problem using a retriggerable finite pulse train as in the NI example Retriggerable_Finite_Pulse_Train. I use ACTOUT to gate the first re-triggerable pulse control and the second pulse control generates the continuous pulse train which is gated by the first retriggerable pulse control. The ACTOUT signal is generated by an AI control which senses a crank trigger (Hall Sensor). The re-triggerable pulse train is used to modulate a fuel injector in sync with ignition timing and RPM. If the period of the ACTOUT signal changes due to a change in RPM, the pulse train is recalculated. It works OK with one hitch. Even at constant RPM, after about 15 re-triggerer pulse trains the final pulse of the train does not complete. This leaves the signal high in-between successive re-triggerer pulse trains. This incorrect high signal between re-triggerer pulse trains means that the fuel injector is incorrectly left on in-between pulse trains. This incorrect high signal goes on for about 10 pulse train events and then returns to normal. This pattern repeats. I use the ActualPeriod of the second control's continuous pulse train to ensure the pulse train ends correctly within window of the first re-triggerable pulse. This work but with time this pulse train seem to shift slightly. Is there another way to create a different type of re-triggerable pulse train that overcomes this problem?

Finite pulse train generation... how to count number of pulses?

hi guys,
this has probably been solved a hundred times but i just couldnt find it!!
i have a pulse train generation happening on my ni usb-6211... using FREQ OUT, using a divisor on this, and routing it to PFI4.
id like to update my VI so i can specify the number of pulses....
im pretty much a noob at this stuff so any help would be greatly appreciated!! thanks!
dan
Attachments:
pulse train generation.vi ‏25 KB

Hi,
No problem at all, we are here to help. What I’m going to do first is to point you to a bunch of examples for that might give you a better insight of the capabilities of the card in terms of finite pulse generation. What you should be looking at is called retriggerable pulse generation and here are some examples to look at: Retriggerable Finite Pause Trigger Digital Pulse Train Generation, Creating a Delayed, Retriggerable and Finite Pulse Generator, DAQmx - Retriggerable Pulse Train Generation - LabVIEW - CVI - ANSI C - VB.NET - C#.NET and Retriggerable Finite Pulse Train with Changing Pulse Specs.
Let me know it helps
Jaime Hoffiz
National Instruments
Product Expert
Digital Multimeters and LCR Meters

How do I generate two finite pulse trains using counters on PXI-6251

I'm trying to use Counter 0 and Counter 1 on the PXI-6251 to generate two finite pulse trains. But, I get this error: "The specified resource is reserved. The operation could not be completed as specified." See attached example.
Inside the disabled box is what I'd like to run on both counters. I stripped things down to creating the task, starting, and stopping. I then started to add things to see what my problem was. The timing VI seems to be what causes me issues but I don't know why.
My end objective is two identical pulse trains with one delayed by 5us, which I figured would be easy to do in the initial delay. I tried both in a single task and as separate tasks with no avail.
Attachments:
2_counter_outputs.vi ‏32 KB

Hi SirMutt,
Creating a finite pulse train requires
two counters. What’s really happening is that one counter is creating a
continuous pulse train while the other counter applies a finite pulse to “window”
the pulse.
What you want to do is correlated DIO. I’ve
done a search on our website for “correlated DIO” and have come up with a few
resources. Hopefully that will help you get started.
Digital Output and Pulse Generation
Performing Correlated Digital IO with an M Series Device in LabVIEW
M Series Hardware-Time DIO with Counter Clock Generation
Mark E.
Precision DC Product Support Engineer
National Instruments
Digital Multimeters (DMMs) and LCR Meters
Programmable Power Supplies and Source Measure Units

Need to unreserve a counter in a finite pulse train generation

Hi. Let´s introduce my application first: I´m trying to generate a N-pulse train with the M series PCI-6221, in order to achieve a high frequency clock for an SSI transducer. That´s why i can´t use a software generation (because of the high frequency) and i have to use a finite pulse train. Besides, I would need to use another counter for a variable and finite count (but not simultaneously). The problem is that, as i think i have understood, this finite pulse train involves the two counters working together, so I can´t programm another task with that resources.
My question is, Is there any way to do the finite pulse train generation, unreserve the counters, wait for a finite count to finish and so on?
Thanks.

Hello,
My knowledges tell me that you need two counter to generate a finite pulse train.
The first counter generates a pulsed of desired width and the second counter generates the pulse train which is gated by the pulse of the first counter (Counter 0=Pulse Generation, Counter 1=Pulse train generation).
However, the finite pulse train generation and the continuous pulse train generation seem similar. The key difference is the generation mode from continuous to finite and the use fo a DAQmx Wait Until Done vi instead of a loop to monitor user input. From a point of view of the hardware there is a difference between the two. Continuous pulse train generation requires only 1 COUNTER.
Maybe you can try with a continuous pulse train generation and with this method you have another counter to do a finite count.
Regards
DiegoM.

Delayed retriggerable finite pulse train

Hi there,
I'm trying to create a delayed retriggerable finite pulse train on a USB-6251 (2 counters). I just read an old thread on this problem and I got it to work.
However, I'm having this one small annoying issue:
I want to send a finite pulse train (3 pulses) at 1Hz
The trigger has a period of 3seconds (0.333333Hz)
My initial delay is 0.1s
This results in the following :
first 3 seconds : perfect 0.1s delay, 3 pulses at 1Hz
second 3 sec : nothing
third 3 sec : perfect 0.1s delay, 3 pulses at 1Hz
and so on
I reckon this is because the counter that is gating the continuous pulses is not finished yet with his pulse and therefore does not "see" the new rising edge of the trigger.
Is there a way I could solve this?
I know I could just use the first trigger and send 150 pulses or so at 1Hz. That's what I would do if I was very confident in the accuracy of the 3s period of the trigger, but I'm not. And since it is very important the timing is accurate after that trigger, I think I will induce to much error in the timing that way.
Any ideas?
Cheers,
Tom

Sorry for boosting this thread, but I just noticed something in the program Alan suggested : Delayed_Retriggerable_Finite_Pulse_Train.vi while checking its output on a scope:
If you set an initial delay, the pulse train actually starts after 2 times that delay time after the initial trigger. I can't seem to find where this factor 2 is coming from.

Retriggerable finite pulse train

I have a problem using a retriggerable finite pulse train as in the NI example Retriggerable_Finite_Pulse_Train. I use ACTOUT to gate the first re-triggerable pulse control and the second pulse control generates the continueous pulse train which is gated by the first retriggerable pulse control. The ACTOUT signal is generated by an AI control which senses a crank trigger (Hall Sensor). The re-triggerable pulse train is used to modulate a fuel injector in sync with ignition timing and RPM. If the period of the ACTOUT signal changes due to a change in RPM, the pulse train is recalculated. It works OK with one hitch. Even at constant RPM, after about 15 re-triggerer pulse trains the final pulse of the train does not complete. This leaves the signal high in-between successive re-triggerer pulse trains. This incorrect high signal between re-triggerer pulse trains means that the fuel injector is incorrectly left on between pulse trains, when it should be turned off. This incorrect high signal goes on for about 10 pulse train events and then returns to normal. I use the ActualPeriod of the first re-triggerable pulse to ensure the pulse train ends correctly within window of the first re-triggerable pulse, but it seem to wander. Is there another way to create a different type of re-triggerable pulse train that overcomes this problem. I may have to use a single re-triggerable pulse instead of a re-triggerable pulse train as this work correctly every time. However, multiple pulses creates a finer mist from a fuel injector and is the correct why to modulate a fuel injector. The

CORRECTION TO PREVIOUS POSTING THERE WAS AN ERROR IN HOW I DESCRIBED THE PROBLEM:
I have a problem using a retriggerable finite pulse train as in the NI example Retriggerable_Finite_Pulse_Train. I use ACTOUT to gate the first re-triggerable pulse control and the second pulse control generates the continuous pulse train which is gated by the first retriggerable pulse control. The ACTOUT signal is generated by an AI control which senses a crank trigger (Hall Sensor). The re-triggerable pulse train is used to modulate a fuel injector in sync with ignition timing and RPM. If the period of the ACTOUT signal changes due to a change in RPM, the pulse train is recalculated. It works OK with one hitch. Even at constant RPM, after about 15 re-triggerer pulse trains the final pulse of the train does not complete. This leaves the signal high in-between successive re-triggerer pulse trains. This incorrect high signal between re-triggerer pulse trains means that the fuel injector is incorrectly left on in-between pulse trains. This incorrect high signal goes on for about 10 pulse train events and then returns to normal. This pattern repeats. I use the ActualPeriod of the second control's continuous pulse train to ensure the pulse train ends correctly within window of the first re-triggerable pulse. This work but with time this pulse train seem to shift slightly. Is there another way to create a different type of re-triggerable pulse train that overcomes this problem?

What sets no.of pulses in 'finite pulse train' intermediate vi

I want to know how the 'finite pulse train' intermediate vi works. from the VI info I find that counter n generates a continuous clock pulse and is gated by a gating signal coming from counetr n-1. but when I actually run this vi, I find that the counter 2 does not generate a continuous clock pulse and the gating signal is also not used at all for this vi.
I also find that the 'no. of pulses' input does not linearly correspond to the no. of pulses but to the speed of the motor as well. ( I am using the counter to generate a clock train that is used to drive a motor). Nevertheless, when I measure the freq from the output of the counter n , I still find it be to the same as the clock freq that I input thro
ugh my program (and hence independant of step pulses). This is surprising because the speed of the motor changes at constant freq clock trian from counter n.
can anyone tell me whats going on here ?
thanks very much,
Lalitha.

Hello Filipe,
well, here's what I find when I run the vi. I am using a PC-TIO-10 board- so I have given the signals with ref to the pin outputs of this board as well.
I do not get a continuous clock pulse at the output of counter 'n' when I run the program with the gate of counter 'n' tied high all the time.
for instance, I tied gate 2 (pin 5) to high all the time and ran the program. I would have expected a continuous clock pulse to be generated at out 2 (pin 6 ). but only a finite clock pulse whose freq corresponded to the input clock freq was output at OUT 2.
then I tied gate 2 to low and repeated the run- again a finite clock pulse was obtained at OUT 2. It behaved as if the gating signal at gate 2 did not matter at all. All this was while
keeping the gate mode at 'count while high' and the pulse polarity at high (default values).
finally, I also wired out 1 (3) to gate 2 (5) and ran the vi. this is exactly the way the I/O connections should be made as per the vi info. but there was no output at OUT 2 (6) even though the gating signal was observed at OUT 1 and therfore tied to gate 2.
thus my VI is not generating a continous clock pulse at the counter 'n' OUT pin - I always get only a finite clock train and this is regardless of whether the gate of the counter 'n' is tied to high/ low/ OUT of previous counter.
why does this happen ?
thank you
Lalitha.

How do you create a finite pulse train using a FP-CTR-502?

I have recently replaced my FP-PG-522 module with a FP-CTR-502 module, to achieve higher output frequencies (FP-PG-522 max output freq is 5kHz, wheras the FP-CTR-502 max output freq is 16 kHz).
I need to be able to generate a finite pulse train. Has anybody created a finite pulse train using a FP-CTR-502 module before? I have started to look into it, but my ideas so far have been complicated (compared to doing it in a PG module).
Any tips on this would be much appreciated.
Christopher Farmer
Certified LabVIEW Architect
Certified TestStand Developer
http://wiredinsoftware.com.au
Solved!
Go to Solution.

I can answer this question myself!
The answer is in the *OLD* version (July 2000) of the operator's manual for the FP-CTR-502. For some reason, this has been removed from the latest version (June 2003).
See page 11 of this link for more information:
http://www.ni.com/pdf/manuals/322660a.pdf
Christopher Farmer
Certified LabVIEW Architect
Certified TestStand Developer
http://wiredinsoftware.com.au

How do I output a finite pulse train through multiple counters?

Hello,
I have used LabView examples to create a VI to use with my TIO 6602 that generates a finite pulse train with varying duty cycle, frequency, number of pulse, and initial delay. I can also have it output the pulses through multiple counter channels, but all the channels have the same delay, and are output at the same time. I need each channel to have a specific delay from the first one.
In my VI, I use DAQmx to create a retriggerable finite pulse train by gating a counter with another counter. I have all the neccessary controls over the pulse train, but I can not seem to find an easy way to just copy this waveform and output delayed versions of it to other channels. The delay is very important because these signals will be used to drive ultrasound transducers in a linear array, and for the waveforms to focus at one point, the signal driving the transducers with a shorter distance from the focal point need a larger delay, so that the same waveform arrives from each transducer at the same time.
Any help with how I might do this would be much appreciated.
Thanks!

Hey Sneaky,
Here's a screenshot of the code I put together on how to use multiple counters. Also, take a look here for more information on how to sync multiple counters.
Message Edited by Knights Who Say NI on 02-02-2009 10:36 AM
Message Edited by Knights Who Say NI on 02-02-2009 10:36 AM
Message Edited by Knights Who Say NI on 02-02-2009 10:38 AM
-John Sullivan
Analog Engineer
Attachments:
4xcount.jpg ‏67 KB

LV7 finite pulse train on digital line.

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