Periodic interrups disrupting waveform

Im having a little bit of a problem with an interrupt in the waveform im reading as an input.This doesn’t appear to be a typical windows based interrupt but I’m guess it caused by a mistake I made.The interrupt occurs every 7 seconds without fail, and lasts about a half second.I can post a screen capture movie if anyone wants to see it and will attach a copy of the code.
This labview program runs a loading machine (motor which runs off controlled force, not the more common position control).There is an analog output of a DAQ card (pci 6014) which determines the force driven by the motor controller.So by inputting a sinusoid into the DAQ, I can then read back a force mirroring the analog input via load cell. So after about 7 reps at 1htz, I get an interrupt in the force being read back from the load cell.It always occurs in the exact same spot of the waveform when it occurs (every 7 reps).The position of the interrupt within the waveform can however, change places in the waveform if i stop and restart the program. Changing the loading frequency will show the interrupt will just occur after twice as many reps.
There is no disruption of the plot of the signal which is controlling the waveform (sent to the D to A of pci 6014).
This is labview: 2009 32bit, patched v3
Message Edited by jimmyinct3 on 03-24-2010 06:44 PM
Solved!
Go to Solution.
Attachments:
v19.vi ‏144 KB

ok, i was able to figure this one out on my own.only took a few days.it was a simple programming mistake on my part, I didnt have a value initializing properly. so what was happening was that the sampling rate of the ADC for each single data point was different from the sampling rate of the sine generator (also generating single points)2000htz vs. 3000htz. so the time domain was misrepresented during sampling and eventually it had to cause the type of periodic disruption would occur.

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Aojha wrote:
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PS If you can help how do I Give the Duke dollers to you

http://www.google.ca/search?q=java+oval+shape+to+plot&hl=en&lr=&ie=UTF-8&oe=UTF-8&start=10&sa=N
Ask the guy who made it for more help

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Attachments:
hysteresis.vi ‏176 KB

As it turns out, the issue was that I was not collecting enough samples at a high enough sample rate from the DAQ. This is why it worked with "Generate Signals" and did not work with the DAQ Assistant. Because there were not enough samples, the apparent zero crossing was occuring either too early or too late, leading to an incorrect value. Therefore, the best solution when it comes to finding zero crossings is make sure your # of samples, and sample rate are high enough to get an accurate measurement.
As a result, this is why my XY Graph was showing blocky hysteresis loops, rather than nice smooth curve hysteresis loops. The data being sent to it was not quick enough, and therefore the XY- Graph connected the dots between the points that it was sent, yielding a truncated loop, which appeared blocky or sketchy.
On the issue of triggering, this can apparently be set within the DAQ Assistant in the "Triggering" tab; the key is chosing the correct channel to trigger from, and a reasonable trigger level. This was my problem, and this is why my Graph appeared to jitter. It was not the graph itself, but the DAQ Assistant that did not tell it the proper triggering timing.
So, in short, I solved my own problems, but I leave this as a record for those who encounter similar problems in the future.
Thanks.

My phione number has been allocated to someone els...

Well - yesterday I got a call from my sister in law saying she had phoned my home number and had been connected to a lady who said this was now her number.
I spoke to the lady in question and she stated that she had converetd from Talk Talk to BT yesterday for broadband and telephone.
I have had MY line for 10 years so can't understand why it has been 'given away' by BT.
Note that my broadband is still intact as is my broadband talk number.
Anyway I rang the helpdesk and exlplained the situation. The call centre agent is convinced that this is a 'crossed line' and has allocated the job to openreach for 8/10/10 !!! I am pretty sure that this is simply a case of mis-allocation in the exchange and am worried that the openreach engineer is a line engineer who is going to start looking for bad joints/misconnections and then when he realises there isnt one will pass nit back as not faulty and we will have to start the whole process again and I will be off the air for weeks! (months).
I have contacted them again but they insist I will need to wait for the Openreach engineer.
Anyone got any ideas how I might be able to get someone at BT to listen to my pleas .
Banz
Solved!
Go to Solution.

You are probably in for a long fight. I took out a contract with BT and a phone line was promised for the 9th August. No line materialised and every complaint to BT went nowhere. Eventually on 6th Sept, having received a bill for call on "my" number" I phoned that number and found it had been connected to another flat in the building. To cut a very long story short, it still took until 21st Sept to get the line connected and I have only just finished arguing about call charges and compensation (one BT person phoned me and told me that since they had generously waived all call charges, why did I think I was entitled to a further refund of line rental?). The flat my line was wrongly connected to (who have a contract with Sky) are still waiting reconnection because BT are blocking their line and refusing to allow Sky to reconnect (and there is more saga to that story too.....)
My advice -
1. Keep a record of name and time you speak to anyone and all other correspondence
2. Chase everything - don't assume that someone promising to help on this forum will do so.
3 Copy all emails to [email protected], [email protected], and [email protected]
4. Be very clear with BT that you intend taking this matter to mediation (the mediator for BT is OTELO) if it is not resolved to your satisfaction. You can do this if the matter is not resolved within 8 weeks
5. When the matter is resolved insist on refunds of all charges during the period and reasonable compensation. I set this at line rental + all package costs x period of disruption. Be clear that rebates and refunds are not the same as compensation. It took some arguing but in the end BT offered me around £65. A pittance compared to my actual costs in sorting this matter, but asking for all costs would have prolonged the issue and you run the risk that if you do have to take the matter to mediation OTELO may think you were unreasonable.
6. Mark correspondence "without prejudice" when you negotiate for compensation - that way you can use it to show OTELO you were being reasonable but BT cant limit your claim at a later stage to that amount.
Good luck.

Usage of generated clocks

I am very new to FPGAs , sorry, if there is a place that explains this from the beginning (book or user guide). I'll appreciate any pointers. I am trying to create a simple flip-flop, and I am using a 100MHZ clock:
My constraint file looks like this for that part:
set_property -dict { PACKAGE_PIN E3    IOSTANDARD LVCMOS33 } [get_ports { CLK100MHZ }];
create_clock -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports { CLK100MHZ }];
I want to use a clock that is divided by 2 (50MHZ) , so I looked around and there is a way to generate a clock derived from the primary one above, so I added the third line you see below to the above two lines:
set_property -dict { PACKAGE_PIN E3    IOSTANDARD LVCMOS33 } [get_ports { CLK100MHZ }];
create_clock -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports { CLK100MHZ }];
create_generated_clock -name clkdiv2 -source [get_ports CLK100MHZ] -divide_by 2 [get_pins REGA/Q];
How can I now use this clkdiv2 clock in my Verilog Design?. I am assuming I have to create an instance of REGA?
Something like this?:
module D_ff_behavior
        input D,
        input CLK100MHZ,
        output reg Q
    input wire clk_div_2; ???
    REGA REGA_FF(.D(??), .Q(clk_div_2),.C(CLK100MHZ))
    //assign LED1=CLK100MHZ;
    always @ (posedge clk_div_2)
        Q <= D;
endmodule

I was able to run a derived clock using the MMCM. I took the primary 100MHZ and obatined a 50MHZ (also re-did it for 5MHZ) and it worked. I used the Clock Wizard, which generates an MMCM with my desired characteristics, obviously I have to learn much more on the different choices, but made it to work, I downlod it (no warnings and no errors) and measured it with the oscilloscope and the clock signal measured what I set it to.
If there is something suspicious or a bad practice in this code, please let me know,
Below is the Constraint XDC File followed by the Verilog code, for the 5MHZ case (divided by 20):
# Swithch used for D
## Clock signal
set_property -dict { PACKAGE_PIN E3    IOSTANDARD LVCMOS33 } [get_ports { CLK100MHZ }];
create_clock -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports { CLK100MHZ }];
create_generated_clock -source [get_ports CLK100MHZ] -divide_by 20 [get_pins MMCM0_instance/clk_out1];
#Switche to set D of the simple D-FF
set_property -dict {PACKAGE_PIN J15 IOSTANDARD LVCMOS33} [get_ports { D }];
#LED0 to see the output of the simple D FF
set_property -dict {PACKAGE_PIN H17 IOSTANDARD LVCMOS33} [get_ports { Q }];
# LED1 used to see the output of the divided clock
set_property -dict {PACKAGE_PIN K15 IOSTANDARD LVCMOS33} [get_ports { LED1 }];
Verilog Code:
`timescale 1ps / 1ps
// Module Name: D Flip Flop
module D_ff_behavior
        input D,
        input CLK100MHZ,
        output reg Q,
        output LED1
    wire clk_div_2;
    assign LED1=clk_div_2;
    MMCM0 MMCM0_instance(.clk_in1(CLK100MHZ),.clk_out1(clk_div_2));
    always @ (posedge clk_div_2)
        Q <= D;
endmodule
I guss I still don;nt understand how are the commands in the XDC used. I mean didn't I configured the MMCM with clock Wizard?, why do I have to put the create_generated_clock _ command in the XDC file, I know there is a reason, I am just missing something, so far seems redundant info...

Is it possible to detect low frequency signals with a high sampling rate?

Hello everyone,
I'm having an issue detecting low frequency signals with a high sampling rate. Shouldn't I be able to detect the frequencies as long as the sampling rate is at least 2 times the highest frequency I will measure? The frequency range I am measuring is 5-25 Hz, and I use Extract Single Tone.vi to measure the frequency. The sampling setting I am using is 2 samples at 10 kHz. Is there a method I can use to make this work?
Attached is the vi.
Attachments:
frequencytest.vi ‏21 KB

You are sampling at 10Ks/S, but only taking two samples. What do you expect to see? If your signals are binary (On or Off) you would only see either an on or an off, or if the rise/fall time was fast and you were Extremely lucky, one of each. If you want to see a waveform you have to sample for at least the period of a waveform. So you should take samples for at least 0.2 seconds to capture an entire waveform at 5Hz, ideally longer. Think of looking at a tide change at a dock. If you want to see the entire tide change you will probably have to measure repeatedly over 24 hours, not just run out on the dock, measure the height twice and leave. That wouldn't tell you anything other than at that precise moment the tide height was X, but not that it was at high tide, low tide, in between, etc.
I type too slowly, I see that a more technical answer has been given, so mine will be the philosophical one!
Putnam
Certified LabVIEW Developer
Senior Test Engineer
Currently using LV 6.1-LabVIEW 2012, RT8.5
LabVIEW Champion

Mathscript square wave

Hello,
I am trying to figure out a problem in which I am supposed to use a MathScript Node to evaluate the given expression in the range t>=0, t<=3.
The book I'm using says to input: y(t)=(4/pi)*(sin(2*pi*t)+(sin(6*pi*t)/3)+(sin(10*pi*t)/5)+(sin(14*pi*t)/7)), and that this formula should create a square wave.
I have put in the following code:
delta_t=1/f_s
start=0
step=delta_t
stop=(N-1)*delta_t
t=start:step:stop
t>=0
t<=3
y=4*(sin(2*pi*t)+(sin(6*pi*t)/3)+(sin(10*pi*t)/5)+(sin(14*pi*t)/7))/pi
However, the result I am getting is not a square wave at all. I have attached the VI (I am using N=500 and f_s=10000).
Any ideas?
-Jill
Attachments:
Square Wave.vi ‏48 KB

Hello Jill,
Thanks for providing the code you're using- the signal you are currently seeing is because you are sampling the waveform quite fast compared to the signal frequency and you don't have a full period of the waveform to display; increasing the number of samples generated gives a waveform something like this:
Which appears to be a square wave built with a sin function as you have described. With the values you specified (N=500), you're only seeing part of that initial curve (T=0 to T=0.05, or about 1/20th of the waveform's apparent fundamental period.)
Regards,
Tom L.

Display Data on waveform chart or XY graph over a long period of time

Display Data on waveform chart or XY graph over a long period of time
Can anyone help?
I am acquiring data from an Ni DAQ card with the following parameters - sample rate = 12800, number of samples = 4096. I want to extract order information so as to track changes in the amplitudes of certain frequency harmonics. So I use the sound and vibration toolkit to extract this information as shown in the attached Vi. I will like to plot the resulting amplitudes against real-time starting at the time the Vi was run. I really want the display to show these changes over long periods (eg. days, months and even years).
Problem.
I have tried to plot the Y component of the resulting magnitude for a given order on a waveform chart. My choice of the waveform chart is because I also want to display alarm limits (using the mask and limit vi) (I can't have these lines displayed on an XY graph plot). I tried adjusting the scale offset using the property node and setting the offset to current time. However, the display on the X-axis can only show a span of 2 minutes as will be seen when you run the attached vi. I want the time display on the x-axis to be over a period of days, months and even years. Is there a way to set the maximum scale on the x-axis to be say a year or so in future.
I really want the display to be like the one in in the second attachment.
Attached is a sample VI created using an Ni USB 9234 DAQ card. Any card will do but I am only getting the signal from one channel for this example
I will appreciate any help that can be given to me.
Thanks
Attachments:
Real-Time Graph Display.vi ‏170 KB
Sampe screen1.doc ‏37 KB

Long term testing can be tricky- and we'l get into that later. Lets start with the basics that you have wrong.
The vi as you have constructed it has only one memory element, the chart history length (default is 1024.)
You can change the number of points the Chart will remember by Right-clicking the chart an select Chart History Length from the menu.
But for a long term test - and one where you want to REMEMBER the first value you need a memeory element that is independant of the application. Your PC WILL loose power or need to be rebooted eventually. Heck it might even need to be replaced! you really need to store your data in a file. Preferablly in a file that is backed-up on a regular basis so you don't lose every point of data if the PC dies. It realy hurts when you have to restart a 2yr test because you've lost the 18months of data you collected.
For an application like this I would seperate my "collection" and "Evaluation" operations.
Have one vi that takes the reading and writes it to a file at a configurable rate You may want 1reading per minute for seveal days then 1 per hour for a few weeks- then maybe only once or twice a week for the next couple of years since you are looking for LONG TERM stability. having too much data to evaluate can take a lot of digging to find the few things that interest you (but always take more that you think you need)
Have another utility that COPIES the files, reads them and displays the data you are interested in that day. The data you want to look at won't change over time HOWEVER, you WILL want to analize it in different ways depending on what the data trends look like. Having seperate routines for collection and display allows you to update the display style and analisys without even stopping the collection vi (much less editing the vi)
Jeff

Periodic interrups disrupting waveform

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