PXI-6653 DDS ClkIn reference

When I use the example with NI-SYNC called Generate DDS Clock and Route.vi and select DDS Clock Source Terminal: ClkIn, and Destination Terminal: ClkOut, the card does not generate an output clock. If I then click stop, I'm given the error message:
Error -1074118606 occured at niSync Connect Clock Terminals.vi
Driver Status: (Hex 0xBFFA4032) The specified source terminal is invalid for this operation.
If I change the DDS Clock Source Terminal to one of the other sources, I get a signal on ClkOut, but it is not phase locked to my external 10MHz reference oscillator.
How do I generate a DDS clock signal which is phase locked to an external 10MHz reference oscillator connected to ClkIn?
Thanks,
John Bosshard
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Hi John,
You need to use two LabVIEW examples for this task. Run the Check Clk10 & Route Clock.vi first to route ClkIn to the backplane PXI_Clk10. Then run the Generate DDS Clock and Route.vi to route the PXI_Clk10 to ClkOut. This will work as long as your signal meets the backplane 10MHz clock specifications.
Thank you,
Simran K
National Instruments
Applications Engineer

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Pulse modulated CW with PXI-5650 and PXI-6653

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Hi John,
From reading your post, it sounds like you want to use your timing and sync card to turn the RF output on/off, in others words, On Off Keying. OOK modulation is a built-in feature to the 5650. For more information, you can navigate in the NI RF Signal Generators Help to Devices -> NI RF Signal Generators -> NI 5650/5651/5652 Overview -> Modulation Modes, and just click on Modulation Modes.
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How can I synchronize KineticSystems V200 boards in a PXI/VXI hybrid system?

My current setup is a VXI/PXI hybrid system. I use a PC controller over a MXI-4 connection to connect to my PXI system, and use a MXI-2 connection to connect to my VXI system. I have a PXI-6653 timing card in my PXI chassis and I am routing my 10 MHz clock to my clock out.
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So after that, I attempted to run my 10 MHz clock from my PXI-6653 straigt to the CLKIN of my V200 board. I have attempted to use mode 7 for my clock selection, however it throws on OpCode error. I increased my sample rate to 200KS/s, and that got rid of my OpCode (however, I am still getting thrown an error when it attempts to calibrate). I connected a scope to the ClkOut of my V200 board, and it's sending out ~350 KHz (I believe) signal. This signal is sent out regardless of what I'm putting in the ClkIn or clock selection mode. Does anyone here have experience with the V200 boards and timing that could help me out here?
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Hi,
As this is a duplicate post, please continue here.
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NI Prototyping Community

How do I get started with PXI timing?

I'm working in a lab that is trying to start to use a National Instruments PXI/VXI hybrid system. I currently know very little about timing and triggering. Basically all I know is that the timers we are using (PXI-6653) generate a square wave at 10 MHz and I can route it to the CLK10_in. I'm able to confirm that the clock is being routed there by using some of the example VIs and using a scope to see that the square wave is being outputted through the BNC connector on the back. I can see it's not the regular PXI 10 MHz reference clock because there is a difference in 10 MHz signals between before I hit the "GO" button on the routing VI and after I hit the "GO" button. So all in all, I can confirm I'm getting the 10 MHz signal routed to the CLK10 backplane signal.
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Hello Michael,
Thanks for posting on the forums! What you are trying to do is called reference clock synchronization. This is also referred to as Phase Lock Looping (PLL) to a reference clock. You will access this reference clock with a DAQmx property node as shown below.
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You may be wondering what the Sync Pulse is for. In addition the the NI Example Finder, the NI-DAQmx Help is a great resource. Do a search for Sync Pulse, and you will find quite a bit of information about it as well as other useful things to know and consider with DSA synchronization.
Message Edited by RT4CY on 10-25-2008 03:06 PM
Rod T.
Attachments:
refclock.jpg ‏110 KB

Function control of the PXI system

Hi All!
We order NI PXI-1036DC + PXI-4462 + PXI-6682 GPS + PXI-6653 + PXI-8101.
Is it possible to control:
1. DC voltage and current?
2. GPS coordinates of the system?
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Jury

Hello Jury,
Thank you for bringing this issue to the forums.
Regarding your questions:
1. What do you want to control the DC voltage and current of? Which card exactly?
2. I am not exactly sure what you mean by controlling the GPS coordinates of the system. Can you please explain further?
3. You can find the specifications of 10 MHz clock and accuracy of the GPS on page A-5 and A-6 of the PXI-6682 GPS Manual: http://www.ni.com/pdf/manuals/372292b.pdf
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4. The +/- 1 ppm accuracy of PXI-6682 is specified in the range of 0 to 55 C.
Thank you,
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How To output the PXI-6608 OCXO to PXI_CLK10_IN

Hi!
I am trying to make high accuracy measurements with the PXI-6608.
I am using a 3rd party PXI backplane which has no StarTrigger slot that would override the PXI_CLK10 automatically with the PXI-6608 OCXO output PXI_CLK10_IN.
It appears that the PXI-6608's OCXO has no direct link to the time source of the counters but that instead the time source can "only" be PLL-synced to PXI_CLK10 signal of the backplane. Is this correct?
I tried to measure the high accuracy OCXO output on PXI_CLK10_IN but got nothing. What needs to have the PXI-6608 output its OCXO clock to PXI_CLK10_IN?
ThanXs for your help, Hezapeter

By connecting the OCXO to the PXI_CLK10_IN, you are overriding the PXI clock to make a more accurate reference clock. So anything that is using the PXI clock at a reference will become more accurate. I believe you have to set the source reference clock for the DAQmx tasks to the PXI clock in order to get this benefit.
But here's how you connect the OCXO to the PXI clock.
There are only two ways to tell somebody thanks: Kudos and Marked Solutions
Attachments:
Connect Clock.png ‏9 KB

Can we lock 80 MHz timebase to PXI_CLK10 on PXI-6220 M Series DAQ?

I am using PXI-6220 to measure Frequency/Period of 32768 Hz clock signal, accuracy is very important. I have provided signal to measure on Gate input of Ctr 0 (PFI 9). I am using 80 Mhz Timebase. I want to Lock PLL to PXI back plane 10 MHz reference (PXI_CLK10) which in turn is locked onto the 10 MHz reference via PXI-5600 on Slot 2 (External 10 Mhz standard is connected). so far I don't see a way to lock PLL to PXI_CLK10. Is that possible at all? see the image attached to this message.
Attachments:
M Series DAQ Question.png ‏62 KB

Hello Abhatti,
Based on the diagram that you have attached, the M-Series card can PLL to a higher accuracy clock such as the PXI Clock_10. The way to configure this change using the DAQmx driver is route the signals using the DAQmx Timing RefClk.Src Timing property node. Once you place down this property node, and specify the RefClk.Src attribute, you select the PXI-Clk10 as your reference clock source. This will discipline the 80 MHz Timebase of the DAQ card to the 10 MHz reference clock of the PXI chassis. Which chassis are you using? Also, how have you PLL'ed the 10 MHz backplane clock to the PXI-5600 Downconverter?
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Can't install NI-sync and others on PXI-8101RT

Hi All!
I have PXI-1036DC + PXI-8101RT + PXI-6682 + PXI-6653 + PXI-4462 + PXI-6143. I try to install NI-sync 3.3.5 and Multifunction DAQ & DSA 9.7.0 on 8101RT and obtain the message, that this components requires MIG String 2.3.0.
What is the MIG String and where can I take it?
Jury
Solved!
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Hi,
Which version of LabVIEW are you using? I noticed that NI-SYNC 3.3.5 is supported for LabVIEW versions 2009 and above.
Try to navigate to C:\Program Files (x86)\National Instruments\RT Images\NI-DAQmx, open the file nimigString.cdf with a text editor. If the version is 2.2.1 then modify it to 2.3.0.
If you are not able to find the previous file, try to install DAQmx first.
Regards,
MCOTO

PXI-1036DC S1 switch - where?

Hi All!
I have PXI-1036DC with PXI-6653 in the slot #2 (star trigger). I want to use 6653 10 MHz oscillator. As I understand , I must "manually switch S1 on the chassis backplane to enable or disable routing an external clock to peripheral slots".
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Jury

Hi!
Already find.... But it's marked as S2 (if I reed correctly)...
Jury

Grounding question using a PXI-6225 and an SCB-68 TB.

Hi all!
I'm using the configuration in the title of this post to apply signals to a test setup. The SCB-connections have an analog ground that is placed next to each of the analog outputs (i.e. AOGND, AO0, AOGND, AO1...A0GND, AO7, AOGND). I have connected an analog ground (SCB-68 pin 31) and a digital ground (SCB-68 pin 12) to the negative side of my power supply. I belive this will give me a good ground reference for all the cards as I have my other cards grounds tied to this ground as well.
I'm just curious as to why they have so many grounds for the analog signals. I can only assume that it is for EMI or susceptibility. Are those grounds there to help keep the actual waveforms shielded? If I just use the two grounds mentioned I should have a good enough reference, right? I just don't want to mess up another card because I originally set this up and was driving signals with it, but didn't have any of the grounds hooked up to the 6713 card. It worked for some time until the conditions were right and then I had some offset that occurred, which burned up my card.
Any information is appreciated as to the use/need for all these grounds!
Thanks,
DB

First of all, be sure that you are using the correct pins for each of the analog output channels of the PXI-6225. The PXI-6225 only has 2 analog outputs, and the SCB-68 is a generic connector block for 68-pin cables. I have attached the pinout for the PXI-6225 for your reference when hooking up these grounds.
After you are sure you are using the correct ground pins on the SCB-68, the grounds should be fine with that speed of signal. However, I would recommend using the individual grounds for the AO channels for continuity.
Peter E
Applications Engineer
National Instruments
Attachments:
6225 Pinout.png ‏107 KB

PXI-5600

Must PXI-5600 be installed in slot 2 of PXI-1042 to run normally? How about slot 3?
Since PXI-5600 includes onboard OCXO, then is PXI-6653 Timing Module still needed to run PXI-5600?
Thanks,

Hi yy -
The 5600 can be installed in any slot, though its digitizer has to be installed in the slot immediately to its right. (This is because the RFSA driver assumes the digitizer can be found there.)
If you're looking to drive the backplane clocks with one of these devices, the datasheets can help you determine what you need:
6653 datasheet
5661 datasheet
From these specs, we can see that the OXCO on the 6653 is more accurate. Whether your application needs this increased accuracy depends on the application itself. If you need, I can help you determine that one, too.
David Staab, CLA
Staff Systems Engineer
National Instruments

PXI_CLK10

I just added a PXI-6653 to my PXI-1011 chassis, in slot 2, and am trying to replace the native 10 MHz backplane PXI_CLK10 with the high precision OCXO one in the '6653. The objective is to provide a divided (by factors of 2) reference clock, that has the precision of the OCXO. I am running this in LV 7.1, NI-MAX 4.5 etc.
The vi attached first connects OCXO to PXI_CLK10_IN, thus replacing the native clock with this precision one. That part came from "NI-SYNC Route Clock.vi"
Then, from "NI-SYNC Generate DDS Signal, Divide and Route.vi" the DDS takes the precise PXI_CLK10 from the backplane, and brings it to CLKOUT at full frequency, as well as a lower frequency that is divided by factors of two, to the PFI0 prt.
The problem is that when I measuring the full frequency clock at CLKOUT, it has the (lack of precise) frequency of the native backplane clock, or about +/-4 to 5 ppm. I actually calibrated my fequency counter by porting the OCXO out CLKOUT with the first vi, and it is calibrated to +/- 0.5 ppm now.
Could my problem be compatibility issues with the PXI-1011 chassis? I read in another thread about someone with a PXI-1033, that had to set switch S1. I can't find any S1 or other config switches on this chassis.
Anyone had similar experiences with the PXI-6653 and older chassis?
Thanks in advance for your comments,
Kurt
Solved!
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Attachments:
My-SYNC Route OCXO To PXI_CLK1 To Control DDS, Divide and Route Rev2.vi ‏82 KB

Dr. K,
I would recommend trying to route the PXI_CLK10 directly to CLK_OUT. Using this route alone should get you the original PXI clock. If you also route the OCXO to PXI_CLK10_IN, you should now be able to verify the more accurate clock. This is eliminating the DDS from the picture. Do you see the increase in accuracy? If not, the clocs are not routing as they should and it may be a chassis problem. If you do see an increase in the clock accuracy, then the routing is working as it should and we can further esplore the DDS side of things.
Let me know what happens.
Regards,
Peter Flores
Applications Engineer

NI 4461 frequency timebase stability

According to “NI Dynamic Signal Acquisition User Manual” NI 4461 card has high-accuracy oscillator. “The oscillator feeds a DDS chip, which is used to generate the other on-board timing signals”. This signal is called the frequency timebase. My question is: Is it possible to replace this signal into another of greater stability and accuracy for example generated on NI 6653?
The second question is: How the stability and accuracy of 10 MHz signal distributed through the PXI bus influences on the stability and accuracy of the frequency timebase and the sample clock timebase generated on NI 4461 card? In my case, NI 4461 operates without synchronization to other devices.

>>Is it possible to replace this signal into another of greater stability and accuracy for example generated on NI 6653?
Yes. You can find an example on page: http://zone.ni.com/devzone/cda/epd/p/id/5059%20he%20will%20install%20NI-SYNC
>> How the stability and accuracy of 10 MHz signal distributed through the PXI bus influences on the stability and accuracy of the frequency timebase and the sample clock timebase generated on NI 4461 card?
If You are not using 10 MHz signal distributed through the PXI bus for NI 4461, it has no influense - card uses it's own clock. You can always override signal on backplane with another one - more accure (for exampel from 6653) and then use it as a reference clock for 4461.
"An NI PXI-6653 or NI PXI-6652 module in Slot 2 of a PXI chassis can
replace the native PXI 10 MHz backplane frequency reference clock
(PXI_CLK10) with the more stable and accurate output of the OCXO or
TCXO. All other PXI modules in the chassis that reference the 10 MHz
backplane clock benefit from this more accurate frequency reference.
Furthermore, the DDS chip on the NI PXI-6653 or NI PXI-6652 references
its output to the backplane clock and also takes advantage of the superior
OCXO or TCXO accuracy. The OCXO or TCXO does not automatically
replace the native 10 MHz clock; this feature must be explicitly enabled in
software. The OCXO or TCXO output also can be routed out to the
CLKOUT connector"
Hope it will help
Best regards
Barbara

How to define a trigger to start a switch scanning task

I am writing a program in LabWindows/CVI using DAQmx library which handles PXI-2567 card. I have created a new switch scanning task, by the function DAQmxSwitchCreateScanList, that uses the specified scan list. I would like to start this task synchronously with the signal generated on one of trigger line. I thing, that this is possible using DAQmxSetTrigAttribute function where I can define the trigger type to start the task. Unfortunately, it only allows setting the type of trigger but is not clear for me, how can I set the source and edge type for the signal which will start the task.
Best regards,
Miroslaw Koziol

Hi Ion,
Below I will try, most clearly as I can, present a problem which I was struggling.
I have a system that consists of 3 PXI modules: PXI-4461, PXI-6653 and PXI-2567. One digital-to-analog channel on PXI-4461 generates sinusoidal signal which supply my DUT. I need to measure 2 voltages on DUT by one analog-to-digital channel on PXI-4461 (I know that PXI-4461 has 2 analog-to-digital channels but for various reasons such an approach cannot be applied). Each of the voltages must be measured by the integer number of periods and it has to be done continuously (for example 8 periods of one voltage and 8 periods of second voltage and so on). Therefore, a DDS on PXI-6653 is used to generate the signal which frequency is integer times smaller than the frequency of the supply signal. This signal is routed through the trigger line to PXI-2567 and controls the switch which alternately joins the measured signals to the analog-to-digital channel of PXI-4461.
The signal on DA channel must be generated continuously so this task is started and does not stop until the application is closed. Moreover, the generation is started synchronously with the rising edge of the signal generated by the DDS on PXI-6653. It is easy to start this task synchronously to the signal generated by the DDS because on PXI-4461 module a specialized trigger line for analog outputs exists.
The measurements done by the AD channel on PXI-4461 are started and stopped by the user of application. The start has to be done synchronously with the DDS signal. This is also not a problem because on PXI-4461 module a specialized trigger line for analog inputs exists. Unfortunately, I do not know how to start a switch scanning task in the same moment of time when the measurement task is started. If I do not do start these two task together I do not know which voltage samples I receive in my application.
Therefore, I need to know if is it possible to assign a trigger line to start the switch scanning task and set the source and edge type for this signal.
Best regards,
Miroslaw Koziol

PXI_Clk10 synchronization

Hello,
I need to synchronize all DAQ cards within my PXI chassis with the same timebase. I managed to do it by routing 20Mhz timebase of a E-series DAQ board through the PXI_Trig7 line of the PXI bus.
It works great, but now my problem is to do the same in the case of multi-chassis configurations. I would need to connect this clock from one DAQ board of the first chassis to the second one, but this would need specific cabling and I think this way is not the most convenient.
I tried to initially synchronize all the cards on my single PXI chassis system on the 10MHz chassis clock, also known as PXI_Clk10, but I discovered this signal was not available for E-series DAQ boards : I tried to route /6040E_1/PXI_Clk10 and it produces an error.
I only saw this signal was available for M-series board or the (very expensive) PXI 6653 boards.
I do not really understand why this signal is not usable with this generation of DAQ boards, as PXI_Clk10 seems to be part of the PXI standard and multi-chassis synchronization is naturally available through BNC chain connection.
As an alternative, I perform routing of PXI_Clk10 from a M-series board in each chassis to the PXI_Trig7 to be used as timebase reference. It works well but my problem is that some of our systems do not have M-series board available...
Is there a simple way to use PXI_Clk10 for any DAQ board installed in a PXI chassis ?
Message Edité par Inpriser le 08-17-2006 04:17 AM

Thanks to all for the responses. I did figure out the problem, and some limitations with the board. After reconfiguring my VI, I found out from NI that the board cannot simultaneously have synchronized output of a digital line with the trigger based upon the analog input and unlimited, continuous acquisition at the same time. I was able to get an output pulse on PFI 1 synchronized with the trigger created by the digitized input, but only for a finite number of requested acquisitions. This still works because the requested number may be very large, and at my acquisition rate of 2000 per second, I can set it to run for several hours before the acquisition total number is reached.
Thanks again,
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PXI-6653 DDS ClkIn reference

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