PXI-7854R I/O pin state when bitfile is reloaded

PXI-7854R has Virtex5 FPGA. I use some of the FPGA pins as digital output pins, either set to high or low states. If I load another bitfile (either the same or different) then what is the expected behavior of the digital output pins?
Xilinx references indicate that it can be configured by setting HSWAPEN to enable or disable (by pull up/down). How does PXI-7854R configure HSWAPEN pin? Is this accessible to the user?

For most of the FPGA DIO pins, the default is to be an input. This is usually the safest.
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PXI-7854R: how many times can bitfile be loaded to FPGA?

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PXI-7831R http://digital.ni.com/public.nsf/allkb/91DE0C3B7740C287862574D300646369

For additional "you'll never wear it out fodder": we use Xilinx FPGAs, so their documentation will be the real source of the answer.
http://forums.xilinx.com/t5/Spartan-Family-FPGAs/How-many-times-I-can-reprogram-my-Spartan-6-device/...
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http://forums.xilinx.com/t5/Spartan-Family-FPGAs/How-many-times-can-you-re-program-a-Spartan-device/...
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Are the Digital Outputs on the 785x cards Line Driver, Open Collector, or Push-Pull Outputs?
Specifically the card I am working with is PXI-7854R.
Here is my basic question, but notice that the R-series cards are missing.
http://digital.ni.com/public.nsf/allkb/C8C2A19E31A38A24862570280075C406?OpenDocument
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Here is a write up I found doing this via DAQmx, which I of course don't use for this card.
http://digital.ni.com/public.nsf/allkb/D9B4018C3E540CE4862570F30068C0DB?OpenDocument
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The type of digital output can be manipulated through your FPGA code.
For example, you can set the "Output enable" to true, then toggle the output value between true and false to make the card source and sink accordingly.
You can achieve an open drain configuration by setting the output value to false, then toggle the "Output enable" between true and false. In the true setting, it turns on the false output and sinks current. In the false setting, the output is disabled and set to a high impedance.
You can have an active-high, high impedance low configuration by setting the output value to true and toggling "Output enable" between true and false. In this setting, the true output setting will source current when output enable is true, and when output enable is false, it will be set to a high impedance.
Attachments:
R-Series Line States.PNG ‏4 KB

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Ok, I needed to help myself and this is what I found out:
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PXI-7854R I/O pin state when bitfile is reloaded

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