Sharing of IRQ - how can i avoid it?

Hi! I'm now in a process of finding solution against my frequent motherboard power-off. My board is K9N platinum and it's not in a list of affected boards (users who in are know what i'm talking about). But i still have number of unexpected power-offs. So i used Lavalys Everest for finding any IRQ sharing and guess what i found.
Resource   Share   Device Description
IRQ 09   Shared   NVIDIA nForce Networking Controller #2
Resource   Share   Device Description
IRQ 09   Shared   Microsoft ACPI-Compliant System
Resource   Share   Device Description
IRQ 20   Shared   Standard Enhanced PCI to USB Host Controller
Resource   Share   Device Description
IRQ 20   Shared   NVIDIA nForce 590/570/550 Serial ATA Controller
Resource   Share   Device Description
IRQ 21   Shared   NVIDIA Network Bus Enumerator
Resource   Share   Device Description
IRQ 21   Shared   NVIDIA nForce 590/570/550 Serial ATA Controller
Well. SO - isn't it a source of all my problems? So whats wrong here? How can i fix it or it's notmal? My random power-offs happen during network browsing, huge file downloads from network. May be i should change some option in my BIOS? The system was installed from scratch, it's clear, fresh, etc. Someone suggest me to make a fresh installation of my system, but i'm not shure it'll help me.

Maybe I should clarify , physical was in quotes and 15 because we count in hex (IRQ's starts with 0)
The programmable interupt controller and behaviour is not that complicated really.
A PCI bus 2.x has INT A - D (4. interupt lines) connected/wired (not 16 ) to the IOAPIC controller .
Different slots may use the same line (A-D) to forwared their interupt signal to the ioapic controller , thats
where "shared" comes in.
The interupt # is sendt from a device to the controller on that line A-D wired lines , which one depends on the bios/mobo
,and in the controller it's mapped to a register in the interupt controller and get a logical id and vector .
The IOAPIC has a table of 24 64-bit registers.
IRQ highest to lowest priority normally goes 0-1-2-8-9-10-11-12-13-14-15-3-4-5-6-7.
Theesae are programmed/assigned into upto 224 vectors (0x20..0xFF) which the cpu handles , one can assign the vectors to the IRQ's in that order
and the lowes vector used gets the highest priority .
What wee see in later motherboards with IOAPIC anables is that the motherboard lets IRQ assignment program IRQ 16-23 also
in the 24 registers and assigned to a vector id.
So we end up with the following that can be utilized:
IOAPIC Int Register
Register   Vector
0                xx
1                xx
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
The IOAPIC controller again have support to route vectors to seperate cpu's not like PIC as bas mentiones.

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