T1 integer register file

Question

Need some help regarding how the T1 irf works.
From bw_r_irf.v, during a SWAP operation, apparently during 1 cycle, 8 registers need to move from the "active_window" reg to "globals" reg. If I understand correctly, "active_window" is made up of rf cells, and "globals" is made up of sram cells. To move 8 registers (8x72 bits) from one memory structure to another memory structure in 1 cycle seems to require a lot of hardware (8 read ports and 8 write ports). Could anyone explain to me how this SWAP is really accomplished? Thanks,
James
always @ (posedge clk) begin
if (swap_global_d1_vld) begin
for (i = 6'd0; i < 6'd8; i = i + 1) begin
active_pointer[6:0] = {global_tid_d1[1:0], i[4:0]};
regfile_pointer[7:0] = {1'b0, global_tid_d1[1:0], old_agp_d1[1:0], i[2:0]};
// prevent back to back swaps on same thread
if (swap_global_d2 & (global_tid_d1[1:0] == global_tid_d2[1:0])) begin
globals[regfile_pointer[6:0]] = {72{1'bx}};
end
else globals[regfile_pointer[6:0]] = active_window[active_pointer[6:0]];
end
end

Answer 1

Thanks. Finally understood some of the wordings in the megacell doc. In every register cell, there are 9 bits, 1 for active_window, 8 for architecture window. This is a very clever way of implementing the SWAP operation.