Understanding counters/pulses/timing

Hello everyone, I have slowly but surely been working on a closed looped forced controlled bioreactor for some research and have gotten stuck trying to understand how to utilize a output pulse/clock to control my stepper motor. Basically iam going to go around the timer built into my stepper motor driver (555 timer) and use an output from our SCB-68 connector block so i can control the step frequency.I have done some reading but i need some answers to a few questions since I am not an electrical engineer by any means. The heart of my question is should i be using a digital (pulse) output or analogue wave from 0-5+VThe stepper driver manual states "external clock or pulse source. Signal must remain between0-5+V" as for programming after looking through all the options "pulse train" looks to be the function i need so i can control the frequency of the pulses. (it will basically be pulsing the whole time the VI runs and the motor will only turn on/change speed for specific conditions)
Do i need to look up specs on the specific 555 timer so i know the appropriate duty cycle or other parameters?what type output do i need to use.....just specify the channel and connect it directly to the 'counter' terminal on the pulse train vi? Should i use one of the timing outputs that is specified for the card: There are two channels that are an option when I setup generate pulses using Digital out with DAQmxthe SCB-68 manual states there are several timing channels on the block (aka PFI), but states that two of them are not programmable as outputs...and that the remaining timing signals use five different dedicated outputs...there are 9 different PFIs on the SCB-68 diagram with different names next to them ie. TRIG 1, STARTSCAN....etc. Thanks in advance for any help or further explaining you can do on any of these topics….i am really close to getting this all done since I have all of the other basic programming done...but I need to be able to control step frequency through lab view.

bfleish wrote:
Hello
everyone, I have slowly but surely been working on a closed looped
forced controlled bioreactor for some research and have gotten stuck
trying to understand how to utilize a output pulse/clock to control my
stepper motor. Basically
iam going to go around the timer built into my stepper motor driver
(555 timer) and use an output from our SCB-68 connector block so i can
control the step frequency.I have done some reading but i need some answers to a few questions since I am not an electrical engineer by any means. The heart of my question is should i be using a digital (pulse) output or analogue wave from 0-5+VThe stepper driver manual states "external clock or pulse source. Signal must remain between0-5+V"
This
is going to be your standard digital out voltage. I'm assuming this is
going into a high-impedance input on your driver board/box and not
straight to the motor itself since any DAQ card that I can think of
isn't going to have the power to drive a stepper motor directly.
Do i need to look up specs on the specific 555 timer so i know the appropriate duty cycle or other parameters?
Most likely not, just shoot for a 50% duty cycle.
As
to the rest of your questions, I'm afraid that I'm still a bit in the
dark myself on a lot of those issues. I've gotten pulse-train stuff to
work before, but not often enough to know it by rote. One thing I am
aware of though is there are some pretty significant differences
between different DAQ cards and the way they handle counters and pulse
trains. The easiest way to do what you're looking to do is to use a
continuous pulse train. But your hardware has to support 'hardware
timed single point' to do this. Long story short, follow up with the
model of your DAQ card.

Similar Messages

Pulse Timing

Hi, I'm just getting back into LabView and haven't used it in a while.
I need to activate a digital output on my DAQ for a certain duration (~4ms) and am not sure on the best way to accomplish this. I am using a lot of the outputs, except I only need 1 output to be active for that duration once the user presses a "go" or "ok" button on the front panel.
I was thinking of using a while loop, but I'm not sure on the syntax and whether this is the appropriate method to use.
Any help will be appreciated!
Thanks,
Colin

Well I'm trying something new and am unsure on how it will work.
Can I do something like the attachment I posted? I'm trying to add the numeric control to the tick count when the while loop is called and compare it to the current tick count, stopping the while loop when the current surpasses the original + duration.
Secondly, with this current configuration will the while loop only be activated when the Run button is called? That's what I'm trying to go for.
One more thing, what can I input to the DAQ that will allow for it to be turned off when the while loop ends? I figured I could use a boolean, but there's only an output so I can't see how to switch to false when the timer reaches it's threshold.
Thanks in advance,
Colin
Attachments:
pulser.JPG ‏18 KB

Buffered event counting. Why can't I explicitly sequence generating the Sample Clock Pulse and reading the counters?

At irregular occasions I need to grab counts from several counters, and buffering the counts must be done simultaneously for all counters. I'm modeling my approach after zone.ni.com/devzone/cda/tut/p/id/5404 which someone kindly pointed out in an earlier thread. However, that example only uses one counter, and you can't test the synchronization with only one counter, so I am using two counters configured the same way, and they're wired to a single benchtop signal generator (for example at 300 kHz).
What I want to do, I can test in a loop with a somewhat random wait in it. I want to drive a hardware digital output line high for a few ms and then low again. The hardware line is physically connected to terminals for my timing vi's Sample Clock Source and so will cause them to buffer their counts for later reading. After I pulse this line, when I know new good buffered counts await me, I want to read both my counters. If their bufferings are simultaneous, then each counter will have counted the same number of additional counts since the last loop iteration, which I can check by subtracting the last value sitting in a shift register and then subtracting the two "additional counts" values and displaying this difference as "Diff". It should always be 0, or occasionally +1 followed immediately by -1, or else the reverse, because buffering and a count could happen practically at the same moment.
When I do this using a flat sequence to control the relative timing of these steps, so the read happens after the pulse, the counters often time out and everything dies. The lengths of time before, during, and after the pulse, and the timeout value for the read vi, and the size of the buffer and various other things, don't seem to change this, even if I make things so long I could do the counting myself holding a clipboard as my buffer. I've attached AfterPulse.vi to illustrate this. If I get 3 or 10 or so iterations before it dies, I observe Diff = 0; at least that much is good.
When I use two flat sequences running in parallel inside my test loop, one to control the pulse timing, and the other to read the counters and do things with their results, it seems to work. In fact, Diff is always 0 or very occasionally the +/- 1 sequence. But in this case there is nothing controlling the relative timing such that the counters only get read after the pulse fires, though the results seem to show that this is true. I think the reads should be indeterminate with respect to the pulses, which would be unreliable. I don't know why it's working and can't expect it to work in other environments, can I? Moreover, if I set some of the pulse timing numbers to 1 or 2 or 5 ms, timeouts start happening again, too. So I think I have a workaround that I don't understand, shouldn't work, and shouldn't be trusted. See SeparateSequence.vi for this one.
I also tried other versions of the well-defined, single sequence vi, moving the counter reads to different sequence frames so that they occur with the Sample Clock Source's rising edge, or while it is high, or with the falling edge, and they also often time out. I'll post these if anyone likes but can't post now due to the attachment limit.
Here's an odd, unexpected observation: I have to sequence the reads of the counters to occur before I use the results I read, or else many of the cycles of this combine a new count from one counter with the one-back count from the other counter, and Diff takes on values like the number of counts in a loop. I though the dataflow principle would dictate that current values would get used, but apparently not so. Sequencing the calculations to happen after the reads fixes this. Any idea why?
So, why am I not succeeding in taking proper control of the sequence of these events?
Thanks!!!
Attachments:
AfterPulse.vi ‏51 KB
InSeparateSequence.vi ‏49 KB

Kevin, thanks for all the work.
>Have you run with the little execution highlighting lightbulb on? -Yes. In versions of this where there is no enforced timing between the counter and the digital line, and there's a delay inserted before the digital line, it works. There are nearly simultaneous starts on two tracks. Execution proceeds directly along the task wire to the counter. Meanwhile, the execution along the task wire to the digital high gets delayed. Then, when the digital high fires, the counter completes its task, and execution proceeds downstream from the counter. Note, I do have to set the timeout on the counter longer, because the vi runs so slowly when it's painting its progress along the wires. If there is any timing relationship enforced between the counter and the digital transition, it doesn't work. It appears to me that to read a counter, you have to ask it for a result, then drive the line high, and then receive the result, and execution inside the counter has to be ongoing during the rising line edge.
>from what I remember, there isn't much to it. There really aren't many candidate places for trouble. A pulse is generated with DIO, then a single sample is read from each counter. -Yup, you got it. This should be trivial.
>A timeout means either that the pulse isn't generated or that the counter tasks don't receive it. - Or it could mean that the counter task must be in the middle of executing when the rising edge of the pulse arrives. Certainly the highlighted execution indicates that. Making a broken vi run by cutting the error wires that sequence the counter read relative to the pulse also seems to support that.
>Have you verified that the digital pulse happens using a scope? -Verified in some versions by running another loop watching a digital input, and lighting an indicator, or recording how many times the line goes high, etc. Also, in your vi, with highlighting, if I delete the error wire from the last digital output to the first counter to allow parallel execution, I see the counter execution start before the rising edge, and complete when the line high vi executes. Also, if I use separate loops to drive the line high and to read the counter, it works (see TwoLoops.vi or see the screenshot of the block diagram attached below so you don't need a LV box). I could go sign out a scope, but think it's obvious the line is pulsing given that all these things work.
>Wait! I think that's it! If I recall correctly, you're generating the digital pulse on port0/line0... On a 6259, the lines of port 0 are only for correlated DIO and do not map to PFI. -But I'm not using internal connections, I actually physically wired P0L1 (pin 66) to PFI0 (pin 73). It was port0/line1, by the way. And when running some of these vi's, I also physically jumper this connection to port0/line2 as an analog input to watch it. And, again, the pulse does cause the counter to operate, so it clearly connects - it just doesn't operate the way I think it is described operating.
For what it's worth, there's another mystery. Some of the docs seem to say that the pulse has to be applied to the counter gate terminal, rather than to the line associated with the sample clock source on the timing vi. I have tried combinations of counter gate and or sample clock source and concluded it seems like the sample clock source is the terminal that matters, and it's what I'm using lately, but for example the document I cited, "Buffered Event Counting", from last September, says "It uses both the source and gate of a counter for its operation. The active edges on the gate of a counter is used to latch the current count register value in a hardware register which is then transferred via Direct Memory Access...". I may go a round of trying those combinations with the latest vi's we've discussed.
Attachments:
NestedSequences.png ‏26 KB

I want to create a TTL pulse. The stepper motor I'm trying to control responds to a high to low edge, when the low pulse width is greater than 0.5 microseconds. What is the best way to go about creating a pulse like this?

I'm using the NI PCI-6025E card connected to an SCB-100 wiring peripheral. I'm programming the DAQ card using LabVIEW 6.0.2 on a win95 box.
My first attempt has yielded some surprising results.
I created a vi with a single while loop set to true. Within that while loop is a two frame sequence. Both frames use the "Write to Digital Line.vi".
The first frame sets the line in wire to false.
The second frame sets the line in wire to true.
The device channel on both frames has been set to my user defined channel nam
e -> clock.
clock --> sets the DIO0 channel to be digital write out.
Using an oscilloscope and some wires I hook ground to the SCB-100's digital ground and I hook the probe to the DIO0 channel. What I see are two different pulses alternating between one another. One has a pulse width of 5ms and the other has a pulse width of about 50ms. You seem to get a grouping of one type of pulse followed by a grouping of the other type of pulse.
Obviously this is very strange and not what I want. It is also far too slow. So I'd like to know if anyone knows how to do this properly. Remember I only need a low pulse width of 0.5 microseconds.
Thanks,
Any help or guidance would be much appreciated.
Scott

Scott,
You don't need to use a digital line to create a TTL pulse. The PCI-6025E has two onboard general purpose counters. You can use one of these counters to create a single pulse of the desired pulse width. For an example of how to program the counters on your board, refer to LabVIEW's Search Examples>>I/O Interfaces>>Counters>>Pulse Generation>>DAQ-STC based.
The advantage of using a counter over the digital line is that it allows you to control the timing of the pulse through hardware and not software. Thus, it is inherently faster, and the timing resolution is more accurate. The counter will count down an internal 20 MHz timebase to create the pulse delay and the pulse width.
For more information on the hardware capabilities of your board, you can refe
r to the User Manual online at www.ni.com/manuals.
Hope this helps.
Regards,
Erin

Timed sequence problem

hello!
I am currently working on a program that instructs a laser to lase and a PMT to read the number of counts of photons received. Attached please find the core sub VI program.
However, I do not really understand how the timed sequence works. The millisecond delay is supposed to be the delay between 2 laser pulses. Read in array is a sub vi that tells the array of PMT to read counts, and Read out array is a sub vi that reads the data from the PMT. Fire laser is a sub vi that instructs the laser to lase.
Could you kindly explain the sequence of events in this sub vi? In the main program, it is put in a big while loop, and there is a delay timer (Wait 20 ms). What would the delay between 2 laser pulse and that between 2 PMT readings?
Thank you so much for your kind help!!! Your generousity is highly appreciated!
Attachments:
FireAndReadCounts.vi ‏137 KB

Millisecond Delay specifies the delta T value from the start of the first frame to the start of the second frame (as long as it's greater than the time for the ReadCommandPMTArray VI to execute). Then the second frame (Fire Laser) will execute. After the sequence completes, ReadOutPMTArray_old will execute.

How to Generate Synchronized pulses across two separate cards on a PXI system

Hey,
I'm trying to generate three pulses from my PXI System for triggering purposes. I have two cards (PXI 6259 and PXI 6115) , each with two counter/timers on them. The 6259 has 32 bit timers, and the 6115 has 24 bit timers.
Up until now, I only needed two pulses. One was 180us long at 20 Hz, and the other is 5us at 20 Hz, starting 150us after the beginning of the first pulse. I was able to achieve this by generating both pulses on my 6115 card by triggering the shorter pulse off of the rising digital edge of the longer pulse and giving the DAQmx Counter/Timer task an initial delay of 150us.
The third pulse needs to be identical to the short pulse, only it needs to occur 20us early (130us after the start of the wide pulse). I tried to generate it using the same technique as I used when generating the short pulse, only generating the pulse and reading in the rising digital edge trigger on my 6259 card instead of the 6115.
The result was that my pulse trains were asynchronous and the pulse generated on the 6259 card was constantly shifting to the left.
This puzzled me, so I wrote up a little dummy program to test generating triggered pulses. The results were that when I generated two pulses on the same card, they were always synchronized; however when I generated pulses on separate cards, one of the pulses always shifted.
I was hoping somebody could suggest a reason that the pulses across cards are asynchronous even though I'm reading in a digital trigger and hopefully a way to rectify the situation and synchronize all of my pulses.

The problem, in a nutshell, is that the timebases on the two boards have manufacturing tolerances that will cause them to differ from one another. The accuracy error is a small fraction of a percent, but the effect on the phasing of your pulses will be cumulative. That's why you saw the one set of pulses "shifting to the left."
The solution is to make sure each board derives its pulse timing from a single common timebase. Fortunately, this is pretty easy to specify with DAQmx, just a little tricky to find. In the chain of VI's you call to configure the counter pulses, insert a DAQmx Channel property node. From memory, I *think* you should be looking under something similar to "Counter Output->General->Timebase->Timebase.Src"
Right click and create a constant or control to define the timebase source. You should get a dropdown list that includes a wide variety of choices. Among them are each of the boards' 20 MHz clocks. By default each task will use a timebase from its own board but this technique lets you route one board's timebase over the PXI backplane with that single property node setting. DAQmx does most of the dirty work behind the scenes.
-Kevin P

Database Connection Timed out

Hi,
I am new in OEM so please tell me, Which type of alert should i set to understand Database Connection Timed out in OEM 12c.

Hi ,
The Database Connection Timed out error are logged in the DB alert.log
You can set the Setting thresholds for alert log metrics in Cloud Control 12c to get alert for the same
Refer to below metalink doc for details
Database Alert log monitoring in 12c explained (Doc ID 1538482.1)
Also you can refer to below doc in case you want to generate a report for these errors
How to create a Customized Report in 12c Cloud Control for Database Alert log Errors (Doc ID 1528268.1)
Regards,
Rahul

How to create a pulse for an emitter follower circuit which will drive a dc motor

The circuit is a position control circuit. A pulse has to be created (between +12v and -12v) which would be fed into the DAQ in order to drive the emitter follower circuit (made up of 1 npn and 1 pnp transistors) if the output is positive the dc motor will drive it one way and negative the other way. could pwm be used? can any other type of pulse creation work?
Solved!
Go to Solution.

Many analog output devices are not able to produce +12 to -12 V outputs. I suggest that you consider using a digital output (from a digital port or a counter) and build the necessary level-shifting circuits to drive your emitter follower. You may also need to consider adding some dead time when both transistors are off. If the turn on time of the transistors is shorter than the turn off time then both will be on simultaneously. This produces a short circuit across the power supply. It could damage or destroy the power supply or the transistors.
Certainly PWM can be used. The digital outputs probably give you more versatility in pulse timing than you would have with analog outputs, but that depends on the type of DAQ device you are using.
Lynn

Retriggered single pulse

I am using NI-DAQmx C/C++ API. How can I set up a counter to produce a retriggerable single pulse? That is, I need to trigger an output pulse, and while the pulse is being generated, if a new trigger comes in, it resets the counter so that the pulse timing is extended.
Is that what the DAQmxSetStartTrigRetriggerable property does? I'm guessing that the ability to do this depends on the hardware being used?
Thanks!
John Weeks
WaveMetrics, Inc.
Phone (503) 620-3001
Fax (503) 620-6754
www.wavemetrics.com
Solved!
Go to Solution.

WM_John_Weeks wrote:
I need to trigger an output pulse, and while the pulse is being generated, if a new trigger comes in, it resets the counter so that the pulse timing is extended.
The need is a replacement for the (ancient) NI-DAQ API GPCTR_Set_Aplication() with ND_RETRIG_PULSE_GNR with something equivalent in NI-DAQmx.
I'm glad you clarified. ND_RETRIG_PULSE_GNR does not extend the pulse timing if an additional trigger is received during generation. From the NI-DAQ Function Reference Manual:
ND_RETRIG_PULSE_GNR: ... Any gate transitions received during the pulse generation are ignored.
With this in mind, DAQmxSetStartTrigRetriggerable is in fact what you would want to use to get the same behavior in DAQmx.
Best Regards,
John Passiak

Several paths timing failed after implementation in vivado 2014.3

Hi all,
Recently i have some paths timing failed in my design,and i try to find some methods to solve this problem,but i still cant understand how the timing constrains work.Any body can give me some advices,i'll be very grateful！
Thanks！

Hi,
I see that (in the failing path of the timing report), you have 6 logic levels. Try breaking that into less number of logic levels.
Refer to the following guide for timing closure guidelines.
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2015_2/ug906-vivado-design-analysis.pdf
Refer to page 117 for guidelines on reducing the logic levels.

Shift+control+A conflicts between FF4 and blogger: When I want to create a hyperlink, the add-on tab opens.

Blogger has long used Shift+Control+A as the keyboard command for inserting hyperlinks. Now that I've switched to FF4, I discover that it's also the command for opening the add-ons tab. I can still create a hyperlink but every time I do, I have to close the add-on tab. This is a nuisance when writing a link-heavy post. Since I blog regularly on several different Blogger pages, the annoyance factor is growing regularly.
I checked the Keyboard Shortcuts page and read, "Firefox does not provide any method of customizing keyboard shortcuts." Is this absolute? If so, I suggest deleting or changing the FF4 hotkey since Blogger has years of precedence with this command.

Scott,
You don't need to use a digital line to create a TTL pulse. The PCI-6025E has two onboard general purpose counters. You can use one of these counters to create a single pulse of the desired pulse width. For an example of how to program the counters on your board, refer to LabVIEW's Search Examples>>I/O Interfaces>>Counters>>Pulse Generation>>DAQ-STC based.
The advantage of using a counter over the digital line is that it allows you to control the timing of the pulse through hardware and not software. Thus, it is inherently faster, and the timing resolution is more accurate. The counter will count down an internal 20 MHz timebase to create the pulse delay and the pulse width.
For more information on the hardware capabilities of your board, you can refe
r to the User Manual online at www.ni.com/manuals.
Hope this helps.
Regards,
Erin

Using and configuring the BNC 2121

Hi,
We have recently bought a BNC 2121 from National Instruments. We would like to set-up and use the eight plugs on the board as counters and in order to do measures in a test. We have tried to use the example code included in the NI-DAQ directory, the file "TIOEventCountwithPrescaling.C", but when we run this program it only enables the counting if the port corresponds to a source (in other words, it only works for the PIF 39 or 35, which are both of type SRC). On the other hand, we know that we should be able to do what we pretend because we have done the test with the Measurement & Automation software. It's only that we need to do the same with a C code on Lab/Windows CVI. We have checked the help files and the rest of the examples, but we
simply can't make the functions to change the behaviour of the board's plugs (apparently it is all set by default).
Thank you very much for your help.

Hi m.alcocer,
First of all the BNC-2121 is a terminal bloc that works with E,M,S series DataAcquisition boards. The number of counter Task that you can implement depends on the type of board you are using. Know that you can find examples in direct relationship with your hardware. Since the search for examples in the hardware section, select your hardware and after this select an example in "Hardware input and output - DAQmx - Counter Measurements"; these examples are very helpfull to understand counters measurement.
What kind of DAQ boards do you use, M, E, S series, which reference?
Best regards,
Rémi D.
National Instruments France
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>> Les rencontres techniques de NI - Mesures et acquisition de données : de la théorie à la mise en ...

Current DDR Clock

Greetings - My Fellow MSI users!!
This is my first post and I'd like to welcome myself... Thank you, thank you!!
I must start off with saying that I've built a number of rigs before, but to date I'm having the most fun with this one (see specs in sig). This forum has provided me with a wealth of info and for that I thank you all for your input - VERY HELPFUL!
OK, now that's off my chest - here's my question -
Under the Cell Menu -
Where it lists Current CPU Clock and Current DDR Clock -
My Current DDR Clock lists 200 - Is this correct when I'm running Kingston KHX3200AK2/512 (2x256). I've up the voltages for the ram to 2.60v (as kingston indicated)... I cannot get the timing correct however... everytime I try to adjust, NO boot! This is true whether the the RAM is in slots 1&2 or 1&3. Is this a setting that can be/should be changed somewhere?
It seems pretty stable overall, but I keep thinking this thing should by flying right now!
Thanks
The specs incase the sig does not show up...
MSI K8N NEO2 Plat -
Athlon 64 3500+
Rosewill FX5200 256MB
Aspire 500W PSU
Seagate 80GB Sata
Kingston KHX3200AK2/512 (2x256

Currently the settings are all on "Auto"
Kingston recommends 2-3-2-6-1
However when I try to enter those timings, by the time I get to the last entry "Row Precharge" there is no entry for #1 (only 2-6) and the one prior is "Min Ras#) is 5-15.
I've realized I need a better understanding of the timing settings because it seems really blurry right now.
I'll would like to give the your suggested timings a try, but clarify that 8 (in your 3-3-3-8) would be the selection for "Row Precharge" or "Min Ras#".... I'm thinking the latter of the 2 mentioned because "Row Precharge" only offers 2-6.
Thanks in advance!

Trying to find the highest possible MTU

Hello,
I try to find out, wich is the highest possible MTU. So I send a PING -L XXXX -F to the Pix outside, from outside. XXXX is standing for the bytes.
PING xxx.xxx.xxx.xxx -L 992 (and lower) -F
I got a reply
PING xxx.xxx.xxx.xxx -L 993 (up to1472) -F
the ping timed out
PING xxx.xxx.xxx.xxx -L 1473 (and higher) -F
Fragmentation is needed
I don't understand, why it timed out between 993 an 1472.
If i try the same to a router (same internet connection), the ping works up to 1472, with no time out. Upeer 1472 I get the fragmentation message.
Have enyone an answer?
Thomas

My problem occurs also without any encryption. I'm connected to the internet and send a ping to the outside interface of the PIX. First a thought it is a problem with the router from the ISP, but we have also a CISCO 1605 connected to the same ISP router and there the ping work realy fine until 1472 bytes the I get the message fragmentition needed.
If I'm connected via the VPN Client 3.51 and send a ping to inside, I get the same results, but additional on the PIX, if debug ipsec is on, a message like this: IPSEC(ipsec_cipher_handler): ERR: bad pkt 10.1.80.3->10.1.1.1
I searched in the errordecoder from Cisco, but there are no results.
By the way, the pre-fragmentation is by default on and I didn't switch it off. It occurs not in IPSEC transfermode, which I'm using.

FAX through PBX connected to Router

I do implementation in which PBXs are connected to Cisco routers using E&M ports at several sites. A FAX machine is connected to an extension on the PBX needs to communicate with another FAX machine connected to the PBX at another site. The settings of the E&M ports are here:
voice-port 0/0/0
trunk-group e&m
type 5
dial-type pulse
timing wait-wink 800
description E&M-PBX
A voip dial-peers are configured for the destination router.
dial-peer voice 95 voip
destination-pattern 95..
session target ipv4:192.168.125.2
I tried some chnages but it did not work. I will try to configure the codec to G711 and no VAD and no EC on all ports and test it. But it will cost bandwidth.
Do anyone have another solution?

Thank you Paolo
I configured fax protocol pass-through under the service level and it worked. I wait the feedback from the customer if any problems arise.
voice service voip
fax protocol pass-through g711ulaw

Understanding counters/pulses/timing

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