Creating multiple tasks in labview fpga

Hi,
I need to create multiple tasks in labview fpga....I need to set one update period in each task so that i can make my while loop run at this rate everytime my input frequency changes....How do i do this?

Hi,
just to be sure: You are talking about multiple tasks on the FPGA to acquire data? Or do you want to have multiple tasks on the host to display the data?

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Create Multiple tasks for Single Item in List using state machine workflow in sharepoint

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I want to create multiple create tasks for Single Item in List based on Assigned to column using state machine Workflow through visual studio
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Hi,
According to your post, my understanding is that you wanted to allow multiple users to approve.
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http://www.codeproject.com/Articles/477849/Create-Parallel-Task-in-State-Machine-Workflow-in
http://msdn.microsoft.com/en-us/library/office/hh128697(v=office.14).aspx
http://social.technet.microsoft.com/Forums/office/en-US/b16ee858-4360-479a-a686-4ee35b7be9db/sharepoint-2010-workflow-creating-multiple-tasks?forum=sharepointdevelopmentprevious
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Jason Guo
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I would like to create one task which has
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Refer to the following steps:
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       1.1
Create Site Collection
       1.2 Activate SharePoint Server Enterprise Site Collection Features.
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Creating multiple tasks

I am using the CVI plug-in for MSVC. My application requires that I toggle a set of digital lines based on a user's input. For a variety of reasons I would like to initialize my DAQ task handles at the start of the program so that when I need to toggle the lines I just call Run and Stop.
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UGH! Cut and paste got me. Stupid syntax error. I can do what I wanted to do.

Create multiple Task Instance from one Task Instance

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We have a process, where user can request for
multiple resources(access) in one single
request.Currently user has to wait until all the
resource requests are approved by application owners
to start the provisioning process.
I am thinking of splitting that one request(task)
into multiple task, based on the number of resources
requested.so that, if one resource request is
approved user can get that particular access.
My question :
1.How will I split the one task into multiple task
and pass the required information to child task?
2.How do I handle views?Currently since its one task
, we checkout and check-in the same view.
3.How will I overcome the possibility of one view
overwritten by the other.
Thanks.Hi,
yes u can split one task into multiple task means as ur requirment diffrent task for different resource. so u have to write diffrent W/F for each resource and call them by setting a counter for number of resource.
the below code help u.
<Variable name='index'>
          <i>0</i>
     </Variable>
<Activity id='1' name='createNewTask'>
          <Action id='0' name='createView' application='com.waveset.session.WorkflowServices'>
               <Argument name='op' value='createView'/>
               <Argument name='type' value='Process'/>
               <Argument name='viewId' value='Process'/>
               <Argument name='taskName'>
                         <s>give any name to the task</s>
               </Argument>
               <Argument name='process'>
                         <s>task name that u want to launch</s>
               </Argument>
               <Argument name='accountId' value='$(accountId)'/>
               </Action>
               <Action id='1' application='com.waveset.session.WorkflowServices'>
               <Argument name='op' value='checkinView'/>
               <Argument name='view'>
                    <ref>view</ref>
               </Argument>
               </Action>
               <Action id='2'>
                    <set name='view'>
                    <null/>
                    </set>
               </Action>
               <Transition to='incrementIndex'/>
</Activity>
     <Activity id='2' name='incrementIndex'>
          <Action id='0'>
               <set name='index'>
                    <add>
                         <ref>index</ref>
                         <i>1</i>
                    </add>
               </set>
          </Action>
          <Transition to='createNewTask'>
               <lt>
                    <ref>index</ref>
                    <ref>length</ref>
               </lt>
          </Transition>
          <Transition to='end'/>
     </Activity>

Procedure to create multiple tasks

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Thank you for your help.

I am actually not asking the same question as before. Previously, I was having problems using a LabView-created task in MAX. Now I am attempting to create a task in LabView and bring it back into LabView on a separate VI. I have found the answer, though.
https://decibel.ni.com/content/docs/DOC-15842
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LabVIEW FPGA: Multiple SCTL versus one SCTL (same clock domain)

Hello NI forums,
Question:
See the attached picture from a modified version of the LabVIEW DRAM FIFO example. It probably explains my question more effectively than the paragraphs below.
What is the difference to the LabVIEW / Xilinx compiliers, if any, between placing two independent branches of code in the same SCTL, versus placing them in individual SCTLs (in the same clock domain)?
Misc. comments:
I have briefly experimented with this concept using the included LabVIEW DRAM FIFO example (example finder >> Hardware Input and Output >> FlexRIO >> External Memory >> Simple External Memory FIFO.lvproj).
I compiled the default example (the read and write interfaces are in separate 40MHz SCTLs) five separate times. Then I put the read and write interfaces in the same 40MHz SCTL and compiled another five times. The result (when both read and write interfaces were in the same SCTL) was a reduction in resource usage (according to the compilation summary).
However, due to my lack of knowledge I'm hesitant to conclude that placing everything in one SCTL is always the best option. For example, I do not know what is created 'behind the scenes' with each SCTL. Perhaps putting independent branches of code in separate SCTLs makes it possible to route clock, reset, implicit enable, etc. signals more effectively.
Background information:
My task involves acquiring 2 channels of analog data using the NI 5772 and PXIe-7966. Data acquisition takes place in a 200MHz SCTL, and downstream processing is performed in a 100MHz SCTL.
During a vast majority of the 100MHz SCTL processing stages of the FPGA VI, the 2 channels of data do not interact with eachother. So it would be easy for me to place them in separate 100MHz loops if doing so would somehow help the design (timing, resource usage, etc.).
Thanks!
Attachments:
question.png ‏76 KB

Intaris
Trusted Enthusiast
Posts: 3,264
Re: LabVIEW FPGA: Multiple SCTL versus one SCTL (same clock domain)
‎10-28-2014 12:11 PM
Just out of interest, what is the resource usage differential between the two versions?
In response to the above comment,
This is a little embarrassing, but it seems like the resource usage is similar than I initially thought for this particular example. I think the previous compilations that I based my assumption on coincidentally used more resources in the 2-SCTL loop case. I just compiled each version two additional times (see below).
Here's the version with everything in one loop:
Device Utilization
Total Slices: 17.6% (2587 out of 14720)
Slice Registers: 9.5% (5583 out of 58880)
Slice LUTs: 8.2% (4855 out of 58880)
DSP48s: 0.0% (0 out of 640)
Block RAMs: 2.5% (6 out of 244)
Device Utilization
Total Slices: 16.9% (2493 out of 14720)
Slice Registers: 9.5% (5583 out of 58880)
Slice LUTs: 8.3% (4858 out of 58880)
DSP48s: 0.0% (0 out of 640)
Block RAMs: 2.5% (6 out of 244)
Here's the version with the read and write in separate loops:
Device Utilization
Total Slices: 16.4% (2407 out of 14720)
Slice Registers: 9.5% (5583 out of 58880)
Slice LUTs: 8.2% (4852 out of 58880)
DSP48s: 0.0% (0 out of 640)
Block RAMs: 2.5% (6 out of 244)
Device Utilization
Total Slices: 19.4% (2859 out of 14720)
Slice Registers: 9.5% (5583 out of 58880)
Slice LUTs: 8.3% (4859 out of 58880)
DSP48s: 0.0% (0 out of 640)
Block RAMs: 2.5% (6 out of 244)

Creating multiple instances of a class in LabVIEW object-oriented programming

How do you create multiple instances of a class in a loop? Or am I thinking about this all wrong?
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First of all, let's get your terminology correct. You are not creating multiple instances of a class. You are creating Objects of the class.
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LabVIEW FPGA Module Error Code 10 when creating bitfile

I am recieving the following error message when trying to compile a vi:
Internal Error
An internal LabVIEW FPGA Module error occurred at the following stage: Creating Bitfile.
Error Code: 10
Error Text: Create Folder in nirviRecursiveCreateFolder.vi-
>nirviRecursiveOpenFile.vi->nirviWriteBitFileInformation.vi-
>nirviCompileDownload.vi->hardware_template.vi
If this problem persists, please contact National Instruments.
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Arkolbus-
It sounds like the compiler is having some trouble creating a folder that it needs to generate the bitfile. First, check all of the usual things: are you an administrator? do you have worte access to the "FPGA Bitfiles" folder in your project?
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There is no hardware device connected. Its just simulation.
Solved!
Go to Solution.

Here's a driver we use. The design intent is to make sure the software provides the tasks that we need so it's not dependant on resources already existing.
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Attachments:
DAQDIO_InitializePorts.vi ‏34 KB

How to create multiple physical channels using DAQmx?

Hi, I am new to Labview.
Can anyone please help me on how to create multiple physical channels? I am following the LabVIEW examples in the NI example finder but they are only for acquiring signals from one channel.
Actually, I am using the channels of an SCXI 1520 to measure voltage signals. And one more thing, in the NI Example Finder, they are sample codes there for setting the filter in SCXI 114x.
Will this example work with an SCXI 1520, too?
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s
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Hi Ragu,
That's really quick turn around. Unfortunately not able to found whatever you mentioned in your message. Here is detail,
I navigate to Actions - Depending on Status, found the entry as
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SDHF             SDHFHEAD   E0002            10       CREATE_HF
SDHF             SDHFHEAD   E0002            20       CREATE_REQ
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Any other place need to make change.
Thanks
Ava

Mx-DAQ multiple tasks

Hello,
Im using LV7.1 with NI-Daq 7.4.
in my Application i use multiple tasks, a few for aquiring analog and digital input from my first 6024E and one to aquire digital input from my second 6024E.
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For syncroniziation of these cards i use the same MX-DAQ clock source.
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I'm guessing that the reason that you only see this sometimes is that it is a race condition between the read call and task creation. I've seen this problem before and the cause is usually that you are trying to read before your task is created. This can be caused by using an asynchronous process to create your channels/tasks apart from doing your multi-channel reads. To eliminate this problem I suggest you write your application in such a way that you create all of your tasks first, before trying to read from any of them. The easiest way to do this is to wire up your create task VI's in order before your reads, as these VI's will block until they complete task creation.
Hope this helps,
DB

Creating multiple tasks in labview fpga

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