DDR3 Memory on NetFPGA (Timing error)

Hi,
I am using NetFPGA 1G-CML Board (Kintex 7 is used as FPGA).
I cloned NetFPGA-1G-CML-live projects from Github(https://github.com/NetFPGA/NetFPGA-1G-CML-live), and tried to add 7 series MIG core to reference_switch_nf1_cml project.
But after PAR running, I got following timing error...
and,
7 constraints not met.
INFO:Timing:2761 - N/A entries in the Constraints List may indicate that the
   constraint is not analyzed due to the following: No paths covered by this
   constraint; Other constraints intersect with this constraint; or This
   constraint was disabled by a Path Tracing Control. Please run the Timespec
   Interaction Report (TSI) via command line (trce tsi) or Timing Analyzer GUI.
Generating Pad Report.
1 signals are not completely routed. See the system.unroutes file for a list of all unrouted signals.
WARNING:Par:100 - Design is not completely routed. There are 1 signals that are not
   completely routed in this design. See the "system.unroutes" file for a list of
   all unrouted signals. Check for other warnings in your PAR report that might
   indicate why these nets are unroutable. These nets can also be evaluated
   in FPGA Editor by selecting "Unrouted Nets" in the List Window.
WARNING:Par:283 - There are 393 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
Total REAL time to PAR completion: 5 mins 3 secs
Total CPU time to PAR completion: 5 mins 16 secs
Peak Memory Usage:  2612 MB
Placer: Placement generated during map.
Routing: Completed - errors found.
Timing: Completed - 724 errors found.
Number of error messages: 0
Number of warning messages: 400
Number of info messages: 1
Writing design to file system.ncd
PAR done!
ERROR:Xflow - Program par returned error code 30. Aborting flow execution...
Done!
I attached my ucf file and mhs file.
How can I solve this error?
Thanks.

Hi 
The net which is failing to route is from MMCM to IDELAYCTRL. The MMCM is placed in X1Y2 clock region and the IDELAYCTRL is placed in X0Y4 clock region hence the router fails. Please insert a BUFG in between MMCM and IDELAYCTRL instances. Adding a snapshot of failing net.
Thanks,
Deepika.

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