Encoder Sample Clock Source
I apologize as I know there have been several threads in the past addressing it - but I don't see a head on answer. I have anlog data acquistion of a couple of channels and 2 position encoders that are being measured on a PXI-6608 card. The analog data acquition happens continously at 1kHz. My main loop is set to 50ms timing - so each sample grab from the analog card contains 50 samples. I want to get position measurements from the encoders synchronized at the same time; so 50 samples of psotion on each encoder aligned to the analog acq channels. How do I map the sample clock over from the analog card to the 6608 encoder card?
Attachments:
untitled.PNG 240 KB
Example VI is attached (v8.5.1). Any ideas?
Attachments:
cutforNI.vi 149 KB
Similar Messages
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Err. -200303: External sample clock source...
Dear Readers
I'm using Ni-DAQmx 8 and have a PCIe-6259 card.
I wrote the following code (in VC++ 6).
int main(int argc, char* argv[])
int32 error=0;
TaskHandle taskHandle=0;
uInt8 data[10]={1,2,4,8,16,32,64,128,256,0xFFFFFFFF};
char errBuff[2048]={'\0'};
(error = DAQmxCreateTask("",&taskHandle));
(error = DAQmxCreateDOChan(taskHandle,"Dev1/port0","",DAQmx_Val_ChanForAllLines));
(error = DAQmxCfgSampClkTiming(taskHandle,NULL,1000.0,DAQmx_Val_Rising,DAQmx_Val_ContSamps,1000));
error = DAQmxWriteRaw(taskHandle, 10, true, 10.0, data, NULL, NULL);
if( DAQmxFailed(error) )
DAQmxGetExtendedErrorInfo(errBuff,2048);
ERROR: -200303: External sample clock source must be specified for this application
error = DAQmxStartTask(taskHandle);
I See no output on the oscilloscope.
I tried to put in several values for ClockSource in DAQmxCfgSampClkTiming like Dev1/PFI0, .... - but it never worked.
Could anyone please help me?
Thanks...
PascalHi Robert
Do yo mean something like this:
int main(int argc, char* argv[])
int32 error=0;
TaskHandle digiTaskHandle = 0;
TaskHandle aiTaskHandle = 0;
uInt32 data[10]={0xFFFFFFFF,2,4,8,16,32,64,128,256,0xFFFFFFFF};
float64 dummyBuffer[10];
char errBuff[4096]={'\0'};
error = DAQmxCreateTask("",&digiTaskHandle);
error = DAQmxCreateTask("",&aiTaskHandle);
error = DAQmxCreateDOChan(digiTaskHandle,"Dev1/port0","",DAQmx_Val_ChanForAllLines);
error = DAQmxCreateAIVoltageChan(aiTaskHandle, "Dev1/ai0", "", DAQmx_Val_RSE, -5.0, 5.0, DAQmx_Val_Volts, "");
error = DAQmxCfgSampClkTiming(aiTaskHandle, "/Dev1/ai/SampleClock", 1000.0, DAQmx_Val_Rising, DAQmx_Val_ContSamps, 1000);
error = DAQmxCfgSampClkTiming(digiTaskHandle,"/Dev1/ai/SampleClock" ,1000.0,DAQmx_Val_Rising,DAQmx_Val_ContSamps,1000);
error = DAQmxStartTask(aiTaskHandle);
ERROR:
"An attempt has been made to perform a route when the source and the destination are the same terminal.
In many cases, such as when configuring an external clock or a counter source, you must select a PFI, PXI Trigger, or RTSI line as the sou"
// error = DAQmxReadAnalogF64(aiTaskHandle, 10, 20.0, DAQmx_Val_GroupByChannel, dummyBuffer, 10, NULL, NULL);
if( DAQmxFailed(error) )
DAQmxGetExtendedErrorInfo(errBuff,4096);
error = DAQmxWriteRaw(digiTaskHandle, 10, true, 10.0, data, NULL, NULL);
//error = DAQmxStartTask(aiTaskHandle);
if( DAQmxFailed(error) )
DAQmxGetExtendedErrorInfo(errBuff,2048);
return 0;
Could you please explain me how to do it right?
Pascal -
Max. rate for sample clock source
Hi,
thinking of a future application for digital event counting (similar to
the Count Digital Events-Buffered-Continuous-Ext Clk example ) we have
two questions:
What's the maximum rate applicable to the sample clock source
terminal (in our case the external signal has rates up to 500kHz)?
Why needs the sample clock rate to be specified as the signals at the
source terminal determine when a sample is written to the buffer?
Thanks a lot for any answer!Hi Werner
For rates about 500kHz it must be work and you need the sample clock rate because you can also choose other rates to read the buffer.
regards
Manuel -
Sample clock source through RTSI
Hello,
I have a short question on a sample clock source through RTSI.
In my setup, two PCI cards (PCI-6602 (dev2) and PCI-6110 (dev1)) are connected through a RTSI cable.
I'd like to generate a sample clock source on 6110 and use it on 6602 to count external input pulses.
In MAX test panel, I checked a counter was reading the external signals.
However, the attached vi do not work and count at all, then give an error of 200284.
Could you tell me what is wrong?
I guess something is not right on routing the clock signal. Do I need to use DAXmx connect terminals vi instead of external signal?
How can I check the two devices are connected properly through a RTSI cable?
I registered the cable and connected the devices on MAX without any issues. Is that enough?
Thank you for your kind suggesion and comments.
Solved!
Go to Solution.
Attachments:
block.jpg 108 KB
front.jpg 86 KBHi Sugar7,
There are some more simple ways of using the hardware clock on the 6110 as the timebase of the 6602. I have attached a code that shows how the timing property node can be used to set the timebase of the 6602 task. The attached screen shot also shows this property node. Using this property node, you will no longer need the counter output task from the 6110, so the only task line will be the counter acquire task.
The other change that you might consider is changing the sample mode of the sample clock to finite samples as you seem to be acquiring a finite number of samples before the task ends. If you would like the code to continue acquiring data points, then you may want to utilize a while loop around the read operation.
Ben R.
Modular Instruments Product Marketing Engineer
National Instruments
Attachments:
RTSI Clock Reference.png 124 KB
Timebase node.png 3 KB -
Digital Out Sample Clock Sources
Hey guys,
I am putting together an application <attached>.
Currently I have the ai/sampleclock wired to its timing VI. When I run this with highlighting on, it just goes to the read for the digital in task and waits there like it has not yet acquired enough samples. Am I right in thinking that this should result in an array of integers 2000 elements long with 1's where the line is high and 0's where the line is low?
When I swapped the clock source to being di/sampleclock I get something about my device not supporting it.
This is my first adventure into digital in, anybody have a quick hint?
Thanks,
~milq
p.s. LV 8.2 - PCI 6289
Attachments:
Wobble Test.vi 63 KBFirst - how are you doing a difference of 2 quad encoders? Are you taking the A channel from each of 2 different encoders running at the same nominal pulse rate? I'm away from my LV PC and can't go back and look now. I've done that kind of thing before, where you configure for up/down counting and you get a measure of relative lead and lag.
Second - all the stuff I did was at home while procrastinating and is fully untested. Don't trust it to do what I said it should without testing.
Third - does it make sense to save data continuously like I tried to do for you? I've developed a rule of thumb that says, "when in doubt, store to file and defer the decision-making." The reason I goofed with the # of samples acquired & displayed was that I pictured you updating a graph representing <something> through exactly 1 engine cycle. Seemed like updating it a couple times a second would be enough.
Since this is your thread and you asked, here's the scoop on Audacity: I actually grunted through that stuff several months back. I probably did use the envelope tool, but I think I ended up applying it piecewise in several little pieces through the fade region. I couldn't make the envelope curves apply just the right shape to keep the volume constant across the fade.
It was interesting in a weird way. I'd have thought going in that nothing could be easier to mix imperceptibly than noise. It turned out that the clicks you get with no fade and the volume artifacts coming from linear fade make noise especially *difficult* to mix.
At some stage I think I mixed in some pure noise and then applied some filtering to cut out high freq hiss. I also added some low freq amplitude modulation and some low freq Left<-->Right panning. In the order of <0.1 Hz, with the two effects at frequencies without common multiples. Overall the effect isn't very noticeable (especially the panning on a boombox), but I think the slight variation works better than 100% solid repetition. Anyway, they were effects sitting there in Audacity and I figured they'd be fun to goof with.
Finally, a couple months after the first cd I found an old "Nature Sounds" tape of crashing waves on a beach. So I mixed that in with the original cd to make a version 2. The nightly scoreboard is now Fans - 2, Boomboxes - 2. I'm getting there...
-Kevin P.
Edit: put back a sentence I accidentally deleted
Message Edited by Kevin Price on 03-30-2007 03:16 PM -
At irregular occasions I need to grab counts from several counters, and buffering the counts must be done simultaneously for all counters. I'm modeling my approach after zone.ni.com/devzone/cda/tut/p/id/5404 which someone kindly pointed out in an earlier thread. However, that example only uses one counter, and you can't test the synchronization with only one counter, so I am using two counters configured the same way, and they're wired to a single benchtop signal generator (for example at 300 kHz).
What I want to do, I can test in a loop with a somewhat random wait in it. I want to drive a hardware digital output line high for a few ms and then low again. The hardware line is physically connected to terminals for my timing vi's Sample Clock Source and so will cause them to buffer their counts for later reading. After I pulse this line, when I know new good buffered counts await me, I want to read both my counters. If their bufferings are simultaneous, then each counter will have counted the same number of additional counts since the last loop iteration, which I can check by subtracting the last value sitting in a shift register and then subtracting the two "additional counts" values and displaying this difference as "Diff". It should always be 0, or occasionally +1 followed immediately by -1, or else the reverse, because buffering and a count could happen practically at the same moment.
When I do this using a flat sequence to control the relative timing of these steps, so the read happens after the pulse, the counters often time out and everything dies. The lengths of time before, during, and after the pulse, and the timeout value for the read vi, and the size of the buffer and various other things, don't seem to change this, even if I make things so long I could do the counting myself holding a clipboard as my buffer. I've attached AfterPulse.vi to illustrate this. If I get 3 or 10 or so iterations before it dies, I observe Diff = 0; at least that much is good.
When I use two flat sequences running in parallel inside my test loop, one to control the pulse timing, and the other to read the counters and do things with their results, it seems to work. In fact, Diff is always 0 or very occasionally the +/- 1 sequence. But in this case there is nothing controlling the relative timing such that the counters only get read after the pulse fires, though the results seem to show that this is true. I think the reads should be indeterminate with respect to the pulses, which would be unreliable. I don't know why it's working and can't expect it to work in other environments, can I? Moreover, if I set some of the pulse timing numbers to 1 or 2 or 5 ms, timeouts start happening again, too. So I think I have a workaround that I don't understand, shouldn't work, and shouldn't be trusted. See SeparateSequence.vi for this one.
I also tried other versions of the well-defined, single sequence vi, moving the counter reads to different sequence frames so that they occur with the Sample Clock Source's rising edge, or while it is high, or with the falling edge, and they also often time out. I'll post these if anyone likes but can't post now due to the attachment limit.
Here's an odd, unexpected observation: I have to sequence the reads of the counters to occur before I use the results I read, or else many of the cycles of this combine a new count from one counter with the one-back count from the other counter, and Diff takes on values like the number of counts in a loop. I though the dataflow principle would dictate that current values would get used, but apparently not so. Sequencing the calculations to happen after the reads fixes this. Any idea why?
So, why am I not succeeding in taking proper control of the sequence of these events?
Thanks!!!
Attachments:
AfterPulse.vi 51 KB
InSeparateSequence.vi 49 KBKevin, thanks for all the work.
>Have you run with the little execution highlighting lightbulb on? -Yes. In versions of this where there is no enforced timing between the counter and the digital line, and there's a delay inserted before the digital line, it works. There are nearly simultaneous starts on two tracks. Execution proceeds directly along the task wire to the counter. Meanwhile, the execution along the task wire to the digital high gets delayed. Then, when the digital high fires, the counter completes its task, and execution proceeds downstream from the counter. Note, I do have to set the timeout on the counter longer, because the vi runs so slowly when it's painting its progress along the wires. If there is any timing relationship enforced between the counter and the digital transition, it doesn't work. It appears to me that to read a counter, you have to ask it for a result, then drive the line high, and then receive the result, and execution inside the counter has to be ongoing during the rising line edge.
>from what I remember, there isn't much to it. There really aren't many candidate places for trouble. A pulse is generated with DIO, then a single sample is read from each counter. -Yup, you got it. This should be trivial.
>A timeout means either that the pulse isn't generated or that the counter tasks don't receive it. - Or it could mean that the counter task must be in the middle of executing when the rising edge of the pulse arrives. Certainly the highlighted execution indicates that. Making a broken vi run by cutting the error wires that sequence the counter read relative to the pulse also seems to support that.
>Have you verified that the digital pulse happens using a scope? -Verified in some versions by running another loop watching a digital input, and lighting an indicator, or recording how many times the line goes high, etc. Also, in your vi, with highlighting, if I delete the error wire from the last digital output to the first counter to allow parallel execution, I see the counter execution start before the rising edge, and complete when the line high vi executes. Also, if I use separate loops to drive the line high and to read the counter, it works (see TwoLoops.vi or see the screenshot of the block diagram attached below so you don't need a LV box). I could go sign out a scope, but think it's obvious the line is pulsing given that all these things work.
>Wait! I think that's it! If I recall correctly, you're generating the digital pulse on port0/line0... On a 6259, the lines of port 0 are only for correlated DIO and do not map to PFI. -But I'm not using internal connections, I actually physically wired P0L1 (pin 66) to PFI0 (pin 73). It was port0/line1, by the way. And when running some of these vi's, I also physically jumper this connection to port0/line2 as an analog input to watch it. And, again, the pulse does cause the counter to operate, so it clearly connects - it just doesn't operate the way I think it is described operating.
For what it's worth, there's another mystery. Some of the docs seem to say that the pulse has to be applied to the counter gate terminal, rather than to the line associated with the sample clock source on the timing vi. I have tried combinations of counter gate and or sample clock source and concluded it seems like the sample clock source is the terminal that matters, and it's what I'm using lately, but for example the document I cited, "Buffered Event Counting", from last September, says "It uses both the source and gate of a counter for its operation. The active edges on the gate of a counter is used to latch the current count register value in a hardware register which is then transferred via Direct Memory Access...". I may go a round of trying those combinations with the latest vi's we've discussed.
Attachments:
NestedSequences.png 26 KB -
NI6602 pulse width measurement: Do I have to use an external sample clock?
Hi
In the .NET 4 example 'MeasPulseWidthBuf_SmplClk_Cont' it is stated in the comments that:
An external sample clock must be used.
Counters do not have an internal sample clock available. You can use
the Gen Dig Pulse Train-Continuous example to generate a pulse train on
another counter and connect it to the Sample Clock Source you are using
in this example.
I have an application running without specifying an external clock. The applications is running, but I'm not sure I can trust the recorded data. Here is the channel creation code:
task.CIChannels.CreatePulseWidthChannel(readTaskCounter,
"ReadPulswidthTask", 25e-9, 20e-6,
CIPulseWidthStartingEdge.Rising,
CIPulseWidthUnits.Seconds);
task.CIChannels.All.DataTransferMechanism = CIDataTransferMechanism.Dma;
task.Stream.Timeout = callbackTimeoutInMilliSeconds;
task.Stream.Buffer.InputBufferSize = 50000;
task.SynchronizeCallbacks = true;
task.Timing.ConfigureImplicit(SampleQuantityMode.ContinuousSamples);
task.Control(TaskAction.Verify);
Note that I'm not specifying any external clock.
1) Which clock is the daq using? -It is obviously using some clock since I can collect data via this task.
2) Do I need to change the configuration to use an external clock to achieve reliable readings - as mentioned in the 'MeasPulseWidthBuf_SmplClk_Cont' example?
/mola
Solved!
Go to Solution.Hi mola,
That specific example is for sample-clocked pulse width measurements. This type of measurement is only supported on newer hardware such as X Series boards and will not run on the 6602.
Your application that you linked uses Implicit timing, meaning that the signal itself serves as the sample clock. That is, at the end of each pulse width that you measure, the sample is deterministically latched in. So, you end up with a buffered array of every pulse width that is seen by the counter.
Best Regards,
John Passiak -
NI PCIe-6351 Count Edges Channel error on fast TTL - Multiple Sample Clock pulses were detected
Hello,
I am trying to use a PCIe-6351 to record the arrival times of a fast TTL pulse stream (generated by an Excilitas/Elmer Perkin APD). The TTL pulses are 2.5 volt amplitude, 20 ns duration, with a gauranteed dead time of 50 ns between pulses. I am trying to use the the Count Edges function, with the 100MhzTimebase as the input terminal and the input to counter 0 (PFI8) as the sample clock. After a few seconds of acquiring data at 100 Mhz, the application throws the following error (-201314):
"Multiple Sample Clock pulses were detected within one period of the input signal"
I had thought that because there is 50 ns dead time between pulses, multiple pulses would never arrive within a single clock cycle of the 100 Mhz timebase. Is there any way this might not be the case? Alternatively, is it possible that the counter is triggering on some jitter around the edges of the pulses? If so, is there any way to filter such high frequencies without losing the 20 ns pulses?
I have read through the forums for similar problems with photon detectors, but have not been able to resolve this issue. Thank you for the help.
Matthew BakalarIt sounds like the input signal is being detected as multiple edges.
The PFI filtering feature on the X Series card likely isn't going to be suitable for you. The minimum setting is actually exactly 20 ns, which should in theory guarantee a 20 ns pulse passing through. However, if the signal is high for anything less than that there wouldn't be a guarantee (depending on the phase of the timebase relative to the rising edge of the signal)--considering rise times and that there is evidently a glitch in the signal itself, it probably isn't actually a continuous 20 ns high time by the time the DAQ card sees it.
What you should do instead:
Configure a second counter as a retriggerable counter output (single pulse).
Use your external signal as the start trigger for this counter output task.
Set the initial delay, high time, and low time for the counter output task all to 20 ns (the minimum).
Use the internal output of the counter output task as the sample clock source for the original edge count task.
The counter output will be triggered when it sees the external signal, wait 10-20 ns, then generate a 20 ns pulse. If there is a glitch on the trigger line during this 30-40 ns that the output is generating, it will be ignored. The counter output will be re-armed in time for the next pulse given the minimum dead time of 50 ns between pulses.
Best Regards,
John Passiak -
hello,
my problem is very urgent, I have to sample 3 analog input synchronised to an encoder. How can use the channel from the encoder and use them to generate a external sample clock for acuiring the analog signals?how can I phisically attache the wire from the encoder to the digital line?and how the vi should be??my encoder has A, Anot,B,Bnot channel, but eventually with a circuit I can get just A and B. I have a PCI6221.
Please is very urgent!!Hi orsogna,
see the example Cont Acq&Graph Volt-Ext clock in the Labview Example Finder.
About wirings, you have to connect our encoder signal (A signal is good) to a PFI input in order to correctly read the TTL signal.
Ciao!
Simone S.
Academic Field Engineer - Med Region -
Sample Clock from Numerical Position Output of Digital Encoder
Hey everyone,
I'm trying to sample a voltage (pressure inside an engine) with my NI USB-6212 against a rotary encoder position (crankshaft angle). For some brief background, I'm using a producer/consumer structure and my rotary encoder has proprietary VIs from the manufacture to interface. It's from US Digital and it's an HD25A. It makes the most sense to use my rotary encoder as a sample clock so I wind up with a sampled point of pressure data for each crankshaft angle. This makes it far easier to average pressure traces together and work with the data.
I've found quite a few threads on this (links at the end of my post) but they all rely on having a pulse output from the digital encoder which is then wired into a counter input on their board. I don't have a pulse output, my encoder is outputting a numeric value between 0 and my chosen resolution (currently 3600, so 0 to 3599).
My question is how can I take this changing numerical output and make a sample clock pulse for each time the value changes? Does this need to be turned into a task to use as a sample clock? I'm essentially using the data acquistion program from the example program Cont Acq&Graph Voltage-Ext Clk.vi.
Thanks in advance for any help you can lend me and my apologies if I missed a prior thread on this topic. My search-fu wasn't able to turn anything up.
Some relevant links I found, though I couldn't quite make enough sense of them to get the fog to lift:
http://forums.ni.com/t5/Counter-Timer/How-to-reset-a-counter-on-external-signal-in-LabView/td-p/1521...
https://decibel.ni.com/content/docs/DOC-12106
http://ni.lithium.com/t5/Multifunction-DAQ/Rotary-encoder-data-acquired-simultaneously-with-analog-i...I don't think there is anyway you are going to make this work like you think you can. The US digital encoders I have worked with and their VI's were based on reading the current encoder count through a serial port connection. To do what you want, you are going to need to read the encoder every time the count changes. At 216 kHz, a serial connection is not going to be able to do that. Even if it could, you would essentially still have some latency between when the count changed and when the VI would be able to request a reading and get a response that showed the count had changed.
You need to use an encoder that has a digital pulse output that you could use as a sample clock on a data acquisition card. -
Using a Counter to error-check External Sample Clock
Hi all,
I am newish to labview and am working on a data acquisition project. I've managed to get the basics under control, but here's my situation and question...
-- I am using the S-6123 card to capture and record data on two or more AI channels. I am using a rotary encoder to generate a pulsetrain that I am using via PFI0 as the sample clock for recording the AI data.
-- This rotary encoder gives 720 pulses per revolution and an index pulse once per revolution.
-- In my data acquisition, I am pulling 1440 samples at a time with the DAQmx "read" function.
I have been experimenting with counters and can get the RPM out of the pulse trains well enough, however I was wondering...
Is there some way to use the 2 counters on the card (and signal routing of the two pulse trains) to double-check that the 1440 samples I take correspond to two exact revolutions, and that I'm not getting ahead of or behind the rotation of the encoder due to missing clock pulses or reading false pulses. I have a couple of ideas on how to attempt to do it, but to me they don't seem very reliable or efficient, so I thought I'd put it to the experts to point out of there is a more obvious way of doing it.
I have attached a pdf of the specifications of the encoder family, the pulses that will be output are on the right hand side of page 2.
With many thanks in advance,
Peter
Message Edited by mumech on 07-22-2008 01:05 AM
Attachments:
REncoder Specs.pdf 312 KBThanks very much for your reply. I had come across the use of counters with angular encoders but hadn't quite thought of the concept in this way.
I will have to experiment a bit over the next day or to see what this is capable of, the examples seem quite comprehensive, however I'm not sure if I will run into issues due to the fact that I am using the rotary encoder as the sample clock for my analogue data.
Would I indeed be able to compare these values (ideally check the position of the encoder after each set of data acquisition) without a "third party" sample clock common to both? (which isn't appropriate for this application)
If I was only running at low speeds, I might be able to implement this by simply checking the position of the encoder after each read of the data. However, at higher speeds there might be synchronization issues due to the buffering of the analogue data. So when getting the measurement from the encoder counter chances are the analogue data was acquired at an earlier time.
I know I haven't worded this very well, but how might I synchronise this error checking method? -
Hi,
I'm attempting to program up a Met One 010c cup anemometer which sends out 11V pulses whose frequency correlates to wind speed. I've written the following program Met One 010c-3b.vi which works when there's no sample clock and outputs data to the graph and to the write measurement to file VI.
However the timestamp on the file only occurs intermittently (every 130 recorded samples if i recall correctly) and i've been advised to put a sample clock in between the create virtual channel and start VI to make the timestamp occur every sample. However doing this i get errors that first tell me I have to use an external clock, making the clock external then gives the timeout error 200284 after the read function. I expect this is because the wrong source has been selected for the external clock on the timing function.
I don't fully understand how the external clock works and i assume i need to set up which ever port i select as an external clock?
I have read through the following
http://digital.ni.com/public.nsf/allkb/FEF778AD990D5BD886256DD700770103
-> how do i verify that the start trigger is configured correctly? (i know my program doesn't have one)
-> how do i verify the external timing is configured correctly?
http://zone.ni.com/devzone/cda/tut/p/id/2835
http://zone.ni.com/devzone/cda/tut/p/id/4322
I tried to implement some of the diagrams indicated in the last link (eg Figure 2 & 3) but when i went to select the source for the analogue output I was given no available options. I have the NI 9205,9213,9403,9423,9215 sitting on a cDAQ 9178, so none of these do analogue output. Does this mean i can't use an external clock?
Thanks for the help, i know this is a simple question but i'm getting nowhere fast.
Kind Regards
Orfeo
Attachments:
Met One 010c-3b.vi 90 KBThanks for your help Courtney,
I had a look at the Write to Text File.Vi you suggested and i tried to implement it in my program. It appears to be almost working. The formatting of the strings is stuffed up so that i'm getting an ever increasing number of columns in my data (see attached text file). Can you advise me where i've gone wrong?
An example of the file is below
24/11/2011 11:21:54 AM 2.32 2.14
2.62 2.11
1.81 1.49
24/11/2011 11:21:54 AM 2.36 2.32 2.14
2.62 2.62 2.11
1.82 1.81 1.49
24/11/2011 11:21:54 AM 2.40 2.36 2.32 2.14
2.59 2.62 2.62 2.11
1.76 1.82 1.81 1.49
24/11/2011 11:21:54 AM 2.43 2.40 2.36 2.32 2.14
2.55 2.59 2.62 2.62 2.11
1.73 1.76 1.82 1.81 1.49
24/11/2011 11:21:54 AM 2.53 2.43 2.40 2.36 2.32 2.14
2.48 2.55 2.59 2.62 2.62 2.11
1.69 1.73 1.76 1.82 1.81 1.49
I assume i've just not got my tab delimintors in the right place? or perhaps i need end of line qualifiers?
I would also like to have the timestamp more accurate, down to the milisecond. I see the format time string VI has an option to format the string %<digit>u which should do this but it appears to just paste the <digit>u in the string. We are wanting to sample data at 10-20 Hz and record the time of the samples. For one instrument these samples will be done simultaneously.
Thanks again
orfeo
Attachments:
Met One 010c-3c.vi 42 KB
TextFile.txt 550 KB -
"External sample clock" and "Rate" for digital input acquisition
Dear all,
I want to acquire digital input (21 bits with external clock = 50 kHz) with a PCIe-6343 NI board. Using the DAQ assistant under Labview, I selected the advanced timing with the sample clock time parametrized as External. However, it is also possible to select the Rate of the acquisition. In my case, i want to get the data at the rising edge of the external clock signal, so at a frequency of 50 kHz. How can I do that ? I just need to put a Rate of 50 kHz ?
thanks for your help.
CedricCedric,
dddsdsds wrote:
[...]In my case, i want to get the data at the rising edge of the external clock signal, so at a frequency of 50 kHz. How can I do that ?[...]
You answered your question already. If you want to use an external clock, you have to configure the timing source of your task to be external. In order of proper buffer configuration, you should enter 50kHz as rate in addition to the external configuration, but this will not influence the speed of the acquisition (since it is "clocked" externally!)
hope this helps,
Norbert
CEO: What exactly is stopping us from doing this?
Expert: Geometry
Marketing Manager: Just ignore it. -
Using an internal sample clock with a digital input
I am using an encoder to measure angle and velocity. The example that I have started with is here. https://decibel.ni.com/content/docs/DOC-6834. The problem I am having is with the Sample clock, I get a timeout at the DAQmx read. If I remove the sample clock the VI runs fine, but I have no idea of my sample rate. Below is the the problem setup with the Sample clock inline.
Attachments:
encoder with timer.JPG 50 KBHi there, a couple suggestions: first , this is a post that it is suppose to be on the DAQ board. Second, you are not being clear about the error, try to include the error code, description and its location, is it coming out of the channel node or the timing VI? Also what hardware are you using?
Now, If you open the example called "Measure Angular Position.vi" from the NI example finder, drill the DAQmx Create Channel, you will see that you are missing a couple terminals for the task configuration, I wonder if this is part of the error.
Alejandro | Academic Program Engineer | National Instruments -
NI 5772 acceptible external sample clock
Hello support forum,
Is it possible to use the NI 5772 adapter module with an external sample clock that does not have a constant frequency (it is still within the 400-800MHz range though), and is not always on?
An illustration of the clock signal may be more useful. Here is a link to a PDF containing a description of the instrument that is generating the clock signal. The plot of the clock signal is shown on page 7, it is the purple waveform (refered to as '(3) DAQ k-clock signals' in the text below the figures).
http://www.thorlabs.com/thorcat/22700/SL1310V1-10048-Manual.pdf
I've attached a screenshot of page 7 to this post in case the PDF is inconvienent.
Page 7 contains two figures. The top figure illustrates what I mean when I say the clock is not 'always on'.
The clock signal is supposed to be close to 500MHz, but it is not necessarily always that frequency. The frequency is dependent on the device. The device is a swept source laser. Each 'sweep' may result in a slightly different clock frequency, even within one sweep.
I can provide a lot more detail on my application if required.
Thank you for your help.
Solved!
Go to Solution.The CLIP that we ship with the 5772 requires a persistent clock that maintains relatively stable frequency. If you need to use a 5772 with a variable frequency clock that is not persistent then you will need a custom CLIP. Depending on your application requirements this may or may not be possible. You will need to open a service request for more information.
National Instruments
FlexRIO Product Support Engineer
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