Sample clock source through RTSI
Hello,
I have a short question on a sample clock source through RTSI.
In my setup, two PCI cards (PCI-6602 (dev2) and PCI-6110 (dev1)) are connected through a RTSI cable.
I'd like to generate a sample clock source on 6110 and use it on 6602 to count external input pulses.
In MAX test panel, I checked a counter was reading the external signals.
However, the attached vi do not work and count at all, then give an error of 200284.
Could you tell me what is wrong?
I guess something is not right on routing the clock signal. Do I need to use DAXmx connect terminals vi instead of external signal?
How can I check the two devices are connected properly through a RTSI cable?
I registered the cable and connected the devices on MAX without any issues. Is that enough?
Thank you for your kind suggesion and comments.
Solved!
Go to Solution.
Attachments:
block.jpg 108 KB
front.jpg 86 KB
Hi Sugar7,
There are some more simple ways of using the hardware clock on the 6110 as the timebase of the 6602. I have attached a code that shows how the timing property node can be used to set the timebase of the 6602 task. The attached screen shot also shows this property node. Using this property node, you will no longer need the counter output task from the 6110, so the only task line will be the counter acquire task.
The other change that you might consider is changing the sample mode of the sample clock to finite samples as you seem to be acquiring a finite number of samples before the task ends. If you would like the code to continue acquiring data points, then you may want to utilize a while loop around the read operation.
Ben R.
Modular Instruments Product Marketing Engineer
National Instruments
Attachments:
RTSI Clock Reference.png 124 KB
Timebase node.png 3 KB
Similar Messages
-
Err. -200303: External sample clock source...
Dear Readers
I'm using Ni-DAQmx 8 and have a PCIe-6259 card.
I wrote the following code (in VC++ 6).
int main(int argc, char* argv[])
int32 error=0;
TaskHandle taskHandle=0;
uInt8 data[10]={1,2,4,8,16,32,64,128,256,0xFFFFFFFF};
char errBuff[2048]={'\0'};
(error = DAQmxCreateTask("",&taskHandle));
(error = DAQmxCreateDOChan(taskHandle,"Dev1/port0","",DAQmx_Val_ChanForAllLines));
(error = DAQmxCfgSampClkTiming(taskHandle,NULL,1000.0,DAQmx_Val_Rising,DAQmx_Val_ContSamps,1000));
error = DAQmxWriteRaw(taskHandle, 10, true, 10.0, data, NULL, NULL);
if( DAQmxFailed(error) )
DAQmxGetExtendedErrorInfo(errBuff,2048);
ERROR: -200303: External sample clock source must be specified for this application
error = DAQmxStartTask(taskHandle);
I See no output on the oscilloscope.
I tried to put in several values for ClockSource in DAQmxCfgSampClkTiming like Dev1/PFI0, .... - but it never worked.
Could anyone please help me?
Thanks...
PascalHi Robert
Do yo mean something like this:
int main(int argc, char* argv[])
int32 error=0;
TaskHandle digiTaskHandle = 0;
TaskHandle aiTaskHandle = 0;
uInt32 data[10]={0xFFFFFFFF,2,4,8,16,32,64,128,256,0xFFFFFFFF};
float64 dummyBuffer[10];
char errBuff[4096]={'\0'};
error = DAQmxCreateTask("",&digiTaskHandle);
error = DAQmxCreateTask("",&aiTaskHandle);
error = DAQmxCreateDOChan(digiTaskHandle,"Dev1/port0","",DAQmx_Val_ChanForAllLines);
error = DAQmxCreateAIVoltageChan(aiTaskHandle, "Dev1/ai0", "", DAQmx_Val_RSE, -5.0, 5.0, DAQmx_Val_Volts, "");
error = DAQmxCfgSampClkTiming(aiTaskHandle, "/Dev1/ai/SampleClock", 1000.0, DAQmx_Val_Rising, DAQmx_Val_ContSamps, 1000);
error = DAQmxCfgSampClkTiming(digiTaskHandle,"/Dev1/ai/SampleClock" ,1000.0,DAQmx_Val_Rising,DAQmx_Val_ContSamps,1000);
error = DAQmxStartTask(aiTaskHandle);
ERROR:
"An attempt has been made to perform a route when the source and the destination are the same terminal.
In many cases, such as when configuring an external clock or a counter source, you must select a PFI, PXI Trigger, or RTSI line as the sou"
// error = DAQmxReadAnalogF64(aiTaskHandle, 10, 20.0, DAQmx_Val_GroupByChannel, dummyBuffer, 10, NULL, NULL);
if( DAQmxFailed(error) )
DAQmxGetExtendedErrorInfo(errBuff,4096);
error = DAQmxWriteRaw(digiTaskHandle, 10, true, 10.0, data, NULL, NULL);
//error = DAQmxStartTask(aiTaskHandle);
if( DAQmxFailed(error) )
DAQmxGetExtendedErrorInfo(errBuff,2048);
return 0;
Could you please explain me how to do it right?
Pascal -
Max. rate for sample clock source
Hi,
thinking of a future application for digital event counting (similar to
the Count Digital Events-Buffered-Continuous-Ext Clk example ) we have
two questions:
What's the maximum rate applicable to the sample clock source
terminal (in our case the external signal has rates up to 500kHz)?
Why needs the sample clock rate to be specified as the signals at the
source terminal determine when a sample is written to the buffer?
Thanks a lot for any answer!Hi Werner
For rates about 500kHz it must be work and you need the sample clock rate because you can also choose other rates to read the buffer.
regards
Manuel -
Digital Out Sample Clock Sources
Hey guys,
I am putting together an application <attached>.
Currently I have the ai/sampleclock wired to its timing VI. When I run this with highlighting on, it just goes to the read for the digital in task and waits there like it has not yet acquired enough samples. Am I right in thinking that this should result in an array of integers 2000 elements long with 1's where the line is high and 0's where the line is low?
When I swapped the clock source to being di/sampleclock I get something about my device not supporting it.
This is my first adventure into digital in, anybody have a quick hint?
Thanks,
~milq
p.s. LV 8.2 - PCI 6289
Attachments:
Wobble Test.vi 63 KBFirst - how are you doing a difference of 2 quad encoders? Are you taking the A channel from each of 2 different encoders running at the same nominal pulse rate? I'm away from my LV PC and can't go back and look now. I've done that kind of thing before, where you configure for up/down counting and you get a measure of relative lead and lag.
Second - all the stuff I did was at home while procrastinating and is fully untested. Don't trust it to do what I said it should without testing.
Third - does it make sense to save data continuously like I tried to do for you? I've developed a rule of thumb that says, "when in doubt, store to file and defer the decision-making." The reason I goofed with the # of samples acquired & displayed was that I pictured you updating a graph representing <something> through exactly 1 engine cycle. Seemed like updating it a couple times a second would be enough.
Since this is your thread and you asked, here's the scoop on Audacity: I actually grunted through that stuff several months back. I probably did use the envelope tool, but I think I ended up applying it piecewise in several little pieces through the fade region. I couldn't make the envelope curves apply just the right shape to keep the volume constant across the fade.
It was interesting in a weird way. I'd have thought going in that nothing could be easier to mix imperceptibly than noise. It turned out that the clicks you get with no fade and the volume artifacts coming from linear fade make noise especially *difficult* to mix.
At some stage I think I mixed in some pure noise and then applied some filtering to cut out high freq hiss. I also added some low freq amplitude modulation and some low freq Left<-->Right panning. In the order of <0.1 Hz, with the two effects at frequencies without common multiples. Overall the effect isn't very noticeable (especially the panning on a boombox), but I think the slight variation works better than 100% solid repetition. Anyway, they were effects sitting there in Audacity and I figured they'd be fun to goof with.
Finally, a couple months after the first cd I found an old "Nature Sounds" tape of crashing waves on a beach. So I mixed that in with the original cd to make a version 2. The nightly scoreboard is now Fans - 2, Boomboxes - 2. I'm getting there...
-Kevin P.
Edit: put back a sentence I accidentally deleted
Message Edited by Kevin Price on 03-30-2007 03:16 PM -
I apologize as I know there have been several threads in the past addressing it - but I don't see a head on answer. I have anlog data acquistion of a couple of channels and 2 position encoders that are being measured on a PXI-6608 card. The analog data acquition happens continously at 1kHz. My main loop is set to 50ms timing - so each sample grab from the analog card contains 50 samples. I want to get position measurements from the encoders synchronized at the same time; so 50 samples of psotion on each encoder aligned to the analog acq channels. How do I map the sample clock over from the analog card to the 6608 encoder card?
Attachments:
untitled.PNG 240 KBExample VI is attached (v8.5.1). Any ideas?
Attachments:
cutforNI.vi 149 KB -
NI PCIe-6351 Count Edges Channel error on fast TTL - Multiple Sample Clock pulses were detected
Hello,
I am trying to use a PCIe-6351 to record the arrival times of a fast TTL pulse stream (generated by an Excilitas/Elmer Perkin APD). The TTL pulses are 2.5 volt amplitude, 20 ns duration, with a gauranteed dead time of 50 ns between pulses. I am trying to use the the Count Edges function, with the 100MhzTimebase as the input terminal and the input to counter 0 (PFI8) as the sample clock. After a few seconds of acquiring data at 100 Mhz, the application throws the following error (-201314):
"Multiple Sample Clock pulses were detected within one period of the input signal"
I had thought that because there is 50 ns dead time between pulses, multiple pulses would never arrive within a single clock cycle of the 100 Mhz timebase. Is there any way this might not be the case? Alternatively, is it possible that the counter is triggering on some jitter around the edges of the pulses? If so, is there any way to filter such high frequencies without losing the 20 ns pulses?
I have read through the forums for similar problems with photon detectors, but have not been able to resolve this issue. Thank you for the help.
Matthew BakalarIt sounds like the input signal is being detected as multiple edges.
The PFI filtering feature on the X Series card likely isn't going to be suitable for you. The minimum setting is actually exactly 20 ns, which should in theory guarantee a 20 ns pulse passing through. However, if the signal is high for anything less than that there wouldn't be a guarantee (depending on the phase of the timebase relative to the rising edge of the signal)--considering rise times and that there is evidently a glitch in the signal itself, it probably isn't actually a continuous 20 ns high time by the time the DAQ card sees it.
What you should do instead:
Configure a second counter as a retriggerable counter output (single pulse).
Use your external signal as the start trigger for this counter output task.
Set the initial delay, high time, and low time for the counter output task all to 20 ns (the minimum).
Use the internal output of the counter output task as the sample clock source for the original edge count task.
The counter output will be triggered when it sees the external signal, wait 10-20 ns, then generate a 20 ns pulse. If there is a glitch on the trigger line during this 30-40 ns that the output is generating, it will be ignored. The counter output will be re-armed in time for the next pulse given the minimum dead time of 50 ns between pulses.
Best Regards,
John Passiak -
At irregular occasions I need to grab counts from several counters, and buffering the counts must be done simultaneously for all counters. I'm modeling my approach after zone.ni.com/devzone/cda/tut/p/id/5404 which someone kindly pointed out in an earlier thread. However, that example only uses one counter, and you can't test the synchronization with only one counter, so I am using two counters configured the same way, and they're wired to a single benchtop signal generator (for example at 300 kHz).
What I want to do, I can test in a loop with a somewhat random wait in it. I want to drive a hardware digital output line high for a few ms and then low again. The hardware line is physically connected to terminals for my timing vi's Sample Clock Source and so will cause them to buffer their counts for later reading. After I pulse this line, when I know new good buffered counts await me, I want to read both my counters. If their bufferings are simultaneous, then each counter will have counted the same number of additional counts since the last loop iteration, which I can check by subtracting the last value sitting in a shift register and then subtracting the two "additional counts" values and displaying this difference as "Diff". It should always be 0, or occasionally +1 followed immediately by -1, or else the reverse, because buffering and a count could happen practically at the same moment.
When I do this using a flat sequence to control the relative timing of these steps, so the read happens after the pulse, the counters often time out and everything dies. The lengths of time before, during, and after the pulse, and the timeout value for the read vi, and the size of the buffer and various other things, don't seem to change this, even if I make things so long I could do the counting myself holding a clipboard as my buffer. I've attached AfterPulse.vi to illustrate this. If I get 3 or 10 or so iterations before it dies, I observe Diff = 0; at least that much is good.
When I use two flat sequences running in parallel inside my test loop, one to control the pulse timing, and the other to read the counters and do things with their results, it seems to work. In fact, Diff is always 0 or very occasionally the +/- 1 sequence. But in this case there is nothing controlling the relative timing such that the counters only get read after the pulse fires, though the results seem to show that this is true. I think the reads should be indeterminate with respect to the pulses, which would be unreliable. I don't know why it's working and can't expect it to work in other environments, can I? Moreover, if I set some of the pulse timing numbers to 1 or 2 or 5 ms, timeouts start happening again, too. So I think I have a workaround that I don't understand, shouldn't work, and shouldn't be trusted. See SeparateSequence.vi for this one.
I also tried other versions of the well-defined, single sequence vi, moving the counter reads to different sequence frames so that they occur with the Sample Clock Source's rising edge, or while it is high, or with the falling edge, and they also often time out. I'll post these if anyone likes but can't post now due to the attachment limit.
Here's an odd, unexpected observation: I have to sequence the reads of the counters to occur before I use the results I read, or else many of the cycles of this combine a new count from one counter with the one-back count from the other counter, and Diff takes on values like the number of counts in a loop. I though the dataflow principle would dictate that current values would get used, but apparently not so. Sequencing the calculations to happen after the reads fixes this. Any idea why?
So, why am I not succeeding in taking proper control of the sequence of these events?
Thanks!!!
Attachments:
AfterPulse.vi 51 KB
InSeparateSequence.vi 49 KBKevin, thanks for all the work.
>Have you run with the little execution highlighting lightbulb on? -Yes. In versions of this where there is no enforced timing between the counter and the digital line, and there's a delay inserted before the digital line, it works. There are nearly simultaneous starts on two tracks. Execution proceeds directly along the task wire to the counter. Meanwhile, the execution along the task wire to the digital high gets delayed. Then, when the digital high fires, the counter completes its task, and execution proceeds downstream from the counter. Note, I do have to set the timeout on the counter longer, because the vi runs so slowly when it's painting its progress along the wires. If there is any timing relationship enforced between the counter and the digital transition, it doesn't work. It appears to me that to read a counter, you have to ask it for a result, then drive the line high, and then receive the result, and execution inside the counter has to be ongoing during the rising line edge.
>from what I remember, there isn't much to it. There really aren't many candidate places for trouble. A pulse is generated with DIO, then a single sample is read from each counter. -Yup, you got it. This should be trivial.
>A timeout means either that the pulse isn't generated or that the counter tasks don't receive it. - Or it could mean that the counter task must be in the middle of executing when the rising edge of the pulse arrives. Certainly the highlighted execution indicates that. Making a broken vi run by cutting the error wires that sequence the counter read relative to the pulse also seems to support that.
>Have you verified that the digital pulse happens using a scope? -Verified in some versions by running another loop watching a digital input, and lighting an indicator, or recording how many times the line goes high, etc. Also, in your vi, with highlighting, if I delete the error wire from the last digital output to the first counter to allow parallel execution, I see the counter execution start before the rising edge, and complete when the line high vi executes. Also, if I use separate loops to drive the line high and to read the counter, it works (see TwoLoops.vi or see the screenshot of the block diagram attached below so you don't need a LV box). I could go sign out a scope, but think it's obvious the line is pulsing given that all these things work.
>Wait! I think that's it! If I recall correctly, you're generating the digital pulse on port0/line0... On a 6259, the lines of port 0 are only for correlated DIO and do not map to PFI. -But I'm not using internal connections, I actually physically wired P0L1 (pin 66) to PFI0 (pin 73). It was port0/line1, by the way. And when running some of these vi's, I also physically jumper this connection to port0/line2 as an analog input to watch it. And, again, the pulse does cause the counter to operate, so it clearly connects - it just doesn't operate the way I think it is described operating.
For what it's worth, there's another mystery. Some of the docs seem to say that the pulse has to be applied to the counter gate terminal, rather than to the line associated with the sample clock source on the timing vi. I have tried combinations of counter gate and or sample clock source and concluded it seems like the sample clock source is the terminal that matters, and it's what I'm using lately, but for example the document I cited, "Buffered Event Counting", from last September, says "It uses both the source and gate of a counter for its operation. The active edges on the gate of a counter is used to latch the current count register value in a hardware register which is then transferred via Direct Memory Access...". I may go a round of trying those combinations with the latest vi's we've discussed.
Attachments:
NestedSequences.png 26 KB -
NI6602 pulse width measurement: Do I have to use an external sample clock?
Hi
In the .NET 4 example 'MeasPulseWidthBuf_SmplClk_Cont' it is stated in the comments that:
An external sample clock must be used.
Counters do not have an internal sample clock available. You can use
the Gen Dig Pulse Train-Continuous example to generate a pulse train on
another counter and connect it to the Sample Clock Source you are using
in this example.
I have an application running without specifying an external clock. The applications is running, but I'm not sure I can trust the recorded data. Here is the channel creation code:
task.CIChannels.CreatePulseWidthChannel(readTaskCounter,
"ReadPulswidthTask", 25e-9, 20e-6,
CIPulseWidthStartingEdge.Rising,
CIPulseWidthUnits.Seconds);
task.CIChannels.All.DataTransferMechanism = CIDataTransferMechanism.Dma;
task.Stream.Timeout = callbackTimeoutInMilliSeconds;
task.Stream.Buffer.InputBufferSize = 50000;
task.SynchronizeCallbacks = true;
task.Timing.ConfigureImplicit(SampleQuantityMode.ContinuousSamples);
task.Control(TaskAction.Verify);
Note that I'm not specifying any external clock.
1) Which clock is the daq using? -It is obviously using some clock since I can collect data via this task.
2) Do I need to change the configuration to use an external clock to achieve reliable readings - as mentioned in the 'MeasPulseWidthBuf_SmplClk_Cont' example?
/mola
Solved!
Go to Solution.Hi mola,
That specific example is for sample-clocked pulse width measurements. This type of measurement is only supported on newer hardware such as X Series boards and will not run on the 6602.
Your application that you linked uses Implicit timing, meaning that the signal itself serves as the sample clock. That is, at the end of each pulse width that you measure, the sample is deterministically latched in. So, you end up with a buffered array of every pulse width that is seen by the counter.
Best Regards,
John Passiak -
Hi,
I'm attempting to program up a Met One 010c cup anemometer which sends out 11V pulses whose frequency correlates to wind speed. I've written the following program Met One 010c-3b.vi which works when there's no sample clock and outputs data to the graph and to the write measurement to file VI.
However the timestamp on the file only occurs intermittently (every 130 recorded samples if i recall correctly) and i've been advised to put a sample clock in between the create virtual channel and start VI to make the timestamp occur every sample. However doing this i get errors that first tell me I have to use an external clock, making the clock external then gives the timeout error 200284 after the read function. I expect this is because the wrong source has been selected for the external clock on the timing function.
I don't fully understand how the external clock works and i assume i need to set up which ever port i select as an external clock?
I have read through the following
http://digital.ni.com/public.nsf/allkb/FEF778AD990D5BD886256DD700770103
-> how do i verify that the start trigger is configured correctly? (i know my program doesn't have one)
-> how do i verify the external timing is configured correctly?
http://zone.ni.com/devzone/cda/tut/p/id/2835
http://zone.ni.com/devzone/cda/tut/p/id/4322
I tried to implement some of the diagrams indicated in the last link (eg Figure 2 & 3) but when i went to select the source for the analogue output I was given no available options. I have the NI 9205,9213,9403,9423,9215 sitting on a cDAQ 9178, so none of these do analogue output. Does this mean i can't use an external clock?
Thanks for the help, i know this is a simple question but i'm getting nowhere fast.
Kind Regards
Orfeo
Attachments:
Met One 010c-3b.vi 90 KBThanks for your help Courtney,
I had a look at the Write to Text File.Vi you suggested and i tried to implement it in my program. It appears to be almost working. The formatting of the strings is stuffed up so that i'm getting an ever increasing number of columns in my data (see attached text file). Can you advise me where i've gone wrong?
An example of the file is below
24/11/2011 11:21:54 AM 2.32 2.14
2.62 2.11
1.81 1.49
24/11/2011 11:21:54 AM 2.36 2.32 2.14
2.62 2.62 2.11
1.82 1.81 1.49
24/11/2011 11:21:54 AM 2.40 2.36 2.32 2.14
2.59 2.62 2.62 2.11
1.76 1.82 1.81 1.49
24/11/2011 11:21:54 AM 2.43 2.40 2.36 2.32 2.14
2.55 2.59 2.62 2.62 2.11
1.73 1.76 1.82 1.81 1.49
24/11/2011 11:21:54 AM 2.53 2.43 2.40 2.36 2.32 2.14
2.48 2.55 2.59 2.62 2.62 2.11
1.69 1.73 1.76 1.82 1.81 1.49
I assume i've just not got my tab delimintors in the right place? or perhaps i need end of line qualifiers?
I would also like to have the timestamp more accurate, down to the milisecond. I see the format time string VI has an option to format the string %<digit>u which should do this but it appears to just paste the <digit>u in the string. We are wanting to sample data at 10-20 Hz and record the time of the samples. For one instrument these samples will be done simultaneously.
Thanks again
orfeo
Attachments:
Met One 010c-3c.vi 42 KB
TextFile.txt 550 KB -
Sharing an external sample clock between PCI-6722 and PCI-6602
I need PCI-6602 work with PCI-6722。6602 shares 6722’s ao/SampleClock as external clock and triggered by 6722’s ao/StartTrigger。The master device is 6722, which refered as Dev1, and the slave device is 6602, which refered as Dev2. A RTSI line is used to connect the two devices correctly.
I use C API to finish my program and my code is as follows:
//config 6722 analog out task
1、DAQmxCreateTask("NI6672", &hAOTask);
2、DAQmxCreateAOVoltageChan(hAOTask, "Dev1/ao0", "", -10.0, 10.0, DAQmx_Val_Volts, "" );
3、DAQmxCfgSampClkTiming(hAOTask, "", 1000.0, DAQmx_Val_Rising, DAQmx_Val_ContSamps, 1000);
4、DAQmxWriteAnalogF64(hAOTask, 1000, 0, 10.0, DAQmx_Val_GroupByChannel, data, NULL, NULL);
//config 6602 counter task
5、DAQmxCreateTask("NI6602", &hCounterTask);
6、DAQmxCreateCICountEdgesChan(hCounterTask, "Dev2/ctr0", "", DAQmx_Val_Rising, 0, DAQmx_Val_CountUp);
//use /Dev1/ao/SampleClock for external clock
7、DAQmxCfgSampClkTiming(hCounterTask, "/Dev1/ao/SampleClock", 1000.0, DAQmx_Val_Rising, DAQmx_Val_ContSamps, 1000);
//use /Dev1/ao/StartTrigger
8、DAQmxSetTrigAttribute (hCounterTask, DAQmx_ArmStartTrig_Type, DAQmx_Val_DigEdge);
9、DAQmxSetTrigAttribute (hCounterTask, DAQmx_DigEdge_ArmStartTrig_Src, "/Dev1/ao/StartTrigger");
10、DAQmxSetTrigAttribute (hCounterTask, DAQmx_DigEdge_ArmStartTrig_Edge, DAQmx_Val_Rising);
//start counter task first
11、DAQmxStartTask(hCounterTask);
//start 6722 task
12、DAQmxStartTask(hAOTask);
I run it on the MAX virtual Device, and the Step 11always returned -89120。
I try to slove this problem, so I change the Step 7, use /Dev2/PFI9 to instead of /Dev1/ao/SampleClock.
7、DAQmxCfgSampClkTiming(hCounterTask, "/Dev2/PFI9", 1000.0, DAQmx_Val_Rising, DAQmx_Val_ContSamps, 1000);
The code runs well, but I don’t know which terminal is connected by /Dev2/PFI9. Does it connect to /Dev1/ao/SampleClock？
I use another API DAQmxConnectTerms to ensure that, I add a Step before Step 11.
DAQmxConnectTerms( "/Dev1/ao/SampleClock", "/Dev2/PFI9", DAQmx_Val_DoNotInvertPolarity );
The program also run well. But I am still not sure that 6602 is sharing /Dev1/ao/SampleClock。If not, which terminal of Dev1 is connected by /Dev2/PFI9?
Is my code right? If not, hwo to fix my code or supply some example for me? Thanks.Hello Shokey,
From looking over your post, it looks like you want to program in C, using simulated instruments, a master/slave design with a PCI-6602 and PCI-6722. The PCI-6722 is the master device and the PCI-6602 is the slave device. In order to implement this with the real cards, you would need a RTSI cable between the 2 cards in order to pass the triggers and the sample clock. Unfortunately with simulated devices you can't implement this so parts of your code won't be able to work exactly like if you had the instrument.
If you did have the instrument, you can implement this by performing the following steps:
Master Device:
1.) Export the ao/SampleClock and ao/StartTrigger to a RTSI Line. (See DAQmx C Reference help for DAQmxExportSignal to export these)
Slave Device:
1.) Set the Sample clock and the trigger to the RTSI.
There is another forum that I think will help you out to implement this correctly. In this forum, the customer was trying to export a trigger through a RTSI and the problem he was experiencing was a broken RTSI cable. His code, he states, works. I hope this helps you with this and if you have any more questions, feel free to post.
Jim St
National Instruments
RF Product Support Engineer -
PXI-5122 External Sample Clock
PXI-1031 Chassis
PXI-8106 PC
PXI-5122 14bit 100MS/s Digitizer
Labview 8.5
I am driving X-Y mirrors steering a laser.
I am measuring the reflected light
to develop a raster image of a sample.
I have a pixel clock running at 60MHz that
I want to clock the acquistion and external
trigger that defines the 'line valid' or sampling
across the mirrors during their constant velocity
range.
I am using [PFI0 with 'READY for START EVENT'] as
a start pulse to run my x-y mirror scan.
CH0: Analog signal
SMA TRIG: line valid
AUX: PFI0 with 'READY for START EVENT'
In the property node 'niScope'
when I add the following elements:
Sample Clock Timebase Source = VAL_NO_SOURCE
Sample Clock Timebase Rate = 60000000
Sample Clock Timebase Divisor = 1
I get the following message:
Error -1074118614 occurred at Error occurred at: niScope Fetch Binary 16.vi:2
Possible reason(s):
Driver Status: (Hex 0xBFFA402A)
An acquisition has not been initiated.
Error -1074134971 occurred at Property Node (arg 4) in CSKB-4X_VID.vi
Possible reason(s):
The channel or repeated capability name is not allowed.
Attribute: NISCOPE_ATTR_SAMP_CLK_TIMEBASE_SRC, Channel: 0
Attached are the VIs with the elements added to the niScope property node
and without.
I get the above errors even when I set the 'Sample Clock Timebase Source'
to 'VAL_NO_SOURCE'
It appears, by just adding the elements, it gives me the error(s).
How can I get the external sampling clock to work along with external trigger?
Solved!
Go to Solution.
Attachments:
CSKB-4_VID.vi 148 KB
CSKB-4X_VID.vi 146 KBHi csk,
I was wondering if you could clarify how many
samples you wish to take. Am I correct that you wish to take 30,000
sets of 150 samples each, or do you mean you want to take 150 sets of
30,000 samples each (since 30,000 periods of the 60 MHz clock fits
within 90% of a 1.8kHz signal)? In either case, the current method you
are using is only going to acquire a single record each time through
the loop, and so you will be limited by how fast you can retrigger in
software.
For your application, it sounds like you will
need to perform a multi-record acquisition, as this will allow you to
specify what condition to trigger off of and how many samples to
acquire each time the trigger occurs. In this way, each "transition" of the sawtooth wave is considered a single record, and you are acquiring multiple different records corresponding to each time a rising edge trigger occurs. I believe that you can accomplish
exactly what you need with only a slight modification to the niScope
shipping example "niScope EX Multi Record Fetch More Than Available
Memory.vi" (found at Start » Programs » National Instruments » NI-SCOPE
» Examples). With this VI, you can specify that you wish each record to
have a min record length of 30,000 samples (or 150 samples if this is
the case) and that you wish to acquire 150 records (or 30,000 if this
is the case). The only major change that you would need to make is to
change the Configure Trigger VI to be a Digital Edge trigger rather
than an analog trigger. With this and a few other modifications (ie -
configuring the external clock) you should be able to accomplish what
you need. Please let me know if I explained this alright and if my
assumptions are correct. Thanks, and best of luck!
Daniel S.
National Instruments -
"External sample clock" and "Rate" for digital input acquisition
Dear all,
I want to acquire digital input (21 bits with external clock = 50 kHz) with a PCIe-6343 NI board. Using the DAQ assistant under Labview, I selected the advanced timing with the sample clock time parametrized as External. However, it is also possible to select the Rate of the acquisition. In my case, i want to get the data at the rising edge of the external clock signal, so at a frequency of 50 kHz. How can I do that ? I just need to put a Rate of 50 kHz ?
thanks for your help.
CedricCedric,
dddsdsds wrote:
[...]In my case, i want to get the data at the rising edge of the external clock signal, so at a frequency of 50 kHz. How can I do that ?[...]
You answered your question already. If you want to use an external clock, you have to configure the timing source of your task to be external. In order of proper buffer configuration, you should enter 50kHz as rate in addition to the external configuration, but this will not influence the speed of the acquisition (since it is "clocked" externally!)
hope this helps,
Norbert
CEO: What exactly is stopping us from doing this?
Expert: Geometry
Marketing Manager: Just ignore it. -
Using AI Sample Clock to Trigger Counter Samples
My basic question is: Is the ai\SampleClock signal only active while an analog input task is running?
The details are:
I have an X-series PCIe-6321 multifunction DAQ card. It is controlling a SCXI chassis and has a SCXI-1180 and SCXI-1302 so I can control analog inputs of the chassis as well as access the 4 counter on the card. My application requires that I use all 4 counters to measure a frequency input signal and synchronize the samples to the analog input signals. I have created 5 tasks, 1 for the AI and 1 for each counter.
I am using LabVIEW 8.6.1 with the latest NI-DAQ drivers on and 64-bit Vista OS
1. Are there any driver or hardware restrictions that would cause this solution not to work?
2. Can I use the ai\SampleClock as in input sample clock for each of the frequency tasks? If I do this will the sampling start be syncronized? I.e. if I start each of the frequency tasks first, will they wait until the AI task is started before they start sampling?
3. If that doesn't work, do I need to route the sample clock from the AI task to a PFI line (PFI1) and then use that as input to the frequency task sample clock?
I usually do option 3 when synchronizing two cards in PXI chassis and only use the software task start in stead of of synchronizing on a digital start, since the sample clock will control the samples anyway. I need to know if the same behaviour works with the scenario above.
Thanks,
Bob
Prolucid Technolgies Inc.
Solved!
Go to Solution.Hi Bob,
I can confirm that the ai/SampleClock will only be active while the AI task is running. As far as the other questions go:
1. You'd have to provide more information about what you looking to do exactly, but there is no problem with routing the sample clock of the Analog Input task to be used with the Counters. I would read through the section of the X Series User Manual that discusses sample-clocked frequency measurements (starting on page 7-16) for some more information about what is actually going on during this configuration to make sure it suits your requirements.
The frequency of the signal to be measured should be at least twice as fast as the sample clock of your AI task.
2. You can indeed route the signal to all four tasks at the same time (you can refer to the Device Routes page in MAX to double-check routing restrictions). The sampling will be synchronized provided the four counters are started before the AI task, but the counters will be armed at different times unless you configure an Arm Start Trigger (see page 7-45 of the X Series User Manual). I would consider using the ai/StartTrigger if you wish to do this.
The effect of not arming the counters at the same time would be a different number of periods to average on each counter for the very first sample (assuming averaging is enabled). This might not be a big concern but I just wanted to point it out.
3. The routes are available internal to the board so external routing isn't necessary, you can just specify to use the AI Sample clock for the clock of each counter and the routes will be made for you. If you prefer to export the signal on a PFI line and route it back in on a different PFI line this option is also available to you but shouldn't be necessary.
I hope this helps you get started. I'd make sure to take a look at chapter 7 of the X Series User Manual if you get a chance since it describes how all of the counter configurations work in more detail. If you have any related questions don't hesitate to post back.
Best Regards,
John
Message Edited by John P on 12-01-2009 07:52 PM
John Passiak -
NI 5772 acceptible external sample clock
Hello support forum,
Is it possible to use the NI 5772 adapter module with an external sample clock that does not have a constant frequency (it is still within the 400-800MHz range though), and is not always on?
An illustration of the clock signal may be more useful. Here is a link to a PDF containing a description of the instrument that is generating the clock signal. The plot of the clock signal is shown on page 7, it is the purple waveform (refered to as '(3) DAQ k-clock signals' in the text below the figures).
http://www.thorlabs.com/thorcat/22700/SL1310V1-10048-Manual.pdf
I've attached a screenshot of page 7 to this post in case the PDF is inconvienent.
Page 7 contains two figures. The top figure illustrates what I mean when I say the clock is not 'always on'.
The clock signal is supposed to be close to 500MHz, but it is not necessarily always that frequency. The frequency is dependent on the device. The device is a swept source laser. Each 'sweep' may result in a slightly different clock frequency, even within one sweep.
I can provide a lot more detail on my application if required.
Thank you for your help.
Solved!
Go to Solution.The CLIP that we ship with the 5772 requires a persistent clock that maintains relatively stable frequency. If you need to use a 5772 with a variable frequency clock that is not persistent then you will need a custom CLIP. Depending on your application requirements this may or may not be possible. You will need to open a service request for more information.
National Instruments
FlexRIO Product Support Engineer -
Digital external sample clock (C#)
I am using the PCI-6225 card and trying to generate a pair of pulses using the digital lines and internal clock, but I am getting some odd/unexpected results. Can someone explain?
Basically what I want to do is generate a regular pulse over a (configured) set of lines. The pulse will, typically, be 10ms wide at intervals between 900ms and 1,100ms. The interval will only change occasionally and is usually 1 second (1,000).
After looking at the various C# examples I created something like the following
private DigitalWaveform[] m_digitalWaveform = null;
private DigitalWaveform m_positiveDigitalWaveform = null;
m_digitalTask = new Task;
m_digitalTask.DOChannels.CreateChannel(
"Dev1/port0/line0", "", ChannelLineGrouping.OneChannelForEachLine);
m_digitalTask.DOChannels.CreateChannel(
"Dev1/port0/line1", "", ChannelLineGrouping.OneChannelForEachLine);
m_digitalTask.DOChannels.CreateChannel(
"Dev1/port0/line2", "", ChannelLineGrouping.OneChannelForEachLine);
// etc. ...
// Repeat for each configured line
double pulseSampleRate = 1000;
int numberPulseOfSamples = 1000; // This varies between 900 and 1,100.
int pulseWidth = numberPulseOfSamples / 100;
int numberOfChannels = m_digitalTask.DOChannels.Count;
m_digitalTask.Timing.ConfigureSampleClock(
"/Dev1/Ctr1Source",
pulseSampleRate, // 1,000 or anything!
SampleClockActiveEdge.Rising,
SampleQuantityMode.ContinuousSamples,
numberPulseOfSamples);
m_digitalTask.Control(TaskAction.Verify);
// m_digitalTask.Done += new TaskDoneEventHandler(OnDigitalTaskDone);
// m_digitalTask.SampleClock += new SampleClockEventHandler(OnClockSamplePulse);
m_digitalWriter = new DigitalMultiChannelWriter(m_digitalTask.Stream);
// Create an array of waveforms (1 per channel/line). Each waveform being the same with the 1st 1%
// being up and the other 99% being down. Set the Timing interval at 1ms.
m_digitalWaveform = new DigitalWaveform[numberOfChannels];
m_positiveDigitalWaveform = new DigitalWaveform(numberOfSamples, 1, DigitalState.ForceDown);
for (int sample=0; sample < pulseWidth; sample++)
m_positiveDigitalWaveform.Signals[0].States[sample] = DigitalState.ForceUp;
m_positiveDigitalWaveform.Timing = WaveformTiming.CreateWithRegularInterval(
new TimeSpan(0, 0, 0, 0, 1));
for (int channel=0; channel < numberOfChannels; channel++)
m_digitalWaveform[channel] = m_positiveDigitalWaveform;
m_digitalWriter.WriteWaveform(false,m_digitalWaveform);
m_digitalTask.Start();
1. First of all this only did something if the selected clock source was /Dev1/Ctr1Source. No other clock would do, even though there are 2 clocks on the board (e.g. /Dev1/Ctr0Source did nothing).
2. Secondly the waveform timing seemed to be ignored, e.g. leave it out or setting to something other than 1ms made no difference.
3. Thirdly the pulse sample rate also seemed to be ignored, e.g. set it to 1 or 1,000 made no difference.
4. Fourthly the pulse seemed to be spread over odd intervals. Set the integer numberPulseOfSamples as follows
NumberPulseOfSamples Interval
========================================
1,000 9 (ish) seconds
2,000 18 (ish) seconds
4,000 36 (ish) seconds
1,500 6½ (ish) seconds
3,000 8½ (ish) seconds
800 7 (ish) seconds
Setting the number of pulse samples to a low value (500) threw an error (-200016, "device memory underflow") when stopping the task.
Can someone shed some light on what is going on and how I can get what I want?I only seem able to select Ctr1Source, but this may be because (?) I have some clocked analogue input going on at the same time, so perhaps Ctr0Source is busy with this. Unfortunately, the 2 examples of clocked digital wave forms doing a write use PipelinedSampleClock or BurstHandshake, although there are reads using a "SampleClock". If you try to run the 2 examples you get an error
Property: NationalInstruments.DAQmx.Timing.SampleTimingType
You Have Requested: NationalInstruments.DAQmx.SampleTimingType.PipelinedSampleClock (or SampleTimingType.BurstHandshake)
You Can Select: NationalInstruments.DAQmx.SampleTimingType.SampleClock, NationalInstruments.DAQmx.SampleTimingType.OnDemand, NationalInstruments.DAQmx.SampleTimingType.ChangeDetection
Task Name: _unnamedTask<0>
Status Code: -200077
So I guess the PCI-6225 board doesn't support them.
Maybe you are looking for
-
The frst time I plugged my ipod into my surface, it came up with the option sync ipod but that didnt happen today when I plugged in my ipod. Any ideas on how to sync my ipod?
-
Hi Experts my client want to see the vendors payment history on the monthly wise ( or selected months) .. is FBL1N is fine to see the vendor payment history by selecting cleared items....?? or any other SAP Standard report available .... please shar
-
I am using the Oracle XML parser, and I am finding that some funny things are happening when I try to use the document(object, node-set?) function, as defined in the XSLT specification. For some reason, my xmlns path is being prepended to any file pa
-
GAF - get next View or Step ID
Hi, i need to replace standard buttons in GAF with own buttons. Now i need to implement the logic that "Previous Step" is not enabled in first view etc. To resolve this, i need to know which View is shown next. How can i achieve this? I saw that i ca
-
Can anyone tell me how to move my email addresses from Mac Mail to Thunderbird
Hi all. I've been having so many problems with Mac Mail that I decided to give Thunderbird v17 a go. It automatically imported my emails and account settings but hasn't imported my email addresses. I know they'll automatically be added as and when I