FPGA Digital Channel Read

I am using the PCI-7831R, and the signal is connected to Channel 2.
Using the FPGA I/O Node to read in 12 pins.  My question is, is it a serial read or a parallel read?

You define your signals as either a digital line (serial read/write) or a digital port (parallel read/write). This can be seen if you add FPGA I/O to your target. Here's some screenshots of both single and port signals:
Note the "resolver" data is composed of two ports of 8 bits each whereas the BITE ENABLE lines are individual signals. You can tell if you are using digital line or port by the type, lines are shown as booleans, ports are shown as unsigned 8 bit integers.
Message Edited by Bill@NGC on 07-20-2007 06:53 PM
“A child of five could understand this. Send someone to fetch a child of five.”
― Groucho Marx
Attachments:
fpga io3.png ‏3 KB
fpga io.png ‏11 KB
fpga io2.png ‏5 KB

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