FPGA module unzip problem

I downloaded the FPGA module into a controler of a PXI, running XP. When I tried to unzip it, the upzip operation would fail everytime. What is causing this? Is there some kind of requirement to unzip this? Harddrive size requirement?
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Thanks for helping. I found out what was the problem. I downloaded the FPGA module through the link below. When I tried to unzip it, I would use the default path. Apparently, the default path has a space at the end of its 2nd folder, counting from the end of the path. This is a small bug from NI, but it needs to be fixed. It is a hard problem to catch, since I didn't expect something like that to happen.
https://lumen.ni.com/nicif/us/evallvuser/content.xhtml
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FPGA module guide problems

On page 21 of the attached guide that we have on our computer, we encountered an error in the "Acquiring Data from the FPGA" section. We cannot do step 13. When right-clicking the read/write control function, there is no option labeled "full." We were also wondering where the blocks labeled "clock config" go, since in step 7 on page 20, the tutorial asked to place the VI, though it is never shown in any figures in the guide. Can anyone help with any of these problems?
Attachments:
5640R_GS1.pdf ‏417 KB

If you are having problem see here

NI Update Service: Upgrades & Service Packs: LabVIEW 2012 FPGA Module Xilinx Tools 10.1

Hi,
I downloaded / installed the newest LV 2012 release - everythin fine so far (its great )
NI-Update Service proposed the installation of a service pack - download and installation worked too.
NI-US also suggests to update the Xilinx tools for the FPGA module, but the download is not working. Seems like the download-link is broken??
Any suggestions?
Another interesting question: I live in Austria (German speaking), but we use Windows & LV entirely in English in our company. The NI-US however is heavily localized - even the item description is in German. While this is OK for me, I still wonder if I could change it to English too.
(for the attachment: "Fehler beim Herunterl..." => "failed to download")
-Benjamin
CLA
Solved!
Go to Solution.
Attachments:
ni-us.png ‏23 KB

Hi Benjamin,
OK, I see, if the PC doesn't have any Xilinx tools installed at all, then Update Service will not offer you the update. It only displays upgrades to software that is already installed.
This log from the other PC shows that the Xilinx 10.1 update fails to download, as your message said initially, but unfortunately it doesn't say anything more.
We released a bunch of new updates last week, and since then there have been a few cases like this, but it doesn't seem widespread or easily reproducible. I can see in our server reports that other users successfully downloaded this update yesterday.
I attached a downloader file that you can try. Unzip the file and run the exe. All it does is point to the same download location that Update Service is using to download this file. If the downloader works, then the problem is with Update Service. If the downloader doesn't work, then we'd know that something on our web servers isn't delivering this file properly.
Also, if you happen to have any HTTP traffic monitoring software (like Fiddler), I'd be interested to know what it says is happening during the file download request.
LaRisa Mohr
Staff Product Support Engineer - NI Update Service
National Instruments R&D
Attachments:
Xilinx10_1_downloader.zip ‏142 KB

How to create a pushbutton delay in the FPGA module in Labview 8.2

I am a very inexperienced programmer of Labview, and I have what I thought would be a simple problem. I have a CompactRIO system that utilizes Labview 8.2 as well as RT and FPGA modules. I am running an end of line tester that uses a pushbutton to start the test. I am looking to force an operator to hold the test start pushbutton for one second before testing begins. If the pushbutton is released before the second is up, the test will not start. In the FPGA module, I cannot figure out how to accomplish this. I have tried using both flat sequence and while loops, but I cannot get the program to work as stated above. With the flat sequence there is not a way, that I could see, to break out of the sequence should the pushbutton be released. Using the while loop, I was closer to a solution, but could not get the program to read the input consistently. I did verify that the 24Vdc signal is getting to the input card whenever the pushbutton is pressed. The program worked fine without trying to add the delay when I was just looking for a transistion to 24Vdc on the input card when the pushbutton was pressed.
Any ideas? Thanks!

Here's how you might do it with a button on-screen in LabVIEW for Windows. If you need more specific help, post your code, or a small portion of it that demonstrates the bit that you can't get working. (The snippet is in LabVIEW 2009 since that's what I'm using, but the attached VI is saved for 8.2)
Attachments:
Hold 1 Second.vi ‏8 KB

Crash at compilation/Intermediate files generation LV FPGA module

Hi.
I'm in desperate need of assistance.
I have been using LabVIEW 8.6 with FPGA module running at Win XP for som time now and I have never encountered any crash while compiling before.
I get one of those Error messages where I just can send an error report to Microsoft.
I use the FPGA target RIO0, PCI-7833R and have designed a FPGA interface-VI including a number of functions. When I right-click at the VI and choose Compile, generation of Intermediate files begins. Now I never get further than the before LV crashes. Each and every time.
I have no problems opening the project file or my FPGA VI, updating them or saving them.
Grateful for help. Thanks!
/Henrik

Hi!
Thanks again for good ideas. Unfortunately it didn't help repairing. I tried with both FPGA Module and the FPGA compile server (even though the compilation process never reaches that far) without success. I even tried to repair the whole LabView 8.6 but with the same result.
Even before repairing I have been able to make another small VI work its way through the whole compilation without crashing. But when I replace the small VI with the previously "failing" VI, it crashes again. I have also tried to cut away most of the functions of the VI but it still crashes.
Is it possible that I have some kind of bad reference, some missmatch when instanciating and mapping any of the VHDL nodes or something like that that causes the crash? Still one would think that this should generate an error in LabView rather than generating a "windows crash", but maybe something can cause the file generator to fail completely. It has been working before and I did a very small change when the crashes started, but something is obviously wrong, so...
Since its crashing even before connecting to the compile server, do you think I can rule out any damage/failing on any of the HW (e.g. the National specific HW and my external board and the on-board FPGA? Since I'm running out of ideas myself I guess I could look into that as well, but I can't see that that's the problem.
BR
/Henrik

Labview 2010 Student Edition, will it work with the Labview FPGA module and Xilinx Spartan 3E??

Just as the title states.
I did a search here on compatibility, but I am coming up short with not much to show for it.
I have Labview 2010 student edition, 32bit and 64 bit. I am trying to do a Senior Design project for my undergrad, and I am having some issues.
I was able to download the Support for the Xilinx Spartan 3E and Labview FPGA.
I install it, it runs through the unzipping process, installs, and then mysteriously I cannot find it. I have looked through my programs list and it is not listed. I open both editions of LabView and I find ABSOLUTELY NOTHING indicating that either one has ANYTHING to do with FPGA.
Did I install it wrong? Or is it just not supported in the studend version of Labview???
Can someone help me, please?

M Boat wrote:
What about the trial version? Any chance of it being on there?
I think everything is available for download, and without activation it will be in trial mode and you have about a month (?) before the trial expires.
A trial version of the FPGA module is available for download here. I have no idea if it would work with the student version.
I would recommend to talk to your local NI sales representative for advice. Good luck.
LabVIEW Champion . Do more with less code and in less time .

LabVIEW FPGA Module Error Code 10 when creating bitfile

I am recieving the following error message when trying to compile a vi:
Internal Error
An internal LabVIEW FPGA Module error occurred at the following stage: Creating Bitfile.
Error Code: 10
Error Text: Create Folder in nirviRecursiveCreateFolder.vi-
>nirviRecursiveOpenFile.vi->nirviWriteBitFileInformation.vi-
>nirviCompileDownload.vi->hardware_template.vi
If this problem persists, please contact National Instruments.
Any help would be appreciated. I am not very familiar with LabView, and am trying to run code generated by a grad student several summers ago. If more information is needed, let me know and I will try to provide it.
Thanks

Arkolbus-
It sounds like the compiler is having some trouble creating a folder that it needs to generate the bitfile. First, check all of the usual things: are you an administrator? do you have worte access to the "FPGA Bitfiles" folder in your project?
If it looks like you should be able to write the file, you can try posting your project (zipped) and let someone on the boards try to compile it (be sure to let us know what the versoin is). If we can compile it without issue you may want to try repairing your FPGA module installation.
Xaq "Bulldozer"

NI LabVIEW 2013 FPGA Module Xilinx Tools 10.1 Download Troubles

I am trying to download the Xilinx Tools 10.1 to use with a 9113 chassis in LV2011. Based on this white paper the compiler below should work just fine. The problem is I can't get it to download all the way.
I can't seem to get past ~336MB using the standard or NI downloader. Any ideas? Anybody else having this problem?
http://www.ni.com/download/labview-fpga-module-2013/4249/en/
thanks,
-PBD
Solved!
Go to Solution.

Well... on the bright side, you don't want 10.1 anyway!
Virtex-5 LX50 <- REQUIRES Xilinx 14.4.
10.1 is only for Virtex-II devices! (...after LabVIEW 2009 that is, just so everyone reading this knows).
soo.... try this link: http://www.ni.com/download/labview-fpga-module-2013/4248/en/
Cheers!
TJ G

Errors in the "Getting Started with the FPGA Module" examples

We have LabView 8.0, the NI-5640R, and the LabView FPGA module installed on a computer with the IF-RIO board, and we are trying to compile the provided NI examples (NI-5640R documentation), but we receive errors that say "sub VI is not executable" and "you have connected terminals of two different types" Why are the existing NI VI's not compiling properly? We are guessing that we have some configuration error, though we aren't sure.

The run error is broken and gives the option to list and locate errors, though these errors are found everywhere in the files that are provided in the NI-5640R. Several wires have red x's that say that different types are attempting to be wired, and multiple blocks are highlighted that list errors that say that the blocks cannot be activated. It seems like there is a problem with how the software and board has been installed. The group that used the board before us had a functioning project, although they but the IF-RIO in their own computers, so they might not have put everything back together properly. Their old VI's produce the same errors on our computer. Do you have any suggestions on what to do?

How can I install (download) a Labview FPGA code onto Altera FPGA chip using Labview FPGA module?

Hi there
Guys i'm a very new labview user (PhD student), my project is about ( design and implementation of a high speed-yet sophisticated system using Labview environment then install this project's code (using Labview FPGA module) onto Altera-made FPGA chip).
so kindly, can any body help me in this?...is there any way to connect labview with Altera FPGA?...please anything would be said 'd be of great benifits
thanks a lot in advance.

as previously mentioned, labview fpga only supports national instruments targets utilizing xilinx fpgas. the hdl generated by labview fpga is encrypted and cannot be used to synthesize a design outside the labview fpga design flow.
however, if you must use labview for your project, it might be possible for you to design the system in labview and use one of the labview embedded modules ( http://www.ni.com/embedded )to generate c code which you can then port to systemc and compile for the altera fpga. i'm not saying it will be easy, but it should be possible.

Labview fpga module 8.6

I want use labview FPGA modul 8.6 can somebody help me to dowlaond this modul thanks

Hi scream,
It would best contact your account representative within National Instruments, they will be able to determine how to best deliver this module to you. Thanks!
Matt S.
Industrial Communications Product Support Engineer
National Instruments

Integrating fpga module with standard block diagram

Hi all,
I'm doing an FTIR multitouch table, and I would like to be able to track blobs using LabVIEW then transfer this data to a Spartan 3e FPGA. I have seen the tutorials on how to program the Spartan 3e and have direct communication with LabVIEW, but can I also run image processing via USB-IMAQ VIs in the same block diagram? Basically I need to get coordinate data from the blobs (touch points on the screen) and transfer this data to an FPGA which will act as a primitive graphics card. Any ideas are appreciated.
Thanks...

Zzzyzx,
Hello! You should be able to use your Host VI to talk to Both the FPGA and the USB-IMAQ devices. You would just have two loops running at the same time, one for each device's communication. To pass data between the loops (from the vision to the FPGA) you could use a Consumer Producer Architecture.
I assume you are referring to these tutorials?
Using the Xilinx Spartan 3E XUP Hardware with LabVIEW FPGA
Using LabVIEW FPGA with the Xilinx SPARTAN-3E XUP Video Tutorial
LabVIEW FPGA Module Training for Xilinx Spartan 3E XUP Hardware
Ben Sisney
FlexRIO V&V Engineer
National Instruments

Accessing the 40MHz clock on the PXI-7831R FPGA Module

How do you access the 40MHz clock on the PXI-7831R FPGA Module?
I'm trying to the FPGA to do RS-422 communication with UART and HDLC protocols. I want to divide the clock signal to generate the necessary baud rates. I've downloaded the FPGA serial examples as a start, but I'm looking for a direct connection to the 40MHz signal.
I'm Using LabVIEW 7.1 and FPGA Module 1.1 with the LabVIEW Embedded Project Structure.

settlesj,
If you are looking to have access to a 40MHz digital signal, it is possible to generate and acquire one using 7831R and LabVIEW FPGA module. To do this you would need to take advantage of the different compile speeds available with the FPGA module. The available compile clock frequencys are: 40MHz, 80MHz, 120MHz, 160MHz, 200MHz
For example to generate a 40MHz pulse train you could compile with 80MHz clock frequency (2 clock pulses are needed for a square wave period).
You will have to be careful when generating code because compiling with a clock frequency higher than the default one (40MHz) could give compile errors in some cases. These errors could happen more frequently if the code is more complex and needs more time to be executed.
I have attached an example program that generates a 40 MHz signal on a digital line. From there you could divide down the clock rate to which ever specified baud rates you needed. As a side not the LabVIEW FPGA 8.0 Module added the ability to derive additional clocks from FPGA base clocks in a LabVIEW project. Hope this helps.
Steven B.
Attachments:
Test40MHz.zip ‏57 KB

Labview fpga module Spartan 6 LX9 FPGA

Does Spartan 6 LX9 FPGA supported in labview FPGA module ?

varunme,
The only FPGA targets that can be programmed with LabVIEW FPGA are National Instruments FPGA products (cRIO, sbRIO, R-Series, FlexRIO, etc) and the Xilinx Spartan 3E XUP board. Unfortunately, LabVIEW FPGA doesn't support third party devices containing the LX9 FPGA.
-Nick-
Nick C | Staff LabVIEW Platform Product Support Engineer | National Instruments

Can LabView FPGA module work with non-NI FPGAs?

Simple Question: Can the LabView FPGA Module work with other FPGAs? Im assuming yes, but id like ot make sure first. Normaly I go with NI for most of my stuff, but they just are lacking in the FPGA hardware for what I need, but Im accustumed to LabView so I would like to stick with that to program it.
Thanks!
-Mark

Using LabVIEW and LabVIEW RT you can access the registers on any PCI/PXI card using the NI-VISA driver. NI-VISA also allows you to handle interrupts and DMA data. For interrupts you will not actually write an interrupt service routine (ISR) in LabVIEW. Instead the VISA driver will acknowledge the interrupt to the card and then pass a VISA event to the LabVIEW application letting the application know that it needs to process the interrupt. Detailed information about this type of programming is available in the following documents.
Using the VISA Driver Development Wizard and NI-VISA to Register-Level Program a PXI/PCI Device unde...
Configuring LabVIEW Real-Time and NI-VISA to Recognize a Third Party Device
Configuring LabVIEW Real...
Developing a LabVIEW Real-Time Driver for a PXI or Compact PCI Device
Porting a Windows PCI Device Driver to LabVIEW Real-Time
Considerations in Implementing LabVIEW Real-Time Drivers
Christian L
Christian Loew, CLA
Principal Systems Engineer, National Instruments
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FPGA module unzip problem

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