IO fails working for low frequency, but work well for higher frequency

Question

On our customized VU440 board, we did a IO performance test for each bank and found a strange problem, in the design,we send out 24bits Pseudo random data and loop back this data to the same bank with our testing board, on which the pins for tx and rx are only connected in short circuit, one differential clock is transfered to single-ended global clock in the design, using IBUFDS+BUFG to provide the global clock for tx module and rx module.
howeve, we use vivado debug tool to check the data looped back, only found when the clock is 200MHz around, the data is correct, but if fails to get correct data when the clock is much lower, for example, 10MHz ~100MHz. And from the waveform we got, we identified the status for some pin was un-normal when the data bus failed to get correct data.
we have found the problematic IO pins, but did not know why the problem come out, normally, we think it's normal for the IO pins fail to work when the frequency is too high, but in our case, the issue is on the contrary, we don't understand why it works for some higher frequency but fail to run when it's much lower.
we now try to check our PCB also, but have no clue at present. 
Some guys have any idea or suggestion to check for the reason?
thx~

Answer 1

Hi,
What is the IO standard that you selected for the TX and the RX. How long is the loopback cable?
Do you have proper terminations on the board? Because in general, all IO Standards need some terminations which are mentioned in the respective SelectIO user Guide for that device. Please check that.