Is the bit file the programming file?

Question

Hi all
I have a design that came to me as part of an evaluation board from a vendor. The vendor's design has something like 10 clocks, most derived from a single input clock using PLLs and DCMs. Their UCF has very few timing constraints (shown below), but ISE finds 4 violations of constraints that Timing Analyzer must arrive at on its own. Some seem pretty serious (-5ns slack sounds like a lot to me), BUT: ISE generates a new bitfile anyway!
Main question: Is the bitfile being generated because the failures aren't due to explicit constraints?
(One more twist, maybe: The bitfile generator fails, and blames these timing violations, if I try to include an ILA. It also refuses to open the contraints editor until I remove the ILA from the design.  I've seen a couple of threads in this forum that gave me some ideas, so I'm going to try some things and open a separate thread if I can't resolve this myself).
from the UCF:
## TIMING CONSTRAINTS
NET "clk_100m_p" TNM_NET = "clk_100m_p";
TIMESPEC "TS_clk_100m_p" = PERIOD "clk_100m_p" 10 ns;
INST i_tsc_cmv12000_clocking/SRL16_inst/SRL16E TNM = TNM_SLR16;
INST "rb1*" TNM = TNM_RB;
TIMESPEC TS_RB = FROM TNM_SLR16 TO TNM_RB 10 ns;
INST "i_tsc_cmv12000_clocking/SRL16_inst/SRL16E" TIG=TS_clk_100m_p;
NET "clk_rx_p" TNM_NET = "clk_rx_p";
TIMESPEC "TS_clk_rx_p" = PERIOD "clk_rx_p" 3.33 ns;
'clk_100m_p' is the + side of the differential input for the clock everything else is derived from.
'INST i_tsc_cmv12000_clocking/SRL16_inst/SRL16E TNM' refers, I think, to a DRP-controlled PLL, or to the FIFO that queues commands to it.  'rb1*' refers to the register bank that runs everything in the FPGA.
'clk_rx_p' is the + side of a differential clock output to another component.
 

Answer 1

Main question: Is the bitfile being generated because the failures aren't due to explicit constraints?
The tools do not prevent bitfile generation due to failure to meet timing.
The bitfile generator fails, and blames these timing violations, if I try to include an ILA
I've never encountered that.