Labview fpga development board

hi all
can i programme my own development board having xillinx fpga using labview fpga .. or lab view fpga can only be used by national instruments hardware ?
Regards

Just to reiterate what was already said, The LabVIEW FPGA generates VHDL code that can not be used or downloaded into non-NI hardware, even if it uses the same Xilinx FPGA.
That being said, there is one board that you can use that is not National Instruments, Xilinx SPARTAN-3E XUP Starter Kit
Regards,
Andrew Eddleman
National Instruments
RIO Embedded Hardware PSE
CompactRIO Developers Guide

Similar Messages

  • Labview fpga+Driver for Spartan-3E-1600K Gate Development Board

    hi
     is thier  a device driver for Spartan 3e XC3S1600 (1600K gates) Xilinx FPGA development board. You(NI) are providing driver only for Spartan 3e XC3S500 (500K gates) FPGA Xilinx University program board.
    regards
    hi ?Q>

    Dave.C wrote:
    Hi again,  
    I can understand your frustration, but unfortunately I don't have those details.  
    what is the problem that make ni not make driver for sp 1600 3e
    is it related to money or  other issue with xilinx company?? 
    hi ?Q>

  • Spartan-6 FPGA Dev Board plays Doom, a first-person shooter video game from 1993

    Yesterday, I mentioned a port of Professor Nicklaus Wirth’s Oberon programming language and operating system to Saanlima's Pipistrello, a Spartan-6 FPGA development board. (See “Oberon System Implemented on a Low-Cost FPGA Board.”) There are many uses for a dev board however and one of the other ports to this board is the first-person shooter called “Doom,” which was originally developed to run on DOS PCs by id Software.
    This FPGA-based implementation uses a recompilation of a source port called “Chocolate Doom” that runs on a 100MHz Xilinx MicroBlaze soft processor instantiated in the Pipistrello board’s Spartan-6 LX45 FPGA with additional HDL to handle the mouse, game controllers, video, and sound. Now running recompiled code for an x86 microprocessor on an FPGA-based, soft-core processor might not be the most obvious way to fully employ a Spartan-6 FPGA, but I think it’s a pretty cool demo nevertheless.
    Here’s a short, 26-second video showing DOOM running in demo mode on the Spartan-6 LX45 FPGA:
    Note: There are no sound effects in this short video because we didn’t hook up any speakers to the Pipistrello board.
     

    Excellent!
    Gotta try Pac-Man. It is so much like the arcade version from the 80's it's scary. Also, Magnus has the Pipistrello working so well you can re-flash to/from Oberon to Pac-Man (or whatever) almost instantly. I mean, flash and boot in under 2 seconds. Quite impressive.
     

  • How to use LabVIEW FPGA on Custom FPGA board other than NI products .....Also how to develop RTx DLL for a customised motion controller hardware

    I'm using RTx, LabVIEW RT and LabVIEW FPGA.
    The GUI is windows based. The motion control and FPGA  are RTx based.
    Is there any way to develop device drivers for the custom hardware in RTx. For example motion controller hardware, FPGA hardware, PCI hardware.
    Is there a possibility to use custom FPGA boards to use with LabVIEW FPGA.
    Please send me some links
    Thanks
    Bhoopathy
    Take life as it comes! you may never know what's gonna happen Tommorrow

    CODE WARRIOR Hello. I believe this question was answered in a previous post. Please let us know if you have any new questioins or if you need some clarification.
    You are able to develop device drivers for your custom hardware using the NI Measurement Hardware Driver Development Kit.
    However, it is not possible to use custom FPGA boards with LabVIEW FPGA. The FPGA boards have to be one of our R Series boards. Here are some links that should shed some light on the Measurement Hardware DDK.
    Measurement Hardware Driver Development Kit Frequently Asked Questions
    NI Measurement Hardware DDK (Driver Development Kit)
    Please post if you have further questios.
    Efosa O.
    NIAE

  • Why should I adopt LABVIEW FPGA as a tool for developing my FPGA projects?

    Dear Friends, 
    Since I have started using LABVIEW FPGA, I got too many questions in my mind looking for answers! 
    1-      Does anybody can tell me “why should I adopt LABVIEW FPGA as a tool for developing my FPGA projects?”
    I mean there are many great tools in this field (e.g. Xilinx ISE, ….); what makes LABVIEW FPGA the perfect tools that can save my time and my money? 
    I’m looking for a comparison can show the following points:
    ·         The Code size and speed optimization.
    ·         Developing time.
    ·         Compiling time.
    ·         Verifying time.
    ·         Ability to developing in future.
    ·         …etc.. 2-     
    I’ve Spartan-3E kit, I’m so glad that LABVIEW support this kit; I do enjoyed programming the kit using LABVIEW FPGA, but there are too many obstacles!
    The examples come with Spartan-3E driver don't cover all peripherals on board (e.g. LAN port is not covered)! There is a declaration at NI website which is "LabVIEW FPGA drivers and examples for all on-board resources" Located at: http://digital.ni.com/express.nsf/bycode/spartan3eI don’t think that is true!
    Anyway, I will try to develop examples for the unsupported peripherals, but if the Pins of these peripherals are not defined in the UCF file, the effort is worthless! The only solution in this case is to develop VHDL code in ISE and use it in Labview FPGA using HDL node!?
    3-      I wonder if NI has any plan to add support for Processor setup in Labview FPGA (Like we do in EDK)?
    4-      I wonder if NI has any plan to develop a driver for Virtex-5 OpenSPARC Evaluation Platform ?http://www.digilentinc.com/Products/Detail.cfm?Nav​Path=2,400,599&Prod=XUPV5 
    Thnaks & regards,Walid
    Solved!
    Go to Solution.

    Thanks for your questions and I hope I can answer them appropriately
    1. LabVIEW FPGA utilizes the intuitive graphical dataflow language of LabVIEW to target FPGA technology. LabVIEW is particularly nice for FPGA programming because of its ability to represent parallelism inherent to FPGAs. It also serves as a software-like programming experience with loops and structures which has become a focus of industry lately with C-to-gates and other abstraction efforts. Here are some general comparison along the vectors you mentioned
    Code Size and speed optimization - LabVIEW FPGA is a programming language. As such, one can program badly and create designs that are too big to fit on a chip and too slow to meet timing. However, there are two main programming paradigms which you can use. The normal LabVIEW dataflow programming (meaning outside a single-cycle loop) adds registers in order to enforce dataflow and synchronization in parity with the LabVIEW model of computation. As with any abstraction, this use of registers is logic necessary to enforce LabVIEW dataflow and might not be what an expert HDL programmer would create. You trade off the simplicity of LabVIEW dataflow in this case. On the other hand, when you program inside a Single-Cycle timed loop you can achieve size and speed efficiencies comparable to many VHDL implementations. We have had many users that understand that way LabVIEW is transformed to hardware and program in such a way to create very efficient and complex systems.
    Development Time - Compared to VHDL many of our users get near infinite improvements in development time due to the fact that they do not know (nor do they have to know) VHDL or Verilog. Someone who knows LabVIEW can now reach the speeds and parallelism afforded by FPGAs without learning a new language. For harware engineers (that might actually have an alternative to LabVIEW) there are still extreme time saving aspects of LabVIEW including ready-made I/O interfaces, Simple FIFO DMA transfers, stichable IP blocks, and visualizable parallism.  I talk to many hardware engineers that are able to drastically improve development time with LabVIEW, especially since they are more knowledgable about the target hardware.
    Compilation Time - Comparable to slightly longer to due to the extra step of generating intermediate files from the LabVIEW diagram, and the increased level of hierarchy in the design to handle abstraction.
    Verification Time - One of our key development initiatives moving forward is increased debugging capabilities. Today we have the abilities to functionally simulate anything included in LabVIEW FPGA, and we recently added simluation capabilities for Imported IP through the IP Integration node on NI Labs and the ability to excite your design with simulated I/O. This functional simualation is very fast and is great for verification and quick-turn design iteration. However, we still want to provide more debugging from the timing prespective with better cycle-accurate simulation. Although significantly slower than functional simulation. Cycle-accuracy give us the next level of verification before compilation. The single cycle loop running in emulation mode is cycle accurate simluation, but we want more system level simulation moving forwrad. Finally, we have worked to import things like Xilinx chipscope (soon to be on NI Labs) for on-chip debugging, which is the final step in the verification process. In terms of verification time there are aspects (like functional simulation) that are faster than traditional methods and others that are comparable, and still other that we are continuing to refine.
    Ability to develop in the future - I am not sure what you mean here but we are certainly continuing to activiely develop on the RIO platform which includes FPGA as the key diffentiating technolgoy.  If you take a look at the NI Week keynote videos (ni.com/niweek) there is no doubt from both Day 1 and Day 2 that FPGA will be an important well maintained platform for many years to come.
    2. Apologies for the statement in the document. The sentence should read that there are example for most board resources.
    3. We do have plans to support a processor on the FPGA through LabVIEW FPGA. In fact, you will see technology on NI Labs soon that addresses this with MicroBlaze.
    4. We do not currently have plans to support any other evaluation platforms. This support was created for our counterparts in the academic space to have a platform to learn the basics of digital design on a board that many schools already have in house. We are currently foccussing on rounding out more of our off-the-shelf platform with new PCI Express R Series boards, FlexRIO with new adapter modules, cRIO with new Virtex 5 backplanes, and more.
     I hope this has anwered some of the questions you have.
    Regards 
    Rick Kuhlman | LabVIEW FPGA Product Manager | National Instruments | ni.com/fpga
    Check out the FPGA IPNet for browsing, downloading, and learning about LabVIEW FPGA IP Cores

  • LabVIEW FPGA driver for Xilinx SPARTAN 3E Starter Board

    i need drivers for spartan 3E .

    If you are at a university that has a site license for the FPGA module, the following might be of interest to you:
    Using LabVIEW FPGA with the Xilinx SPARTAN-3E XUP Starter Kit
    See also this discussion.
    Quote from the license agreement:
    ...INSTALLATION AND USE OF THE LABVIEW FPGA TARGET MODULE FOR THE XILINX SPARTAN-3E STARTER BOARD (THE “TARGET MODULE”) IS LIMITED TO ACADEMIC INSTITUTIONS THAT HAVE A VALID, CURRENT “ACADEMIC TEACHING LICENSE” FROM NATIONAL INSTRUMENTS FOR THE LABVIEW FPGA MODULE. THIS TARGET MODULE MAY ONLY BE USED FOR INSTRUCTIONAL PURPOSES, SUBJECT TO THE TERMS AND CONDITIONS OF THE NATIONAL INSTRUMENTS SOFTWARE LICENSE AGREEMENT THAT ACCOMPANIES THE SOFTWARE...
    LabVIEW Champion . Do more with less code and in less time .

  • Using FPGA and Labview without RIO board.

    Dear Sir
    I am a student. I want to connect my own FPGA and make a program on labview and then transfer to FPGA.I do not want to buy RIO.Is it possible to work
    like that without purchasing RIO.
    Thanks a Regards

    Hooovahh wrote:
    Yes NI supports programming FPGAs using LabVIEW without RIO boards I've been doing it for years and it works great.  Here are a few non-RIO products I've used LabVIEW FPGA with.
    PCI-E Version
    PXI Version
    USB Version
    The PCIe and PXI cards you mentioned are specifically RIO.
    But you managed to program a USB-6225 with LV FPGA?  I'm not even sure there is an FPGA on there to program.  It is an M series DAQ board.
    There are only two ways to tell somebody thanks: Kudos and Marked Solutions
    Unofficial Forum Rules and Guidelines

  • Labview for stm32f103 development board?

    hi,
    good evening, i'm a student who's currently working on a thesis that involves the stm32f103 development board. our board uses a 32-Bit ARM Cortex-M3 Processor with a 128KB flash memory. it also has RS232 and USB ports for direct connection to the computer. i was just wondering if there are any labview products that are compatible with our board?

    Hi mat2_chan2,
    You have a few options depending on what you mean by "compatible with our board."  There are 2 options I see:
    1) You can use LabVIEW to communicate with your evaluation board (through RS232 or USB).  If you've already got your code working as you wish on the evaluation board, this would be the option for you.
    2) You can use LabVIEW and the LabVIEW for ARM module to download actual LabVIEW code to the board itself.  I tried to identify whether or not your chipset would be supported, but you didn't specify enough information.  You can look here: RL-ARM Real-Time Library.  (Chips for which the RL-ARM Real-Time Library exists can support LabVIEW code.)  More information can be found at www.ni.com/arm.  This method would require background work in order to port LabVIEW to your chip - integrating all of the chip's functionality into the LabVIEW environment.  (If you're really tight on time, you need to take this into account.)  See this link: Programming Additional ARM Microcontrollers with LabVIEW (without the LabVIEW Microprocessor SDK)
    I hope this helps,
    Kevin S.
    Applications Engineer
    National Instruments

  • Need SPARTAN 3E board Driver for Labview FPGA 8.5 !!!!!! Thx

     HI!!I need the spartan 3e driver for labview 8.5(not for labview 8.6) for school useI try to download it from ftp://ftp.ni.com/outgoing/NISPARTAN3ELV85.zip
    but this link is dead now. Could somebody send this driver to [email protected] PLZ? Thank you a lot for all in advance
    Solved!
    Go to Solution.

    Hello,
    I'm looking for same (Labview FPGA 8.5 for Spartan 3E). But it isn't available on related url now. I'll be glad if someone can help to find driver.
    Best regards, 

  • Interface Labview with custom board

    Hello, I want to use Labview with a board I designed. To be brief my board has an Altera FPGA, some memory, and a fiber-optic transceiver. I want to develop a Labview program to display the data I'm receiving from my fiber-optic transceiver. I want to know if this is possible to have Labview interface with a non-National Instruments board? What do I need in order for Labview to work with my board. In my previous design I had the received data written directly to the computer's main memory. Could I do something like that, just tell Labview where in memory to get the data to be displayed?
    thanks,
    joe

    Absolutely. I'm doing that right now with VISA. Look at the posting here. There are some links there in how to procede.

  • Qual a diferença do LabVIEW FPGA e o LabVIEW REAL- TIME?

    Hello,
    Could anyone help me? This question arose in my work and could not answer. Does anyone know tell me?
    Thank you.
    Solved!
    Go to Solution.

    Olá, 
    Com o LabVIEW FPGA você programa diretamente o chip FPGA presente no chassis cRIO, placas da NI Série R e single Board RIO. Você programa as E/S diretamente no chip, sendo assim uma programação de mais baixo nível. A grande vantagem do FPGA é o "paralelismo real", o que garante altas velocidades na execução das rotinas programadas.
    Assista ao webcast Introduction to LabVIEW FPGA
    Com o LabVIEW Real-Time você desenvolve aplicações que são críticas em relação a "tempo". Chamamos de aplicações "deterministicas". A idéia é que, se você tem uma rotina que deve ser executada em um tempo determinado, a diferença entre o tempo real e o que você programou seja o menor possível. Aplicações em Computadores comuns não são deterministicas, pois enquanto o LabVIEW executa uma certa rotina programada, o Windows está executando outras tarefas, monitorando a utilização de periféricos, atualizando a tela, etc.
    Real time não significa "Velocidade", mas "Confiabilidade".
    Assista ao webcast LabVIEW Real-Time: Graphical Development, Hard Real-Time Performance
    Hello, 
    With LabVIEW FPGA you program the FPGA chip itself. The FPGA chip is found into cRIO chassis, NI R-Series Boards, and NI Single board RIO. You program the I/O directly in the chip, so we consider this as a low level programing. The main FPGA advantage is the "Real Paralelism", which guarantees high speed execution programming.
    Whatch Introduction to LabVIEW FPGA webcast
    With LabVIEW Real-Time you develop called "time crictical" or "Deterministics" applications. In case of you routine must be executed in a specified period of time, the difference between the real time execution and the time you programmed is as low as possible. Commom computers programming are not deterministic, because in the meantime of executing a certain programmed routine, the OS (e.g. Windows) is running other appication tasks, monitoring peripherals like mouse and keyboard, uptading screen, etc.
    Real-Time doesn't mean "faster" but "reliable".
    Watch LabVIEW Real-Time: Graphical Development, Hard Real-Time Performance webcast
    I hope the information helps you!
    Best Regards
    Felipe Flores
    Engenharia de Aplicações
    National Instruments Brasil

  • How exactly does the memory in Labview Fpga work

    I am using a PXI 7853 and I for the past few days I have been playing around with using Memory blocks in the FPGA .
    Now I am relatively new to Labview FPGA programming and hence I would be grateful if someone could provide me with clarifications on teh following :
    a) Since I am working on the development host computer when I initialize the Memory with the option of using a Memory initialization VI then how does it exactly happen in the backend .What I mean to ask is , when i change values of memory in the development computer and then compile the FPGA VI into the board ,is it that the Memory information is ported into the FPGA .If this is the case then in what form are the details initially saved in the development computer .
    b) Is it possible for me to use the initialization VI method to change the valuesi n memory while the FPGA VI is running .If not ,then would it make a difference if I stop the VI and then change the values using initialization method .Would that actually reflect on the FPGA or should I have to re compile the FPGA VI every time I change the memory values in the development computer using the 'Initialization VI method ( that is available as an option when we right click on the memory block in the project explorer window )
    I tried testing with simulation for FPGA VI and found that when i try to change the memory values by running the initialization VI . a pop up comes that says that it is not possible as the FPGA VI is still in use .
    Any light on this or guidance with links would be highly appreciated 
    Cheers 
    sbkr
    Solved!
    Go to Solution.

    sbkr wrote:
    a) Since I am working on the development host computer when I initialize the Memory with the option of using a Memory initialization VI then how does it exactly happen in the backend .What I mean to ask is , when i change values of memory in the development computer and then compile the FPGA VI into the board ,is it that the Memory information is ported into the FPGA .If this is the case then in what form are the details initially saved in the development computer .
    When you compile the FPGA VI, it will include the values used to initialize the memory.
    Are you asking what happens if you run the FPGA VI on your development computer, and your FPGA VI writes to the memory block, will the new values be included when you compile the FPGA VI? No, those values will be lost. The values that are included in the bitfile are the values that you used to initialize the memory block, as defined in the memory properties dialog box. The initial values are saved in the LabVIEW project file along with the memory block definition.
    sbkr wrote:
    b) Is it possible for me to use the initialization VI method to change the valuesi n memory while the FPGA VI is running .If not ,then would it make a difference if I stop the VI and then change the values using initialization method .Would that actually reflect on the FPGA or should I have to re compile the FPGA VI every time I change the memory values in the development computer using the 'Initialization VI method ( that is available as an option when we right click on the memory block in the project explorer window )
    You need to recompile the FPGA in order to use new initialization values, because those values are part of the FPGA bitfile.

  • Labview fpga with nexys 2

    hi my friends I want to know I can use labview FPGA with nexys 2 and there are some device about this FPGA (nexys 2) because we have this circuit board and we want to do the project with labview you can found some information about nexys 2 in this file and thank you for your help
    Attachments:
    Nexys2_rm.pdf ‏986 KB

    Hello,
    As this forum thread states, LabVIEW FPGA is only for the SPARTAN-3E XUP Starter Board and NI Reconfigurable I/O devices. Even though the nexys 2 is based from the Spartan 3E, we can’t be sure that the driver that we release for the Spartan 3E starter board works for the nexys 2.
    Regards,
    Daniel REDS
    RF Systems Engineer
    Help us grow.
    If a post solves your question, mark it as The Solution.
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  • LabVIEW FPGA PMW modulation for L298n H-bridge

    Hello to everyone,
    I am new in LabVIEW FPGA programing and I have a couple questions, so I would be grateful if you could answer me. For my final work I have to control the speed and direction  of DC motor  using sb-RIO 9636 and H-bridge L298n. In attachments you can find scheme of the H- bridge and my program. I have conected In1(pin 5 of L298n) to digital pin 1 of the card, In2(pin 7 of L298n) to digital pin 2 of the card and changing the state of the pin I change the direction of the motor(I know that the one In should be Low and the other High so the motor can rotate  in one or the other direction). PWM(Enable pin of the L298n pin 6) I have conected to DIO3.
    PWM signal I cretaed is  shown in picture.
    My questions are:
    1.Will loop timer I used, provide that period of signal is lenght I specify in the control(for example if I put 20 000  will the period be 20000 s)?
    2. Can I vary the duty cycle changing the control Waiting (DIO3 is HIGH for a couple of us, then it sets LOW, and then all that repeats )?
    3. Earlier I thaugt that PWM signal I should send in both IN1 and IN2, and that the Enable pin is used to stop or start the motor. I tried that and the motor was rotating different speed, and I could stop or star the motor with enable pin, sending it HIGH OR LOW, but I could not change the direction of the motor. So my other option was to conect the pins as I explained at the begining.  My question is: Should I PWM conect to the enable pin, and will thah work?
    Thank you

    I found a couple of resources that deal with PWM on the FPGA and motor control - they might be helpful to reference as you look for answers to your questions.
    Developing a PWM Interface using LabVIEW FPGA
    http://www.ni.com/white-paper/3254/en/
    CompactRIO Motor Control Basics Tutorial
    http://www.ni.com/pdf/labview/us/compactrio_motor_control_basics.pdf
    PWM Output With LabVIEW FPGA
    http://www.ni.com/example/26499/en/

  • Labview fpga module Spartan 6 LX9 FPGA

    Does Spartan 6 LX9 FPGA  supported in labview FPGA module ?

    varunme,
    The only FPGA targets that can be programmed with LabVIEW FPGA are National Instruments FPGA products (cRIO, sbRIO, R-Series, FlexRIO, etc) and the Xilinx Spartan 3E XUP board. Unfortunately, LabVIEW FPGA doesn't support third party devices containing the LX9 FPGA.
    -Nick-
    Nick C | Staff LabVIEW Platform Product Support Engineer | National Instruments

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