Mise en œœuvre module FPGA

Bonjour a tous,
J'ai un projet ou je dois mettre ne œœuvre un module de type FPGA qui est une carte de chez Wiener, la NPL20. Elle offre 20 ports d'E/S et fonctionne avec du TTL ou du NIM (0V à -0,8V).
Pour cela je dois réaliser un montage avec pour principe de fonctionnement une coïncidence de 4 signaux NIM en entrée. Ce signal de coïncidence sera envoyé sur 4 sortie NIM.
Voici le schéma de mon diagramme actuel (pièce jointe).
Les portes ET réalise le ET logique quand les 2 signaux d'entrée sont à l'état bas (-0,8V) simultanément. Elle délivre alors une tension en sortie de -0,8V. Le reste du temps, elle delivre
une tension de 0V. Mon montage fonctionne correctement. J'ai pu faire des relevés d'oscillo.
Cependant je dois placer à la sortie de chaque porte ET un compteur 32bits qui me permettra de compter les événements... Je ne sais pas trop comment il fonctionne
La description donnée par le fabriquant n'est pas tip top.
Quelqu'un pourrait-il m'éclairer sur ce cpt32bits ?? Et quelqu'un pourrait-il m'expliquer comment se fait t'il que toute mes données sont de type String alors que ce sont des signaux numériques que je relève à l'oscillo ??
Cordialement.
Pièces jointes :
forum_ni.JPG ‏254 KB

Hello yehoudaT,
Je pense qu'il existe de nombreux morceaux de code faisant du comptage d'événéments (edge count) dans LabVIEW et sur notre site, je t'invite à faire un petite recherche pour trouver ce qui correspond le mieux à ce que tu souhaites faire.
Ensuite, pour les chaines de caractères, c'est uniquement l'API utilisée dans LabVIEW (qui vient visiblement de Wiener ?) qui est responsable du type de données.
Cdt,
Eric
Eric M. - Application Engineering Specialist
Certified LabVIEW Architect
Certified LabWindows™/CVI Developer

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Cannot Find Pulse Width Modulation(FPGA, Use in SCTL)

Hello All,
Can someone tell me where I can find Pulse Width Modulation (FPGA, Use in SCTL).vi? I couldn't find it in LabVIEW Example Finder.
Thanks
Message Edited by John Edwards on 02-01-2009 09:30 PM
Solved!
Go to Solution.

Here it is...
Attachments:
Pulse Width Modulation (FPGA, Use in SCTL).vi ‏43 KB

Implementing Serial Communication in LabVIEW FPGA on the Xilinx SPARTAN-3E Board

je travaille sur la carte spartan 3E et Labview avec le module FPGA.
je veux implémenter une communication serie RS232 entre spartan 3E et PC à l'aide de deux port DB9 (DTE et DCE) sur spartan 3E de tel sorte que j'envoie un cartére sur DTE et je recoie sur l'autre port DCE.
merci pour votre support.

Hi Yassagem,
It looks like you posted something very similar on this forum. I went ahead and responded on that forum post. In the future, please make sure not to duplicate forum posts.
Best,
tannerite
Tannerite
National Instruments

Tick Count Express VI outputs '0' on FPGA target running with Simulated I/O

When I set my target to "Execute VI on Development Computer with Simulated I/O", the Tick Count VIs all output '0 every time they execute. How can I get them to output a progressive count (in the "ticks" instance) or a proper timestamp (in the "ms" instance)?
Solved!
Go to Solution.

I used LabVIEW 2013 SP1 and I was unable to reproduce this issue on my end. The screenshot below shows my result.
As shown on the Front Panel, the output from the Tick Count Express VI was not 0 on every iteration of the loop.
To make sure we are comparing the same code, can you reproduce this issue with the Tick Count shipping example? You can find this shipping example in the Toolkits and Modules>>FPGA>>CompactRIO>>Fundamentals>>Clocks and Timing>>Tick Count section in the LabVIEW Example Finder.
Regards,
Tunde S.
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Have problem in transmitting the CAN message in FPGA

Hi
I have deloped a .vi which is deployed over FPGA.
The VI is having one while loop and inside the while loop I am accessing CAN9853 module(FPGA IO).
I am sending one CAN frame to this module for each iteration of the loop.
When I run that VI (Interectively) I can see all CAN message over BUS monitor(USB to CAN connected to 9853(CAN0)).
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Kindly help.. Is there any settings need to be done.

I think you better take you phone to nokia carepoint, they'll help you with this issue !!!!
NOKIA N73, NOKIA 7250i, NOKIA 1100

FPGA programming for motor control using free downloadable IP cores for PWM and Quadrature encoder interfacing

Hi,
I have a cRIO-9014 with a NI9505 DC brushed servo drive module, and I would like to program the FPGA for PWM and Quadrature encoder interfacing using the intellectual property IP functions mentioned in the "CompactRIO Motor Control Basics Tutorial":
Quadrature Encoder dX Method (FPGA, Use in SCTL).vi
Pulse Width Modulation (FPGA, Use in SCTL).vi
I made a search at ni.com/ipnet but I couldn't find them.
Where can I find free downloadable IP cores for PWM and encoder blocks to include them in my FPGA interface program?
Thanking you in advance,
Manuel
Solved!
Go to Solution.

Found by myself (google search!) at:
https://lumen.ni.com/nicif/us/codepowelecguide/content.xhtml

Coding cRIO 9402 DIO on FPGA

Hi guys,
I am writing an application for the following hardware;
Controller - cRIO 9022
Chassis - cRIO 9114
Modules - 9402 DIO, 9213 Thermocouple I/P, 9205 AI
The 9213 and 9205 are both taking low frequency measurements so I plan using the scan interface for these modules.
One channel of the 9402 will be required to determine the frequency of a digital signal at ~4 MHz so I will have to code this using the FPGA interface. Two other channels will be required to output low frequency digital signals.
I have looked at the Count and Period (FPGA) example in the example finder;
In my application, instead of generating the pulse train, would the 'Digital Signal' in the timed loop be replaced with an I/O node? And the While Loop removed?
How could I expand this to write Boolean values (communicated from the host vi) to 2 other outputs?
I have read the cRIO Developers Guide which uses DMA FIFOs to communicate between Host and FPGA, would I require multiple DMA FIFOs? This is the first application I have written for a cRIO target so any and all tips/references are appreciated
Many thanks,
Pete
Regards,
Peter D

Hi Dan,
Thank you for the reply.
I was planning on running in Hybrid Mode as you mentioned, although you're probably right that coding straight to the FPGA will avoid some hiccups.
I will interleave the analogue inputs and thermocouple inputs as these are both measurements taken at similar frequencies.
I had a quick go at making a host and FPGA VI to the analogue inputs from the AI and Thermo modules;
FPGA.vi
Host.vi
This doesn't run at the moment but I think it's because I'm simulating the hardware, as it arrives early next week. I still have a couple of questions about how to expand this to include the digital module.
If I want a 'Digital Acquisition' loop to run on the FPGA at a different sample rate to I just make another loop with a lower 'Data Rate' constant?
How would I then read from the new DMA FIFO on the host VI?
I think the reason I am having trouble is that I can't find examples which have multiple IO running on the FPGA at different sample rates.
Thanks again,
Pete
Regards,
Peter D

Real time 10.0.1?

Bonjour,
Pour les besoins d'un tp, nous avons fait l'acquisition d'un ensemble cRIO-9074 équipé de 3 module (NI9201, NI9211, NI9401). Aussi avant de le mettre sur paillasse, je tente d'apprivoiser la bête.
Donc j'ai fait à la va vite un VI, me permettant de mesurer une température à l'aide d'un thermocouple.
Au moment d'exécuter ce VI, lors du déploiement sur le fpga, g le message d'erreur suivant : Accès refusé : cette cible exécute une version de LabVIEW Real-Time différente du module Real-Time sur l'ordinateur hôte. Vous pouvez vérifier la version et réinstaller le logiciel Real-Time avec Measurement & Automation Explorer.
Au regard de MAEX, en effet sur la partie logiciel du cRIO, je vois apparaitre Labview Real Time 10.0.1, tandis que sous LV2009SP1, il est mentionné Real-Time 9.0.1.
Est ce qqn peut me confirmer que mon problème trouve bien son origine ds la différence de version? et est que l'on peut m'indiquer si il est possible de mettre à jour mon module RT de Labview 2009?
Cordialement.

Bonjour,
Le problème vient bien de là. Il faut toujours avoir des versions identiques de LabVIEW entre le PC hôte et la cible RT.
Cependant, il ne s'agit pas de faire une mise à jour du module RT sur LabVIEW 2009, car les versions sont assimilées. RT 9.0.1 correspond à LabVIEW 2009 SP1.
Il vous suffit de reconfigurer la cible pour qu'elle corresponde à votre configuration PC.
Pour cela, allez dans MAX, puis cliquez sur votre cible, et sur Logiciels.
faites un clic droit sur Logiciels pour demander à installer des logiciels.
Ensuite, choisissez le package qui vous convient avec la version qui vous convient, et demandez à l'installer
Cordialement,
Olivier L. | Certified LabVIEW Developer

Compatibilité de Labview 2010 et NI-RIO 3.2.1

Bonjour,
          J'ai un CompactRIO NI-9024 (contrôleur) et NI-9118 (châssis). Je viens de passer de Labview 2009 à Labview 2010. J'ai entre autres installé les module real-time 2010, softmotion2010f1 et module FPGA 2010.
En ouvrant un projet comme Servo Interface (9514), Labview donne une erreur sur le contrôleur 9024 me disant que les plug-in ne sont pas installé. Est-ce que la version du driver NI-RIO 3.2.1 peut être en cause. Dois-je installé le NI-RIO 3.5.1 pour être compatible avec Lbaview 2010?
Merci
Mathieu
Résolu !
Accéder à la solution.

Bonjour,
               J'ai installé le NI-RIO 3.5.1. Je peux maintenant ouvrir des projects exemple sans erreur. Par contre, j'ai un nouveau problème. Je suis capable de voir le CompactRIO dans MAX. J'ai d'ailleurs mis à jour le driver dans mon NI 9024 (voir pièce jointe) et donner l'autorisation à Labview dans le Pare-feu Windows.
Cependant, je ne suis pas apte à lire détecter le CompactRIO et ses modules lorsque je crée un projet Real-Time ou un projet FPGA.
   - Le CompactRIO est sous tension.
   - L'ordinateur a été redémarré.
   - Le câble Ethernet est branché dans mon ordi et dans le port 1 du NI 9024.
Avez-vous une idée du problème?
Merci à l'avance
Pièces jointes :
MAX.jpg ‏209 KB
MAX_2.jpg ‏342 KB

Labwindows recompiles files when I switch from the development environment to another application

I am writing a labwindows driver, but having issues with the environment itself. I am able to compile the .c file for the driver, and my panels are working. I am having problems with labwindows recompiling the .c file even though nothing has changed. It is a random problem that I have seen before, but never managed to get around. The problem shows up in a variety of instances.
I.E. While in interactive execution, I can click on another application on the taskbar (internet explorer, email, etc.) and labwindows displays a message that the c file is being recompiled. Nothing in the file changed! Why does it try and recompile when it is simply losing focus? This is 'random'. Just when I think I have found a way to reliably reproduce the issue, it quits recompiling when I switch applications. I have tried playing with the build options, but haven't had any repeatable success. I even tried to enable the -o option, but is still recompiles the file. (maybe -o won't work on a driver since it won't build without a main?) I have even had issues with calling printf in a function during interactive execution. It recompiles the c file for no apparent reason right after the stdio window prints the message. At this point, the stdio window closes, and labwindows pops up the compiling message again. It kills my interactive session, and I have to redeclare all of my variables to continue checking out my driver.
I see the same issue randomly when I go back to the project from another application. (Click on labwindows in the taskbar, and it immediately compiles the c file.)
I have seen this in other projects, and it appears that the issue is limited to instrument drivers. When labwindows pops up the message that it is compiling files it is almost always a driver that is loaded as an instrument. I played with unloading the instrument but leaving the .fp in the project, but I don't think that worked. (It has been awhile since I tried to figure this out.) When working on a driver, it would be difficult to unload the .fp or not load the instrument anyway.
(I just clicked on labwindows in the taskbar to see if I left anything out. Labwindows popped up the message that it was compiling the c file. It appears that I can go back and forth between the labwindows icon in the taskbar and the cvi icon ~15-20 times and then labwindows will recompile the file. I even walked away from my computer for a couple of minutes, and it compiled when I came back and clicked on the labwindows icon.)
I am running labwindows 9.1 (but have seen this on 8 also)
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My pc is currently running Windows XP sp3.
I first saw this issue when I went from LabWindows 7.1? to 8.1? I am sure that I had the issue in 8.1
I was able to reproduce the issue in production on a pc running windows 2000. (Which is what I had at my desk previously, and had seen the issue.)
I asked another member of the test engineering group, and I am not the only one seeing the issue.
One of the earlier replies mentioned the auto save feature. When I went to production to see if I could reproduce the problem there, I opened CVI and explorer. I wanted to check the time-date stamp on the .c file that keeps recompiling. The time-date stamp was a day old, and did not change when the period of time for auto save was passed. (It probably would if I made changes but didn't save the file?) I was able to switch back and forth between the explorer window and cvi, and the file would recompile. I played with turning off the auto save, enabling the build status window, making the -o option compatible with cvi 5.0, displaying the build status column, etc. It appeared at one point that it had quit recompiling when switching between applications. I went back to my desk, and tried to match the settings, but never reached the same conclusion.
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I haven't been able to find anyone outside of where I work reporting the same issue. Maybe it has something to do with IT/viruscan/etc. It is definately a strange issue.
(I have switched back to CVI several times while writing this, and the .c filed recompiled about 20% of the time. At one point, I had left the build options dialog open when switching back and forth. I did not change any options, but the .c file recompiled when I closed the options window?)
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Running out of idea.
Desperate for solution.
Background
OS X Server 10.4.9
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Ok, I ran memtest 4.2 and discovered the ram was failing, In replacing the dimm, they started working again so it may have been a mis-seated dimm module or some oxidation on the contact. My file system was already corrupt despite it being a fresh install. Then I checked and notice that the file com.apple.servermgrd.plist in Library preferences was gone. Either I stuppidly deleted it trying to fix the problem or it was hosed by the memory/file system corruption. Anyway, I copied it from another server and Both Server Admin and Server Monitor are now working.
SOLVED.
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Hi,
After executing CNE5 report it not showing BCWP value in particular project only.I have checked all the necessary data like actual dates are maintained.
What could be the reason.
Please guide.
Regards
Nitin

Hi,
Thanks for reply.
I've already done that.
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How to config cRIO... Help.

I am using a cRIO 9012 and am toatally new to Labview and all the NI peripherals. I am stuck with configuring the cRIO for measuring from a loadcell. Am using a universal module for excitation and output from the loadcell.. My problem is i have no idea of how to set the excitation voltage and conversion of the data thus obtained to a millivolt value in the software.

Hello,
The basic architecture for LabVIEW FPGA applications (generally) consists of code running on your FPGA which determines your data acquisition rate. The values are read onto your real-time or Windows based host VI at which point they are converted from integer to the double precision number which they are meant to represent.
It sounds as if you might want to take a look at some of the resources that are available to help get you started programming LabVIEW for cRIO applications. The LabVIEW Example Finder contains some great examples that show the overall architecture for FPGA applications: Help » Find Examples » Toolkits and Modules » FPGA » CompactRIO » Basic I/O. These will also show how the conversion is performed to translate integers to actual values. You may also want to take a look at the resources linked in the Getting Started with LabVIEW FPGA knowledgebase. I hope this information is useful for you. Please post back if we can provide any other additional assistance. Thanks,
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In our smartform we are trying to print this French text mise en uvre , but Adobe is having problem in reading this special character " ", so it prints as # .
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I got 4 cds of NI Developer Suite 2011, version DS2; But when I installed it, it paused after DVD1.
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I have found the full developer suite does take a very long time to install (several hours) with the disk swaps, I can only advise patience. If something is going wrong it will generally tell you in no uncertain terms
TD
Please remember to accept any solutions and give kudos, Thanks
LV 8.6.1, LV2010,LV2011SP1, FPGA, Win7

Mise en œœuvre module FPGA

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