NI 6509 PXI TTL Input Impdeance

I have a requirement to measure a TTL logic signal with a 5.1K ohm load. The specification for a PXI version of the board has high input impedance as a default condition. What is the actual impedance and can I just put a 5.1K ohm resistor across the inputs? Are there pull up/down resistors like the PCIe version? Can the default be changed?
John Anderson

I am not expert for this board. But the manual states that the inputs are in high impedance state after reset only (as far as the "non-e" version is concerned). This means that the input does not present a load to a signal line. In this state, however, you cannot receive any input signals.
After reset, you may configure the inputs as pull-up or pull-down. In a pull-up configuration, the pull-up resistor will be 4.7kOhms typical, in the pull-down configuration it will be 47kOhm typical. Concerning line impedance you have to imagine that the impedance between Vcc (where a pull-up resistor is tied to) and GND (where the pull-down resistor is tied to) is supposed zero, so the signal source will "see" an input impedance of 4.7kOhm or 47kOhm respectively. The choice of pull-down or pull-up resistor depends on the output configuration of the signal source. If you have an open-collector output, the pull-up resistor will be a better choice.
However, all this relates to a pure transfer of the state of the signal source (high or low), and the resistor values are specified as "typical" on purpose, there is no tolerance field indicated. If you have to make a measurement where the impedance of the signal line plays an important role, you should use some analog high-input circuitry and add a resistor of the required value between the signal line and GND.
This answer contains a lot of analog electronics stuff, but an understanding of basic analog circuitry is crucial if you are dealing with line impedances or terminating resistors.

Similar Messages

Problems configuring a port in niPXI-6509 card as input port using static DIO Register Level Programmer maual

Hello ,
I am using a ni PXI-6509 card for my application. Since I have to compile my application in Interval Zero RTX, I am using the static DIO Register level programming using VISA. I have successfully configured the card to do output on port0. But when I attempt to comfigure another port1(not the same as output) I can successflly configure it. But when I send 5V through the corresponding pins I donot get a value 1 in the Data register for that channel.
the following i did to configure as Input...
1) IO Select register set to 0 (for input as the manual suggests)
2) read from IO data register.
Do I need to do anything special to configure as input port.
please suggest...
Thanks
Kuchi

Hi Sathish,
Given how much blatant, undisclosed, and unrepentant
cross-posting [1] [2] [3] [4] [5] you've done to ask this question, I
gave you the benefit of the doubt that you were new to the NI forums
and didn't understand the etiquette of this community. However, looking
at your profile, you've been around just over 8 years! How can you be
so selfishly impolite?
To your credit, you at least searched the forums to find (somewhat) relevant to which topics to reply, but as you said you 'tried the entire NI Site', I'm surprised that you missed the DDK home page [6] that has a link to the M Series register map.
[1] Re: m series register programming in straight C
http://forums.ni.com/ni/board/message?board.id=90&message.id=1644#M1644
[2] Re: Problems configuring a port in niPXI-6509 card as input port using static DIO Register Level Programmer maual
http://forums.ni.com/ni/board/message?board.id=90&message.id=1645#M1645
[3] Re: Problem with writing to registers
http://forums.ni.com/ni/board/message?board.id=90&message.id=1646#M1646
[4] Re: Is there a Register Level Programming manual for NI 625x PXI
http://forums.ni.com/ni/board/message?board.id=270&message.id=7661#M7661
[5] Re: Where Can I find information about register level programming the PXI 6259?
http://forums.ni.com/ni/board/message?board.id=250&message.id=53551#M53551
[6] Register Level Programming for OEM Customers
http://digital.ni.com/express.nsf/bycode/exyv4w?opendocument
Joe Friedchicken
NI VirtualBench Application Software
Get with your fellow hardware users :: [ NI's VirtualBench User Group ]
Get with your fellow OS users :: [ NI's Linux User Group ] [ NI's OS X User Group ]
Get with your fellow developers :: [ NI's DAQmx Base User Group ] [ NI's DDK User Group ]
Senior Software Engineer :: Multifunction Instruments Applications Group
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)

PXI-4461 input protection?

Hi,
Is there any specification for the PXI-4461 input protection? I can not find any mention of it in the datasheet.
By misstake I connected an input to 60VDC and to my surprise it survived

Hi Janaf
From the manual the PXI-4461 Analog Input looks like this:
Input Overvoltage Protection
Differential configuration ............... ±42.4 Vpk
Pseudodifferential configuration
Positive terminal......................... ±42.4 Vpk
Negative terminal (shield) .......... ±10.0 Vpk
Best Regards
David
NISW

Obtaining a TTL input signal via DIO lines of 7334

Hi
How can I obtain a TTl input signal from a source via the DIO lines of the 7334 .
Thanks
Mal

I do not quite understand your question.
If you want to know what kind of signal a DIO line will detect properly: the signal has to be less than 0.8V to detect a low state and more than 2.0V to detect a high state. This is compatible with outputs of all TTL logic circuits.
If you have some other circuitry (source) with different specifications for the digital signal you can simply connect a switching transistor in open collector circuit. The DIO lines have pull-up resistors, and when the transistor is switched the DIO input will be tied to less than 0.8V (low level).
Anyhow, if the high output level of your source is more than 5V (there are many control systems with 24V output level) it is better to use galvanic isolation to avoid damage of the motor controller. You can use a relay, or better an opto-isolator. You have to design the series resistor of the opto-isolator such that the input gets proper current to drive the LED (usually 10mA will be sufficient for most optocouplers). If the opto-isolator has an open collector output configuration it can be connected directly to the 7344 DIO line.
Of course you always have to provide a common GND connection between the 7344 board and your signal source (or the open-collector transistor in case you use this configuration or an opto-isolator).

Pxi 4070 input impedance

I am trying to modify the input impedance of the pxi 4070 dmm with the NI DMM property node. When I set the input impedance to greater than 10 giga ohms, I am getting an error outputted after running niDMM Configure Measurements Digits.vi. The signal that I am measuring is 5V, so I should be able to use the 10 giga ohm input impedance. I set the niDMM Configure Measurements Digits to autoscale. Could this be an issue that the pxi-4070 is not allowed to have its input impedance changed when the dmm is set to autoscale?

You are correct. When the range is selected, the API automatically selects the input impedence. If you need to do this programmatically based on the measurement, then you could use a case structure that checks the range being used and then sets the input impedence based on this. Do you know if the value you are trying to read at the time would set the range to a value that is compatible with the input impedence?
Thanks,
Sean Newton
Applications Engineering Specialist - Semiconductor Test
National Instruments

Differential inputs or pseudodifferential PXI-4461 inputs

I am wondering aboout the pseudodifferential an differential inputs of the PXI-4461
I am doing measurements on switch mode amplifiers where the outputs are bridged and not really ground (PGND) referenced. The input is ground (AGND) referenced to a 5V section. Due to switching currents, AGND and PGND can fluctuate relative each other.
I understand that the pseudo-differential inputs means the inputs are decoupled from ground and therefore suitable for common mode noise reduction. Differential are fully differential per input.
Is there any performance (accuracy) downside to the fully differential mode, compared to pseudo-differential?
How are maximum voltages specified for fully differential mode (max voltage relative to ground)?
Can I use one input channel of the PXI-4461 in differential mode, one in fully differential?
Thanks

I believe the information in this link would be helpful: Pseudodifferential versus Differential Input Configurations

PXI-6115 input voltage range configuration help

I need to set the analogue inputs on my PXI-6115 to +/-42V, however using Measurement & Automation Explorer, under Traditional NIDAQ Devices - PXI-6115- Configuring Device 1 : PXI-6115, Analogue Input Tab, the Polarity / Range pull down menu only has -10.0V - + 10.0V available for selection. Any help gratefully received.

Hi,
The range inside of MAX should read +/- 10 V, the range of the card with a gain of one.
To see a larger range in your application, you must configure the gain to be less than one. For example, the NI 6110 supports gains of 0.5 and 0.2, which allow ranges of +/- 20 V and +/- 50 V. (Remember that the card supports a maximum of 42 V.)
Depending on the range of your input signal, you would want to use the following gain setting:
Range
Gain Setting
-50 to 50 V (not to exceed +/- 42 V maximum)
.2
-20 to 20 V
.5
-10 to 10 V
1
-5 to 5 V
2
-2 to 2 V
5
-1 to 1 V
10
-500 to 500 mV
20
-200 to 200 mV
50
To set the gain in LabVIEW, use the Hardware Configure VI and set the input range of the signal you want to measure, and the VI will select the best gain. Refer to the link below for an example.
To set the gain using NI-DAQ Function Calls, pass in the gain as an integer. If the gain is 0.5 or 0.2, pass in a -1 or -2 respectively.
http://sine.ni.com/apps/we/niepd_web_display.display_epd4?p_guid=B45EACE3E8A156A4E034080020E74861&p_...
Hope that helps
Sacha Emery
National Instruments (UK)
// it takes almost no time to rate an answer

PXIe 1073 Input Grounding

Hello,
I was wondering how the grounds from the hybrid slots of a PXIe 1073 chassis are connected within the chassis. I'm using 3 PXI 6255 cards, though I don't believe that makes a difference. What I'm looking for is whether they are tied together or not, or similar information. Thank you.
Solved!
Go to Solution.

BVeezy wrote:
UPDATE: I was incorrect. Please refer to the following KB:
http://digital.ni.com/public.nsf/allkb/02A451C0A88A3EAE8625702F0059C98E
Regards,
Brandon V.
Applications Engineer
National Instruments
Yeah, I discovered that not long ago. Every ground on DAQ cards are tied to the chassis ground. It is just that each type of ground (DGND, AGND) have their own planes on the card itself. And chassis ground will be going to Earth Ground, in case that matters to you.
There are only two ways to tell somebody thanks: Kudos and Marked Solutions
Unofficial Forum Rules and Guidelines

TTL signal vs TCP-IP, parctical and timing considerations

We have just purchased a BioPac MP1 50 physiological recording system (www.biopac.com). We would like to start/stop an acquisition from another computer system and/or to add annotations and markers.
To this end it seems there are two routes to consider. We could either use the built-in Trigger in/out capability with TTL signal of (0 and +5V square pulse) or use TCP-IP client-server to control it remotely (i.e. using VIs such as TCP-IP Listen). In the later case, I�d use the Beta LabView API libraries that BioPac is about to release for the MP150, instead of the dedicated AcqKnowledge 3.8.1 software, which is really good.
Because we need to correlate event during the physiological recording of our experim
ent, it would be ideal if the resolution were of ms accuracy (i.e. latency less than 1ms) and we need to manage up to 16 trigger channels.
I have very little technical background knowledge on this. Thus, in order to help me evaluate a solution, I would appreciate any comments and suggestions.
1) I would like to know first if anyone could recommend an easy solution to generate TTL signal (0 � 5V logical pulse) on both Windows and LINUX PC?
For instance I read about using the 25-pin parallel port, but I am curious to learn about other possible alternative such as USB, USB2 with or without adapter but also a very cheap card (a couple $100 max). I am already ruling out serial connection, because I am told it is very slow and has horrendous latency.
2) What are the latencies in read and writing/issuing TTL signals com? How does it compare with a dedicated byte stream through TCP-IP, on a dedicated cable and on a network cable?
3) Are they any VI application that you c
ould share to show how LabView 7.0 can talk through the respective ports to generate a pulse forming the trigger information being written or read in?
I look forward to hearing your feedback and suggestions. Many thanks in advance.
Donat-Pierre LUIGI

Use TTL. It is likely that the TCP/IP messages will get there fast enough
and that the software will respond in a timely manner but there is no way to
be sure. It is the fastest way to get from your LV application to your
other device. You may need to check the response time that the BioPac will
give to the TTL input verses a TCP/IP message.
You should also consider the level of programming needed to accomplish your
tasks. I would strongly suggest that you get a seasoned LV programmer on
the job or you will be wasting a lot of time and enduring needless
frustration.
The parallel port will respond is sub-millisecond. You should be able to
toggle it several hundred times in a millisecond. I've had LV applications
use the printer port for this type of communications before. I don't
remember the bandwidth but it's more than adequate for this application.
TCP/IP will sometimes get delayed by the OS (either Windows or Linux) due to
other things that are happening at the time which you don't have control of.
The message should go out in very short order (again sub-millisecond) but
there is no control over this.
Good luck,
Chuck
"Donat-Pierre" wrote in message
news:[email protected]...
We have just purchased a BioPac MP1 50 physiological recording system
(www.biopac.com). We would like to start/stop an acquisition from
another computer system and/or to add annotations and markers.
To this end it seems there are two routes to consider. We could
either use the built-in Trigger in/out capability with TTL signal of
(0 and +5V square pulse) or use TCP-IP client-server to control it
remotely (i.e. using VIs such as TCP-IP Listen). In the later case,
I'd use the Beta LabView API libraries that BioPac is about to release
for the MP150, instead of the dedicated AcqKnowledge 3.8.1 software,
which is really good.
Because we need to correlate event during the physiological recording
of our experiment, it would be ideal if the resolution were of ms
accuracy (i.e. latency less than 1ms) and we need to manage up to 16
trigger channels.
I have very little technical background knowledge on this. Thus, in
order to help me evaluate a solution, I would appreciate any comments
and suggestions.
1) I would like to know first if anyone could recommend an easy
solution to generate TTL signal (0 - 5V logical pulse) on both Windows
and LINUX PC?
For instance I read about using the 25-pin parallel port, but I am
curious to learn about other possible alternative such as USB, USB2
with or without adapter but also a very cheap card (a couple $100
max). I am already ruling out serial connection, because I am told it
is very slow and has horrendous latency.
2) What are the latencies in read and writing/issuing TTL signals
com? How does it compare with a dedicated byte stream through TCP-IP,
on a dedicated cable and on a network cable?
3) Are they any VI application that you could share to show how
LabView 7.0 can talk through the respective ports to generate a pulse
forming the trigger information being written or read in?
I look forward to hearing your feedback and suggestions. Many thanks
in advance.
Donat-Pierre LUIGI

Use digital inputs to choose inquiry sequence?

Hello,
Is it possible to use a couple of the NI-1456 CVS TTL Digital Inputs to select which specific Inquiry Sequence should be ran?
I currently own NI Vision Builder for Automated Inspection. I do not own LabView.
I am using a NI-1456 CVS and firewire camera. My solution will use the NI-1456 CVS stand-alone. It will not be connected to a VGA monitor, or to a computer. I intend to use the system to detect flaws in silicon wafers. Due to several possible wafer sizes and shapes, I will have to develop an Inquiry Sequence for each wafer type. I would like to have the NI-1456 CVS unit contain several Inquiry Sequences.
-Rick

Hi Rick -
Actually, this is a very commonly used feature of VBAI! From the Configuration Interface, choose Tools»Configure Inputs/Outputs. This will pop up a settings window for the entire inspection process. The second state (called "Change Inspection?") allows you to configure a Product Selection port. The digital byte written to this port will determine which inspection script to run. From the listbox, you can choose NI CVS/IMAQ IO Product Selection to use your CVS's digital input port for this feature.
More information about this feature can be found int he NI Vision Builder for Automated Inspection Configuration Help, under the following index: Vision Builder AI Tools»Configuring Inputs/Outputs»NI CVS-1450 Series I/O. Note that the ISO inputs are used for this feature, not the TTL inputs.
David Staab, CLA
Staff Systems Engineer
National Instruments

PXI-6682 + multiple Serie S & M cards cause timestamp delay

I'll try to give as much info as possible and hopefuly someone will have an answer to this problem.
Language: C++
Introduction:
1- I have (1) PXI-6682 (Timing card), (6) PXI-6143 (Serie S (8 analog inputs each)), and (2) PXI-6224 (serie M (8 analog inputs each))
2- Every card is a task (so that's 8 tasks
3- Every card is in sync (they give data equal...more or less... to one another
PROBLEM:
1- Timestamp is off by up to 200 ms (not drifting...simply off by a set number of ms)
2- Every call to niSync_ReadMultipleTriggerTimeStamp gives me a timestamp off by that much
I don't have any info on how the tester managed to know it was 200 ms off, my theory is he tested it with some older equipment to validate the new one

Hello there,
Kindly help me with DAQmx Time stamp related problem as described below.
Setup : PXI 6133 Qty 4 (Slot 3, 4, 5, 6)
PXI 6255 Qty 1 (Slot 2)
PXI 6255 doing a Continuous Acquisition at 1 mSec Sampling and 1000 samples/iteration.
PXI 6133 doing a Ref Triggered Acquisition at 1 uSec Sampling interval and Pre and Post Trigger samples of 100000 Samples each.
Test : PXI 6133 - Reference Trigger Configured on PFI 1 line of First PXI 6133 card.
input Signal given to AI 0 OF First PXI 6133 card.
All PXI 6133 cards are included in a single task.
PXI 6255 - Input given to Channel 0 AI
External Function generator - One Digital Trigger generated of width 50 mSec High Interval.
Another signal generated for input to above cards. (Square wave of 10 mSec Period - 5 periods generated on the rising edge of trigger)
So It means When I acquire square wave in my waveform, I can consider rising edge of square wave as a rising edge of trigger (as both signals are generated aligned from external function generator)
I have attached Screenshots and programs I have used for that.
Problem: As both singal are generated at a same event, Both 6133 and 6255 should acquire that singnal at a same timestamp.
I have also read related documents about timestamp but I could not succeeded to find any link in this.
I am getting square wave 100 msec earlier in 6255 then of 6133.
If I used only single card of 6133 then that inaccuracy of 100 msec is shifted to 25 msec.
Please help me as soon as possible.
Attachments:
Timestamp mismatch between 6133 and 6255.docx ‏377 KB
Timestamp mismatch in 6133 & 6255.zip ‏70 KB

Tracking where I am in between TTL pulses

Greetings. I have a little Labview experience but very little with counters. I have a PCI-6602 card with a CB-68LP connector block. I have used up 7 of the 8 channels counting events so I have one channel left.
What I have is a Z pulse that is followed be four events and then another Z pulse. I know the point in the cycle at which each of these events occurs. I need to write in my program which event is occuring.
I apologize for the confusion. It's difficult to explain.
The ideal situation for me is that if the Z pulse is a 360 degree cycle I could track in my program if I am in the first, second, third, or fourth quarter of the cycle between Z pulses. I know that sounds almost impossible since my Z pulse can change.
For what it's worth, I CAN run one of the events in a separate TTL input if that helps me.
I have been trying to just reference the Z pulse to a timebase, then a little math would get it done for me but I don't have a full knowledge of counter/timers.
Any help would be appreciated. Sorry for the confusing post.
Dave B
www.signalg.com

I am measuring the speed of an event. To keep it simple, I am measuring the edge separation between TTL pulses. As the event moves through a cylinder it sets off probes that will send my system a 5 volt, TTL pulse. Knowing the time between the event passing probe 1 and probe 2 will tell me the speed of the wave. I have 7 probes in each of 4 tubes. Because we are running at 40 hz or less my boss would like to run all seven probes for each tube together. This way we are writing a smaller amount of data and only using a 7 channels of a counter card rather than 28.
So probe 1 in each tube will generate a pulse to the same channel.
To determine which tube I'm in I am referencing the spark for each tube. My plan is that when the spark for tube 1 occurs it initiates case #1. Spark 2 will make case 2 true, etc for 3 and 4. Each case performs the exact same reading on the exact same channels. Since not all tubes are exactly the same, each case will have custom formatting for that tube.
In each of these cases I am measuring the time between probes to figure speed. We can run one tube up to all four. My program should work for all without any intervention from the user since unused tubes will never send their corresponding case structures to true.
Using the 90 degrees per was when I was considering using the Z (timing) pulse to determine which tube is active. Now that I'm using sparks for each tube that is much simpler (I hope). The sparks coming into the DIO (adjusted to give me a clean TTL) will activate the case for their corresponding tube.
The 6221 is pretty affordable but I think this should work with what I have. If it doesn't I could sell them on another piece of hardware.
Do you think this will work?
Thanks
Dave
www.signalg.com

M series register programming in straight C

I'm writing code in a pure C application (not C++) for the m series 6225. The application was originally written for the e series boards. The C++ Chipobject examples don't help much and the register documentation is sketchy. Are there any pure C programming examples for m series? Or is there a register programming manual for the m series? Or a discussion of the programming differences between the e and m series. Even a preliminary manual would help.

Hi Sathish,
Given how much blatant, undisclosed, and unrepentant
cross-posting [1] [2] [3] [4] [5] you've done to ask this question, I
gave you the benefit of the doubt that you were new to the NI forums
and didn't understand the etiquette of this community. However, looking
at your profile, you've been around just over 8 years! How can you be
so selfishly impolite?
To your credit, you at least searched the forums to find (somewhat) relevant to which topics to reply, but as you said you 'tried the entire NI Site', I'm surprised that you missed the DDK home page [6] that has a link to the M Series register map.
[1] Re: m series register programming in straight C
http://forums.ni.com/ni/board/message?board.id=90&message.id=1644#M1644
[2] Re: Problems configuring a port in niPXI-6509 card as input port using static DIO Register Level Programmer maual
http://forums.ni.com/ni/board/message?board.id=90&message.id=1645#M1645
[3] Re: Problem with writing to registers
http://forums.ni.com/ni/board/message?board.id=90&message.id=1646#M1646
[4] Re: Is there a Register Level Programming manual for NI 625x PXI
http://forums.ni.com/ni/board/message?board.id=270&message.id=7661#M7661
[5] Re: Where Can I find information about register level programming the PXI 6259?
http://forums.ni.com/ni/board/message?board.id=250&message.id=53551#M53551
[6] Register Level Programming for OEM Customers
http://digital.ni.com/express.nsf/bycode/exyv4w?opendocument
Joe Friedchicken
NI VirtualBench Application Software
Get with your fellow hardware users :: [ NI's VirtualBench User Group ]
Get with your fellow OS users :: [ NI's Linux User Group ] [ NI's OS X User Group ]
Get with your fellow developers :: [ NI's DAQmx Base User Group ] [ NI's DDK User Group ]
Senior Software Engineer :: Multifunction Instruments Applications Group
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)

Detect DIO line change on PCI-6250

Using Visual C++ how can I detect when a digital line goes high on a NI PCI-6250 M-series board? I want to make a loop that will cycle each time a digital input goes high (with millisecond or better accuracy).
Thanks,
Mark

Actually, there are two ways to do this, if your card supports Digital Change Detection timing. Unfortunately the PCI-6250 does not, but the following cards do: PCI-6509, PXI-6509, PCI-6510, PCI-6511, PXI-6511, PCI-6514, PXI-6514, PXI-6514, PCI-6515, PXI-6515, PCI-6518, PCI-6519, PCI-6527, PXI-6527, PCI-6528, PXI-6528, PXI-6533, PCI-6533, PXI-6534, PCI-6534, and perhaps others.
In any case, if you do have one of these cards with hardware support for Digital Change Detection timing, then you can do one of the following:
a) Create a DI channel on your task, and then configure digital change detection timing using CNiDAQmxTiming::ConfigureChangeDetection(). Then perform either synchronous or asynchronous single-sample reads; when one of the digital lines of interest changes, then the blocking synchronous read will finish or the asynchronous read will call your callback. This is demonstrated with the Digital \ Read Values \ ReadDigChan_ChangeDetection example.
b) Create a DI channel on your task, configure digital change detection timing, and then set up a Digital Change Detection event on the task. This is demonstrated with the Digital \ Read Values \ ReadDigChan_ChangeDetection_Events example, although (a) is the preferred method.
Since the PCI-6250 doesn't support hardware digital change detection, what you have to do instead is to continuously read the status of the digital lines, and check to see if the lines went high programmatically. If you do not explicitly configure the timing for the acquisition, then the timing mode will be on-demand and the data will be read as fast as possible. You also have the option of calling CNiDAQmxTiming::ConfigureSampleClock() to configure the clock rate based off of another signal, such as PFI7. Here's a sample:
try
CNiDAQmxTask t("");
t.DIChannels.CreateChannel("6250/port0/line7:0", "", DAQmxOneChannelForAllLines);
t.Timing.ConfigureSampleClock("/6250/PFI7", 0,
DAQmxSampleClockActiveEdgeRising,
DAQmxSampleQuantityModeContinuousSamples, 1);
CNiDAQmxDigitalSingleChannelReader reader(t.Stream);
bool stopLoop = false;
while (!stopLoop)
CNiBoolVector data;
reader.ReadSingleSampleMultiLine(data);
for (unsigned int i = 0; i < data.GetSize(); i++)
if (data[i])
MessageBox("Went high.");
stopLoop = true;
break;
catch (CNiDAQmxException* ex)
ex->ReportError();
ex->Delete();
Hope this helps,
Hexar Anderson
Measurement Studio Software Engineer
National Instruments
Hexar Anderson
Measurement Studio Staff Software Engineer
National Instruments

WiSM, unable to see Interface after adding.

We have an up and running WiSM, for about 9 months. It resides in a 6509 chassis.
I needed to add a new interface for another subnet (previous one was getting over ran, and we have a new project)
I went through the process of adding the interface. I ensured it was active.
At present, from the 6509 I am unable to ping the interface's IP, but I am able to ping that networks gateway.
From the WiSM, I am able to ping the interface's IP, but unable to ping the gateway.
I was not the original configurator of the WiSM and the 6509 build. That person is no longer around.
On the 6509 I have ensured that the : show interface trunk shows the VLAN in question.
I have searched numerous times, and I feel like there is just some nefarious item I am missing on the creation of new Interfaces between the WiSM and 6509.
Any input would be appreciated.
Thanks

Have you double checked the vlan tag, subnet mask, etc for the new interface on the WLC? Usually when you cannot ping an interface on the WLC (although pings are the lowest priority) it is a configuration error on the above, or the trunk not allowing that interface, etc.
Thanks,
Lee

NI 6509 PXI TTL Input Impdeance

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