Simple addition using 7 series Gen2 integrated block for PCIe for ZYNQ7000

Hi,
I have been trying to perform a simple addition program using 7 Series Gen2 Integrated block for PCIe 3.0.
Due to some issue in the design i am unable to proceed. Can anyone help me out on how the interface has to be done what are the necessary IPcores needed and the necessary driver to execute on the host machine.
Tool : Vivado 2014.4
Regards
Heramban

Hi,
Satish I have refered this document long time back. The issue is that this mode is making the FPGA standalone and its more complex. Am asking for a simple design where in i use 7 series integrated block and connect it to a custom IP core where it performs only addition. Generate bit stream, use a driver program (CPP file ). Execute in the host system. The CPP file will have the data to be executed. the FPGA reads the data from the HOST Machine (CPP file), executes and gives back the result in the terminal window (Host machine).
Regards
Heramban

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