Using generic-uio with PS GPIO

I'm trying to access the Zynq PS GPIO from user space via the UIO driver. Using Xilinx 2014.4, 3.17 kernel.
Changed the device tree gpio entry from:
compatible = "xlnx,zynq-gpio-1.0";
to:
compatible = "generic-uio";
After booting, all looks OK, there is no longer a "chip" entry under /sys/class/gpio and now there is a /sys/class/uio/uio0 entry with address and size matching the device tree entries (0xe000a000, 0x1000).
My user space app (based on http://svenand.blogdrive.com/files/gpio-uio-test.c but with the register offsets changed for the Zynq PS GPIO values), reports no errors from opening /dev/uio0 or the mmap of the device memory, but my reads/writes to the GPIO registers are having no effect (I have some LEDs on the outputs). I think my app code is OK, as if I instead set compatible = "generic-uio"; for a custom register block in the PL, the same user code can access those registers fine.
Wondering if something else is grabbing the PS GPIO address range and locking it, even though there is nothing else in the device tree with that address (wouldn't the mmap fail in that case anyway?). Or maybe there is some other setup required to access the PS GPIO registers, which I need to do myself now that the zynq-gpio-1.0 driver is not getting referenced?
Any ideas?

OK, I sorted it, thanks to this previous solution http://forums.xilinx.com/t5/Embedded-Linux/Zynq-mmap-GPIO/td-p/368601
My problem was that because the gpio driver wan't getting initialised, the clock to the PS gpio hardware wasn't getting enabled, hence why my reads and writes were failing to do anything sensible.
Setting bit 22 in APER_CLK_CTRL (0XF800012C) by ORing the read value with 0x40000 did the trick.

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