Warnings and critical warnings

Question

Hi,
I have a design that is generic: the choice of included IP depends on cource code generics. I get a critical warnings about these IPs in the design that were not included because of generic choice.
VHDL exemple:
============
Data_width_gen: if data_width = 8 generate
 -- Instantiation of a FIFO that accomodate a bus of 8 bits
end generate;
Data_width_gen: if data_width = 10 generate
 -- Instantiation of a FIFO that accomodate a bus of 10 bits
end generate;
In this example case, only one FIFO IP will be included depending upon data_width generic value.
Vivado warnings:
=============
[Designutils 20-1280] Could not find module 'aFifo_w82d512_fwft'. The XDC file c:projets/small_icmos/vivado_2015_2/small_icmos.srcs/sources_1/bd/base_zynq_design/ip/base_zynq_design_icmos_if_0_0/src/aFifo_w82d512_fwft/aFifo_w82d512_fwft/aFifo_w82d512_fwft.xdc will not be read for any cell of this module.
I know and I do ignore these sensless messages, but it's annoying, how to correct this, please?
Thank you in advance.

Answer 1

Hi ,
This approach is just for that perticular Vivado session.
If you want make this permanent, please refer to the approach given in the following answer record.
http://www.xilinx.com/support/answers/53090.html