Digital Electronics FPGA Board with Xilinx ISE

Hi,
I've a design in Xilinx ISE. I Synthesized and created the Bit map file.
How can I export this bitmap file to the NI Digital Electronics FPGA is board? I tried using Adept to program, but the tool didn't detect FPGA board.
Thanks in advance.

Hello,
The Adept Program is something that is made by Digilent. This application isn't meant for being used with non-digilent FPGAs such as the one on the NI Digital Electronics FPGA Board. The FPGA on this board is made by Xilinx so you have to use Xilinx tools in order to deply files to the FPGA (assuming you're not using LabVIEW FPGA). Specifically, you should use the Xilinx iMPACT Software, version 10.x or later, which is part of the ISE WebPACK kit. You can get this software from www.xilinx.com/ise.
If you still have questions about deploying your files to the FPGA, you can refer to the following resource.
Xilinx iMPACT Examples:
http://www.ni.com/white-paper/8671/en/
I hope this helps!
Regards,
Cameron T
Applications Engineer
National Instruments

Similar Messages

  • NI LabVIEW 2014 Digital Electronics FPGA Board Driver

    Hello all,
    When NI LabVIEW 2014 Digital Electronics FPGA Board Driver Release date?
    Thanks.

    Hi mlewis1973
    We have no information regarding the next release of this driver yet. As you mention, the 2013 version is available, so, for now, the solution would be to use LabVIEW 2013 until R&D gives us an update regarding this topic.
    Thanks!
    WenR

  • NI Digital Electronics FPGA Breadboard's UCF

    Good day..i've been using Xilinx ISE 14.3 to program my NI Digital Electronics FPGA board and i want to use some FPGA GPIO lines placed on the Breadboard1(BB1) area...how can i create my UCF file to use this GPIO.??
    Solved!
    Go to Solution.

    Hey Dominic,
    I just want to be clear... if you're trying to use LabVIEW to target the board, you will need the LabVIEW FPGA Module. If you're just using ISE, you can use the UCF attached below to enumerate all of the pins on the device. Since our forum system won't let me upload a .ucf, I posted it as a .txt... just change the extension or copy/paste the pins you need into your project's .ucf.
    Cheers!
    TJ G
    Attachments:
    DEFB_PINS.txt ‏9 KB

  • How can i use xess fpga board with labview8.6

    sir i want to ask how can i use my xess fpga board xsa-3s1000 with labview
    maak

    Dear maak,
    see this thread:  
    compatibilty of labview fpga with spartan 3 only
    Also: 
    Using LabVIEW FPGA with the Xilinx SPARTAN-3E XUP Starter Kit
    and
    http://www.ni.com/fpga/
    Best Regards,
    ~Nate 

  • Is it Possible to interface LABVIEW FPGA Module with Xilinx Spartan 3A Starter Kit

    CAn anybody suggest me >>>>>>>>>>

    We currently only support the Xilinx 3E XUP 500 based board (and only for academic purposes) in terms of non-NI FPGA hardware.

  • DC to DC converter basics using Labview on FPGA Control with VHDL

    DC to DC converter basics using Labview 
    I am fairly a novice, that is why simplifications required, before I begin thanks in advancefor them who will response  
    I am designing a DC to DC (Intermediate Bus Converter, a step down BUCK converter, of 24 v input and output 9 v and 5 amp current output), using FPGA controller, I need to program this using VHDL, for which I take LabVIEW, but as I am new so do not have any idea as what are the steps that I need to take for implementation, what types of function that FPGA does in this so that it can generate 24 v and what other mechanisms that have to control inside or outside of FPGA programming and designing that it can give the desired output voltage, if you have any idea about this then I would be glad to receive the steps that are necessary to complete this

    NI supports two Spartan 3E products through either LabVIEW FPGA or MultiSIM, the Digital Electronics FPGA Board (http://sine.ni.com/nips/cds/view/p/lang/en/nid/207​010) and, if you are in academia, the Xilinx Spartan 3E XUP starter board (as linked by Dennis_Knutson).
    Also note that if you wanted to implement some logic in VHDL and have access to that logic in a LVFPGA diagram, you could utilize the Component-level IP (CLIP) fuctionality (http://zone.ni.com/reference/en-XX/help/371599G-01​/lvfpgaconcepts/using_component_ip/)

  • Labview fpga vs xilinx ise

    hi all 
    i am new to fpga and my question is fairly simple one which one is better ? 
    labview fpga or the xilinx ise platform ?
    or does it depend upon the application? 
    Regards
    Solved!
    Go to Solution.

    It always depends on the application.  Better in what way?
    I like programming in LabVIEW, so I think LabVIEW FPGA is a much better choice.  Learn just a little more than regular LabVIEW and you can program an FPGA!  Unless you have experience using ise, I suspect LabVIEW would be the easier route.
    If you are looking at price, maybe ise wins.  It isn't cheap to get buy LabVIEW and the FPGA module (and probably RT module) so you have all the tools.
    If the task is very complex, you might manage to make the program slightly more efficient using a lower level tool like ise.  You might shave off a few nanoseconds of loop time.  In 99.9% of the cases, this is unlikely.  LabVIEW code does a pretty good job converting over to FPGA.
    Bruce
    Bruce Ammons
    Ammons Engineering

  • DE FPGA Board not Connecting

    I am using DE FPGA board with NI ELVIS II, and LabVIEW 2012. I have searched in the Discussion forum and got the latest driver software (5.2) for the board.
    But when I start running my FPGA VI , after successful compilation and generation of Bit file (after synthesis) the error message shows "Communication cable is not detected" 
    What is the problem? 
    ** My board is working fine with Xilinx ISE.
    Attachments:
    XilinxLog.txt ‏236 KB
    Screen Shot.docx ‏1642 KB

    Thanks for your reply,
    But I have already got the problem solved.  
    I don't know how, but one day It suddenly worked!!  then I tried the same procedure in another computer, there also it worked. 
    I think, the problem was that, the previous version of driver was installed in my laptop, after I have uninstalled it, the device worked!! I am really surprised with the procedure !! But It happened !! 

  • How to use LabVIEW FPGA on Custom FPGA board other than NI products .....Also how to develop RTx DLL for a customised motion controller hardware

    I'm using RTx, LabVIEW RT and LabVIEW FPGA.
    The GUI is windows based. The motion control and FPGA  are RTx based.
    Is there any way to develop device drivers for the custom hardware in RTx. For example motion controller hardware, FPGA hardware, PCI hardware.
    Is there a possibility to use custom FPGA boards to use with LabVIEW FPGA.
    Please send me some links
    Thanks
    Bhoopathy
    Take life as it comes! you may never know what's gonna happen Tommorrow

    CODE WARRIOR Hello. I believe this question was answered in a previous post. Please let us know if you have any new questioins or if you need some clarification.
    You are able to develop device drivers for your custom hardware using the NI Measurement Hardware Driver Development Kit.
    However, it is not possible to use custom FPGA boards with LabVIEW FPGA. The FPGA boards have to be one of our R Series boards. Here are some links that should shed some light on the Measurement Hardware DDK.
    Measurement Hardware Driver Development Kit Frequently Asked Questions
    NI Measurement Hardware DDK (Driver Development Kit)
    Please post if you have further questios.
    Efosa O.
    NIAE

  • Site / Pin addresses for DAC on NI Digital Electronics Board

    My advanced DE students are trying to build a circuit capable of communicating with the DAC on the NI Digital Electronics Board.
    We have things to the point where we have a solid data stream, synchronized with our serial clock, and timed correctly relative to the DAC_CS pulse.  It all looks great on our oscilloscope. The one thing we are missing is the sites the signals are supposed to be mapped to in the Xilinx PlanAhead software.
    For example, LED0 is C11, LED1 is D11, SW0 is J11, SW1 is J12, etc...
    The signals we need to be able to control on the DAC are:
    DAC_CLR, DAC_CS, SCK, and SDI.
    Thanks,
    -Bret Wood
    Solved!
    Go to Solution.

    Ooops, found it myself.
    The master file was C:\Program Files\National Instruments\Circuit Design Suite 11.0\pldconfig\DEFB.ucf
    The DAC related locations are:
    SCK           R4
    SDI            P3
    DAC_CS    N12
    DAC_CLR  P13
    Hope this helps someone else too.
    -Bret Wood

  • LabVIEW 2010 FPGA Driver for Xilinx SPARTAN 3E Starter Board

    Dear Friends,
    Is there any possibility to release a LabVIEW 2010 FPGA Driver for Xilinx SPARTAN 3E Starter Board?
    Regards,
    wedo
    Solved!
    Go to Solution.

    Hi Brad,
    So glad to get your post here!
    I’m looking forward to download the new installer.
    I wonder whether the new driver will support the 10/100 Ethernet Physical Layer Interface, since the last drivers aren’t support this feature!?
    Also, will be any new examples included with the new driver? For instance: an example for the StartaFlash Memory; I have done an example for this but I couldn’t get it work! I don’t know why! You may check my post and the example in the following link!
    http://forums.ni.com/t5/LabVIEW/Spartan-3E-StrataF​lash-Memory-wrong-reading/m-p/1030898
    By the way, is there any plane to develop a driver for the Spartan-3E (1600Kgate) kit? Both kits (500KGate and 1600KGate) have the sample on-board peripherals, the only difference is in the number of Gates (FPGA chip). I think all that is needed is to add the component ID (29597843---->3E1600) and revise the xc3s1600e.bsd and 3sXXXe.nph.
    Thanks in advance & kindest regards,
    wedo

  • How can I implement a Digital I/O counter with a maximum source frequency of 80 MHz (like 6602 board) using CompactRIO?

    How can I implement a Digital I/O counter with a maximum source frequency of 80 MHz (like 6602 board) using CompactRIO? It appears as if the Digital I/O modules for CompactRIO are much slower than this.
    Thank you,
    --Ray

    Hi Ray,
    The highest frequency input we offer for C Series modules is 20 MHz if you are doing LVTTL and 10 MHz for 5 V TTL.  These modules are the 9402 and 9401, respectively.  Unfortunately, there is no 80 MHz input on this form-factor.
    Regards,
    Chris E.
    Applications Engineer
    National Instruments
    http://www.ni.com/support

  • Is the Nexys2 board (with spartan 3e FPGA) compatible with the FPGA module

    Hi my name is DIego and I was wondering if anybody here knows if the NEXYS 2 board (with spartan 3e FPGA) from DIGILENT is compatible
    with the LABVIEW FPGA module.
    Thanks
    Digilent is also the Manufacturer of the SPARTAN 3e STARTER BOARD

    Diego:
    The NEXYS 2 is not officially supported, but if you'd like to try it, you can attempt to follow the guide for the Spartan 3E here (substituting your NEXYS 2 for the Spartan 3E).
    Again, the NEXYS 2 isn't officially supported, so if it doesn't work like the Spartan 3E starter kit board, then you won't be able to use LabVIEW FPGA with it.
    Good luck!
    Caleb Harris
    National Instruments | Mechanical Engineer | http://www.ni.com/support

  • FPGA Compilation fails with Xilinx "Block Memory Generator 8.1" configured with a Coefficient File

    Hello All,
    I have a SubVI that uses block memory, which has been created using Xilinx "Block Memory Generator 8.1". I have configured this block memory to be a "Single Port ROM", and I use a coefficient file to initialize the memory contents. In simulation mode, everything works as it should.
    Next, when I try to compile the top-level VI, I get the following error:
    http://www.cs.nyu.edu/~aditya/Compilation_Log_100.txt
    http://www.cs.nyu.edu/~aditya/Dividing (This is the coefficient file)
    Essentially, the compiler is looking at an ill-formed path to find the coefficient file.
    My environment:
    -- LabView 2014 f1 (32 Bit)
    -- FPGA module 2014
    -- RT Module 2014
    -- Xilinx Vivado 2013.4
    -- NI RIO Drivers 14
    -- Development Machine and Conpile Server: Windows 7 Professional, 32GB RAM
    -- Compile Worker running Linux, with Xilinx Compile tools installed
    Is this a bug, or am I doing something wrong? Thanks!
    Best,
    Aditya

    Next, I tried compiling on the windows machine itself. And here is the error that I get. (See attached image).
    Thanks!
    best,
    aditya
    Attachments:
    Capture.PNG ‏18 KB

  • FPGA Board CCA 193426B-01​L

    Trying to find a complete User Confirguration File (UCF) or a schematic showing the mapping of the Spartan chip pin outs for the FPGA board devices and I/O.
    Several years ago, at least 5, the Philadelphia School District purchased the NI FPGA Boards that actually went unused until recently and are now being integrated into a Digital Electronics (DE) Course that will include the FPGA Board in various DE projects.  To fully utilize the I/O and devices on the board itself we require User Configuration File data and/or a circuit schematic that will identify pin out connectivity from the embedded Xilinx FPGA to the various devices on the board (example Rotary Switch).  Some of the data is included in information we were able to find or already had (e.g. http://www.ni.com/pdf/products/us/cat_defpga.pdf,http://www.ni.com/pdf/manuals/372809b.pdf, http://www.xilinx.com/support/documentation/user_g​uides/ug385.pdf), but our information is incomplete.  A complete UCF or a schematic showing the mapping of the Spartan chip pin outs to usable devices on the board and its I/O pins/ports would greatly facilitate use of the board in our classroom projects.
    I may be contacted directly via the email above or, you may reach the school and ask for me or Mr. Scott Koehler, Engineering Technology teacher, please see the attached link for the school: http://carver.phila.k12.pa.us/
    We currently have ten (10) of the NI FPGA boards, which may at this point be dated, but still quite usable for school purposes.  We would like to integrate these boards to introduce students to FPGA technology, and will expand the equipment base and course breadth as we get the course content established.
    Chip: Xilinx Spartan XC3S500E
    Board: CCA 193426B-01L
    Solved!
    Go to Solution.

    Fernando,
    Greatly appreciate your responsiveness.
    We will be using Multisim, and have it installed, as part of the DE Course, but we also want to teach students using C-Language/Verilog/VHDL a variety of tools, and the JTAG programming port directly, and want to be able to direct I/O from the Spartan FPGA to a variety of devices on the CCA or connected externally.  So, I guess we want to get under the hood a bit, teach the tools comparatively, and complement Multisim usage, which is a great tool.
    This board is a few years old, I am not sure if it is the current version or still in production.  Is there a complete UCF or a schematic that will identify Spartan pinouts to CCA devices and I/O?  What we are doing is updating, expanding the course and integrating the FPGA (that has gone unused until now) and other devices.
    We have ten of the FPGA boards now. 
    Chris Speck, PE (Retired)
    Science, Math, & Engineering Technology Teacher (PA)

Maybe you are looking for