External Calibration a PXI783x series FPGA board

Good Morning All,
Have any of you any experience with performing an external calibration on a PXI783x series FPGA board. There is an NI-RIO utility to do a self calibration, but we will need to figure a means of do a calibration to an external NIST traceable standard.
Thanks,
Putnam
Certified LabVIEW Developer
Senior Test Engineer
Currently using LV 6.1-LabVIEW 2012, RT8.5
LabVIEW Champion

The only way, at this time, to get external calibration is by sending the board to National Instruments. Unlike Data Acquisition boards there is no way for users to externally calibrate. If you would like to set that up, call in to support and we can get begin that process.
Rick Kuhlman
NI applications Engineer

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FPGA Board CCA 193426B-01L

Trying to find a complete User Confirguration File (UCF) or a schematic showing the mapping of the Spartan chip pin outs for the FPGA board devices and I/O.
Several years ago, at least 5, the Philadelphia School District purchased the NI FPGA Boards that actually went unused until recently and are now being integrated into a Digital Electronics (DE) Course that will include the FPGA Board in various DE projects. To fully utilize the I/O and devices on the board itself we require User Configuration File data and/or a circuit schematic that will identify pin out connectivity from the embedded Xilinx FPGA to the various devices on the board (example Rotary Switch). Some of the data is included in information we were able to find or already had (e.g. http://www.ni.com/pdf/products/us/cat_defpga.pdf,http://www.ni.com/pdf/manuals/372809b.pdf, http://www.xilinx.com/support/documentation/user_guides/ug385.pdf), but our information is incomplete. A complete UCF or a schematic showing the mapping of the Spartan chip pin outs to usable devices on the board and its I/O pins/ports would greatly facilitate use of the board in our classroom projects.
I may be contacted directly via the email above or, you may reach the school and ask for me or Mr. Scott Koehler, Engineering Technology teacher, please see the attached link for the school: http://carver.phila.k12.pa.us/
We currently have ten (10) of the NI FPGA boards, which may at this point be dated, but still quite usable for school purposes. We would like to integrate these boards to introduce students to FPGA technology, and will expand the equipment base and course breadth as we get the course content established.
Chip: Xilinx Spartan XC3S500E
Board: CCA 193426B-01L
Solved!
Go to Solution.

Fernando,
Greatly appreciate your responsiveness.
We will be using Multisim, and have it installed, as part of the DE Course, but we also want to teach students using C-Language/Verilog/VHDL a variety of tools, and the JTAG programming port directly, and want to be able to direct I/O from the Spartan FPGA to a variety of devices on the CCA or connected externally. So, I guess we want to get under the hood a bit, teach the tools comparatively, and complement Multisim usage, which is a great tool.
This board is a few years old, I am not sure if it is the current version or still in production. Is there a complete UCF or a schematic that will identify Spartan pinouts to CCA devices and I/O? What we are doing is updating, expanding the course and integrating the FPGA (that has gone unused until now) and other devices.
We have ten of the FPGA boards now.
Chris Speck, PE (Retired)
Science, Math, & Engineering Technology Teacher (PA)

How to use LabVIEW FPGA on Custom FPGA board other than NI products .....Also how to develop RTx DLL for a customised motion controller hardware

I'm using RTx, LabVIEW RT and LabVIEW FPGA.
The GUI is windows based. The motion control and FPGA are RTx based.
Is there any way to develop device drivers for the custom hardware in RTx. For example motion controller hardware, FPGA hardware, PCI hardware.
Is there a possibility to use custom FPGA boards to use with LabVIEW FPGA.
Please send me some links
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Bhoopathy
Take life as it comes! you may never know what's gonna happen Tommorrow

CODE WARRIOR Hello. I believe this question was answered in a previous post. Please let us know if you have any new questioins or if you need some clarification.
You are able to develop device drivers for your custom hardware using the NI Measurement Hardware Driver Development Kit.
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How to decide the maximum number of elements for DMA FIFO in R series FPGA

Greetings!
I'm working on a project with NI R series PCIe-7842R FPGA board. To achieve fast data transfer I'm using target-to-host DMA FIFO. And to minimize the overhead, I'd like to make the FIFO size as large as possible. According to the manual, 7842R has 1728 kb (216KB) embedded block RAM, i.e., 108,000 I16 type FIFO elements available in theory (1728,000/16). However the FPGA had compilation error when I requested such amount of elements. I checked the manual and searched online but couldn't find the reason. Can anyone please explain? And in general, what's the max FIFO size given the size of the block RAM?
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Hey iron_curtain,
You are correct that moving larger blocks of data can lead to more efficient utilization of the bus, but that's almost certainly not the most important factor here. Assuming of course that the FIFO on the FPGA is big enough to avoid overflows, I'd expect the dominant factor to be the size of read performed on the host. In general, larger reads on the host lead to improved throughput, up to the speed of the bus. This is because FIFO.Read is a relatively expensive software operation, so it's advantageous to make fewer calls to get the same amount of data.
Note that the larger your call to FIFO.Read the larger the host buffer needs to be. Depending on your application, it might need to be several times larger than the read size. You can set the buffer size with the FIFO.Configure node.
http://zone.ni.com/reference/en-XX/help/371599H-01/lvfpgaconcepts/fpga_dma_how_it_works/ explains the various buffers involved. It's important to note that the DMA Engine moves data asynchronously from the read/write nodes on the host and fpga.
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How can i use xess fpga board with labview8.6

sir i want to ask how can i use my xess fpga board xsa-3s1000 with labview
maak

Dear maak,
see this thread:
compatibilty of labview fpga with spartan 3 only
Also:
Using LabVIEW FPGA with the Xilinx SPARTAN-3E XUP Starter Kit
and
http://www.ni.com/fpga/
Best Regards,
~Nate

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Attachments:
XilinxLog.txt ‏236 KB
Screen Shot.docx ‏1642 KB

Thanks for your reply,
But I have already got the problem solved.
I don't know how, but one day It suddenly worked!! then I tried the same procedure in another computer, there also it worked.
I think, the problem was that, the previous version of driver was installed in my laptop, after I have uninstalled it, the device worked!! I am really surprised with the procedure !! But It happened !!

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Hello all,
When NI LabVIEW 2014 Digital Electronics FPGA Board Driver Release date?
Thanks.

Hi mlewis1973
We have no information regarding the next release of this driver yet. As you mention, the 2013 version is available, so, for now, the solution would be to use LabVIEW 2013 until R&D gives us an update regarding this topic.
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Hello,
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Dan

Hey Dan,
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I am working on interfacing a custom FPGA board to matlab. I wanna use the hardware co-simulation. However, as it is a custom board it is not in the matlab co-simulating list. A plugin file is necessary to install the board to the software. Does anyone know how I can make his file?
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Copy file
C:\Xilinx\Vivado\2014.4\data\boards\board_parts\kintex7\kc705\1.1\board_part.xml to
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Should NI show external calibration temperature in MAX

We are trying to determine whether or not NI should continue displaying the external calibration device temperature (see screen shot below) in MAX. Is the external calibration temperature useful information that you use to help make decisions, or is it confusing and probably should be removed.
I would appreciate any input on the manner.

Some devices have significant drift due to temperature changes, yet we only calibrate at a given temperature. Take the case of an NI-4071 DMM (7.5 digits of precision). If you calibrate at 40 degrees but you use at 50 degrees, you will want to re-calibrate at something closer to that even if the calibration is still valid time-wise.
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Marcos Kirsch
Principal Software Engineer
Core Modular Instruments Software
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External Calibration halts on error 200546

For sure there are bogus stored temperature values in memory (impossible for the card to actually have measured a 97°C internal temperature) so I have reson to believe the rest of the stored data-including cal constants--are also corrupt. An External Calibration will overwrite these values with new data IF the program will continue past the error. Is it possible to ignore the error and let the program continue?
The card in question is a PCI-6052E. It passes Self Test but fails Self Calibration. It is completely functional except for a -.1V offset on all analog inputs.

After reading through the previous posts I may have a suggestion that could work for you. You have mentioned several times that the values are only off by a -.1V. Is this consistent and constant? If the the error is linear could you apply a linear adjustment to the received values post recording? You have stated that the device works in all respects except for this slight calibration. I am sorry that you have had this trouble, other then sending the card in for inspection and testing through the RMA there is nothing else that can be done. I do not believe that somehow bypassing the error that you are receiving will fix the issue but you may be able to calibrate the received data by taking data with a card that is calibrated and the card that is not and developing a calibration table that could be used to adjust the values that are being measured. Other then that or sending the card in for an RMA there is nothing else that I can recommend that you do. Have a good day.
Alex D
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National Instruments

External calibration..

hi guru,
Boss can any one tell me the Exact process of EXTERNAL CALIBRATION in SAP PM???
thanks you

Hi Ronak,
Please search in previous threads before posting an issue.It will save your time also.Refer the thread below.
inspection of equipments
Please follow below steps for for external calibration
For external calibration do following steps :
1) Create general task list for external calibration Equipment (IA11,IA01,IA05)
2) Create single cycle plan (IP41)
3) Schedule the maintenance plan (IP10)
4) Generation of Inspection lot and Purchase Requisition (IW32 / QA32)
5) Create Service Purchase Order from Purchase Requisition.(ME21N)
6) Confirm service entry sheet (ML81N)
7) Process inspection lot and UD (QA32)
8) Settlement of Calibration Order (KO88)
9) Business Completion / Close order (IW32)
You can use PM03 control key.
Regards,
Deepak

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FATAL_ERROR:Simulator:Fuse.cpp:500:1.133 - Failed to compile generated C file isim/precompiled.exe.sim/ieee/p_2592010699.c Process will terminate. For technical support on this issue, please open a WebCase with this project attached at http://www.xilinx.com/support.
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Hello,
Can you check the OS (Operating System) from the released notes of ISE (UG631) which you are using if its supported?
Also Try Cleanup the project files in ISE before running simulation:
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Syed
Please mark the Answer as "Accept as solution" if the information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
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I used to use a 6602 board and would sometimes use the RITS bus to connect the output of one counter to the input of another counter thus saving myself the trouble of having to physically connect them. On the 7852R board I'd like to connect the output of one DIO line to the input of another. I can physically use a wire but wonder if there's anyway of doing it internally like on the 6602?
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Edward,
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External Calibration a PXI783x series FPGA board

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