FPGA power up state

Hi,
How can I set the powerup state for 7811R card.
I tried by running a initialization bitfile before running my application. It sets the default states, but when I run any other bitfile, the states are again going to High Impedance. I have used 'Close' option instead of 'Close and reset' in the host code.
For Ex: First I run the initialization Bitfile_1, in which I have made the state of DIO0 to 10 as FALSE.
Now, I run Bitfile_2, in which I am changing the states of the DIO12. But on doing so, the state of DIO0 to 10 are again going back to High impedance.
In both the host VIs, I have used ' Abort and Close' option instead of 'Close and reset'. The host code is attached.
How can I restrict the DIOs from going back to high impedance state if not in use???

How did you measure the voltage on the I/O lines when they are supposed to be in HiZ mode? If you do this with a DVM, you will probably get some reading different from 0V (or whatever your DVM shows when the circuit is supposed to be open), since even in HiZ mode there is a certain amount of leakage current which will be sufficient to feed the high impedance input of a DVM. (In a special application I trigger a thyristor with a TTL output and noticed false triggering when the TTL circuit was in HiZ mode - the leakage current was sufficient to trigger the thyristor gate which needs 20 uA or so to trigger.)
Also, if you connect any TTL inputs to an output which is supposed to be in the HiZ state for some time, be aware that the input m
ay float in an undefined area, since TTL inputs always have to be connected to an output with a valid (high or low) state, or to the supply rail via a pull up resistor.
To avoid the (possible) problem with leakage current in HiZ mode you can connect a resistor between the HiZ output and ground which will 'short' the leakage current. I would suggest a resistor of 4K7 or so.
To avoid any problems with non-powered circuits connected to a 5V output you can use a protection circuit consisting of a current limiting resistor in series with the input (which should not exceed 220R when using TTL or LS-TTL circuits) and a (Schottky) diode between the input (after the resistor) and the Vcc rail. A similar technique is used as protection circuit on the I/O lines of the 7344.

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