Hardware compare issue - PXI-6552

Hi!
I'm using a PXI-6552 DIO module for testing SDRAM chip.
I'm not sure about hardware compare operating. I'm using a sequence of 0 and 1 to drive the tester during write command and H/L as expected responde with read command.
Does the H/L response data puts the driver to high impedance?
The problem is that also when i skip the write command I retreive (fetch) the response data correctly.
Thank you!
MM

Thank you for the answer!
My configuration is a little bit different because I use the D0..D7 lines as bidirectionl lines.
I noted that the system works while the clock frequency is below 25 MHz, but i don't know why.
Has anyone tried to use this module above 25MHz?
Thanks a lot!
MM

Similar Messages

HSDIO conditionally fetch hardware compare sample errors (script trigger to flag whether or not to wait for software trigger)

I am moderately new to Labview and definitely new to the HSDIO platform, so my apologies if this is either impossible or silly!
I am working on a system that consists of multiple PXI-6548 modules that are synchronized using T-CLK and I am using hardware compare. The issue I have is that I need to be able to capture ALL the failing sample error locations from the hardware compare fetch VI... By ALL I mean potentially many, many more fails than the 4094 sample error depth present on the modules.
My strategy has been to break up a large waveform into several subsets that are no larger than 4094 samples (to guarantee that I can't overflow the error FIFO) and then fetch the errors for each block. After the fetch is complete I send a software reference trigger that is subsequently exported to a scriptTrigger that tells the hardware it is OK to proceed (I do this because my fetch routine is in a while loop and Labview says that the "repeated capbility has not yet been defined" if I try to use a software script trigger in a loop).
This works fine, but it is also conceivable that I could have 0 errors in 4094 samples. In such a case what I would like to do is to skip the fetching of the hardware compare errors (since there aren't any) and immediately begin the generation of the next block of the waveform. That is, skip the time where I have to wait for a software trigger.
I tried to do this by exporting the sample error event to a PFI and looping that PFI back in to generate a script trigger. What I thought would happen was that the script trigger would get asserted (and stay asserted) if there was ever a sample error in a block, then I could clear the script trigger in my script. However, in debug I ended up exporting this script trigger back out again and saw that it was only lasting for a few hundred nanoseconds (in a case where there was only 1 injected sample error)... The sample error event shows up as a 1-sample wide pulse.
So, my question is this: is there a way to set a flag to indicate that at least one sample error occurred in a given block that will persist until I clear it in my script? What I want to do is below...
generate wfmA subset (0, 4094)
if scriptTrigger1
clear scriptTrigger1
wait until scriptTrigger0
end
clear scriptTrigger0
generate wfmA subset (4094, 4094)
I want scriptTrigger1 to be asserted only if there was a sample error in any block of 4094 and it needs to stay asserted until it is cleared in the script. scriptTrigger0 is the software trigger that will be sent only if a fetch is performed. Again, the goal being that if there were no sample errors in a block, the waiting for scriptTrigger0 will not occur.
I am probably going about it all wrong (obviously since it doesn't work), so any help would be much appreciated!

Please disregard most of my previous post... after some more debug work today I have been able to achieve the desired effect at slower frequencies. I did straighten out my script too:
generate wfmA
if scriptTrigger1
clear scriptTrigger0
wait until scriptTrigger0
end if
generate wfmA
scriptTrigger1 = sample error event flag
scriptTrigger0 = software trigger (finished fetching error backlog in SW)
However, I am still having a related issue.
I am exporting the Sample Error Event to a PFI line, looping that back in on another PFI line, and having the incoming version of the Sample Error Event generate a script trigger. My stimulus has a single injected sample error for debug. For additional debug I am exporting the script trigger to yet another PFI; I have the sample error event PFI and the script trigger PFI hooked up to a scope.
If I run the sample clock rate less than ~133MHz everything works... I can see the sample error event pulse high for one clock period and the script trigger stays around until it is consumed by my script's if statement.
Once I go faster than that I am seeing that the script trigger catches the sample error event occasionally. The faster I go, the less often it is caught. If I widen out the error to be 2 samples wide then it will work every time even at 200MHz.
I have tried PFI0-3 and the PXI lines as the output terminal for the sample error event and they all have the same result (this implies the load from the scope isn't the cause).
I don't know what else to try? I can't over sample my waveform because I need to run a true 200MHz. I don't see anything that would give me any other control over the sample error event in terms of its pulsewidth or how to export it directly to a script trigger instead of how I'm doing it.
Any other ideas?

Triggerring PXI-4110 to measure 1 current value while HSDIO PXI-6552 generating waveform

Hi,
Some question about PXI-4110 to measure current while PXI-6552 is generating the waveform.
1. Let say, I need to measure 3 points of current values, i.e. while PXI-6552 is generating sample-1000, 2000 and 3500. On the edge of sample 1000,2000 and 3500, the PXI-6552 will send a pulse via PFI line or via PXI backplane trigger line. My question is, is it possible to trigger PXI-4110 (hardware trigger or software trigger) to measure current values at these points ?
2. Let say I need to measure the current on 0ms (start of waveform generation by PXI-6552) , 1ms, 2ms, 3ms, 4ms... and so on for 1000 points of measurement, code diagram as shown at the figure below. It is possible for the VI "niDCPower Measure Multiple" to measure exactly at 1ms, 2ms, 3ms .. ? How much time will have to spend to complete acquire 1 point of measurement by "niDCPower Measure Multiple" ?
Thanks for viewing this post. Your advice on hardware used or software method is much appreciated. Thanks in advance.
Message Edited by engwei on 02-02-2009 04:24 AM
Attachments:
[email protected] ‏46 KB

Hi engwei,
1. Unfortunately, the 4110 does not support hardware triggering. Therefore you cannot implement direct triggering through the backplane or anything like that. However, there are a couple of possible workarounds you can try:
a) Use software triggering: Say your 6552 is generating in one while loop, and your 4110 is to measure in another while loop. You can use a software syncrhonization method like notifiers to send a notification to your 4110 loop when your 6552 has generated the desired sample. This method, however, will not be very deterministic because the delay between the trigger and the response depends on your processor speed and load. Therefore, if you have other applications running in the background (like antivirus) it will increase the delay.
b) Use hardware triggering on another device: If you have another device that supports hardware triggering (like maybe an M-series multifunction DAQ module), you can configure this device to be triggered by a signal from the 6552, perform a very quick task (like a very short finite acquisition) then immediately execute the DCPower VI to perform the measurement. The trigger can be configured to be re-triggerable for multiple usage. This will most likely have a smaller time delay then the first option, but there will still be a delay (the time it takes to perform the short finite acquisiton on the M-series). Please refer to the attached screenshot for an idea of how to implement this.
2. To make your 4110 measure at specific time intervals, you can use one of the methods discussed above. As for how long it will take to acquire 1 measurement point, you may find this link helpful: http://zone.ni.com/devzone/cda/tut/p/id/7034
This article is meant for the PXI-4130 but the 4110 has the same maximum sampling rate (3 kHz) and so the section discussing the speed should apply for both devices.
Under the Software Measurement Rate section, it is stated that the default behavior of the VI is to take an average of 10 samples. This corresponds to a maximum sampling rate of 300 samples/second. However, if you configure it to not do averaging (take only 1 sample) then the maximum rate of 3000 samples/second can be achieved.
It is also important to note that your program can only achieve this maximum sampling rate if your software loop takes less time to execute than the actual physical sampling. For example, if you want to sample at 3000 samples/second, that means that taking one sample takes 1/3000 seconds or 333 microseconds. If you software execution time is less than 333 microseconds, then you can achieve this maximum rate (because the speed is limited by the hardware, not the software). However, if your software takes more than 333 microseconds to execute, then the software loop time will define the maximum sampling rate you can get, which will be lower than 3000 samples/second.
I hope this answers your question.
Best regards,
Vern Yew
Applications Engineer, NI ASEAN
Best regards,
Vern Yew
Applications Engineer
Attachments:
untitled.JPG ‏18 KB

How can I use the hardware compare feature of the 6551 card to trigger scripts

I can dynamically and seamlessly generate different waveforms by triggering different scriptTriggers that drive one or more of the 4 PFI lines. However, I need to evaluate a channel at a specific location or locations set by a script marker in real-time and generate a different waveform stored in on-board memory based on the result of the evaluation. I have attempted to use the hardware compare feature without any success. I am trying to dynamically respond to an I2C device based on the ACKs or NACK response of the device under test. Can the 6551 card accomplish this? Has anyone successfully tested an I2C or SMBus communication stream with 6551 card?

Hello,
I can understand why hardware compare did not work out for you application. Hardware compare uses a signal that was generated to make a digital pattern and then waits a few clock cycles before acquiring the signal that needs to be compared to the digital pattern.
I would look into using a script trigger to evaluate the channel value, where the script structure controls when it is evaluated. Please note that script triggers will need to be cleared after they are detected for reasserting. Some script syntax actually clear the script trigger and then use a wait until script trigger structure. Please refer to the HS DIO Help for documentation on Common Scripting Use Cases.
Please provide us with further details about your application. The more information, the better! I was not too clear on what you where wanting to evaluate and where is it coming from.
I would also like to mention that National Instruments has a NI USB 8451 which is capable of I2C communication.
NI USB 8451
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National Instruments
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Hardware compare in CVI

Dear all,
I want to use Hardware compare function in CVI. I had check CVI examples , Those pattern file and channel are separate,(generation & acquisition) . I find some information in developer zone (http://zone.ni.com/devzone/cda/tut/p/id/7281) , I want to do it in CVI ,Because its pattern are compound of generation & acquisition data,(figure 3) ,Is anyone can tell me how to do that?Or give me your suggestion. Thanks!

Dear all,
I want to use Hardware compare function in CVI. I had check CVI examples , Those pattern file and channel are separate,(generation & acquisition) . I find some information in developer zone (http://zone.ni.com/devzone/cda/tut/p/id/7281) , I want to do it in CVI ,Because its pattern are compound of generation & acquisition data,(figure 3) ,Is anyone can tell me how to do that?Or give me your suggestion. Thanks!

Can i do hardware compare using hsdio when the generation and acq clock rate are different

Hi there
my application should generate a digital stream in clock rate A with bus width (number of bits) very from 1 to 4 bits
The DUT will response always on on bit but with clock rate B.
1. can i use the hardware compare mechanism of the hsdio boards.
2. if answer is YES is there any sample that can help me getting started.
Thanks for advance
Gabel Daniel
Solved!
Go to Solution.

Hi,
One good example to use as a starting point can be found in the NI Example Finder. Navigate to "Hardware Input and Output" >> "Modular Instruments" >> NI-HSDIO >> Dynamic Acquisition and Generation >> Hardware Compare - Error Locations.vi. You'll need to explicitly wire in your new rate into the "niHSDIO Configure Sample Clock.vi" on your response task.
There is also a portion of this code that warns if the stimulus and response waveforms are not the same size. This is not necessary, and could be deleted from the program. You are allowed to have different size stimulus and response waveforms.
Jon S
Applications Engineer
National Instruments

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PXI 6682 is a timing and synchronization card which can be used to achieve this. I also have a requirement to use PXI 6552 HSDIO in my application. Few channels in PXI 6552 are free. So i want to know if it is possible to achieve GPS Synchronization of the two PXI systems using PXI 6552.
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Hardware compare issue - PXI-6552

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