Maximal FIFO size on RIO device with DMA

Question

Hi!
I am now a happy LabVIEW 8.2 user since a few days   Now I want to use the new DMA function implemented into the FPGA Module 8.0 for several acquisition jobs.
Therefore based on the following paper:
DMA Improves LabVIEW FPGA 8.0 Throughput by 20X
http://zone.ni.com/devzone/conceptd.nsf/webmain/c1013cb24fc508ef8625708b0071b3fb
"To use DMA, simply create two memory buffers – one in memory on the
FPGA device and one in memory on the host processor – and LabVIEW
efficiently and transparently transfers data over the PCI bus from the
FPGA VI to a host VI. The LabVIEW FPGA 8.0 Module uses FPGA
configured for FIFOs DMA to write to DMA memory and uses FPGA
Invoke Methods on the host side to create and read from host memory"
The question is: Is it possible to create an FIFO on the FPGA device which is larger than the 96k addressable onboard memory? (maximal FIFO size approximatelly the RAM size of the host PC? --> theoretical) I suppose not, because I can't compile it anyway
If not, is there a possibilty to use the DMA functions to write many measurment values from the RIO device to the host PC? More than 96k...
Regards, Helmut_K

Answer 1

Hello!
The FIFO on the FPGA side is restricted on the size of the memory you have on your FPGA-Chip.
The idea is to create a "small" FIFO on the FPGA, which send via DMA on a larger FIFO on the Host side. So you can have a FIFO bigger than 96k, because the FPGA send directly the data to the host.
Hier a tutorial:
http://zone.ni.com/devzone/cda/tut/p/id/4534
Best regards
Ken