Merging and downloading .bit and .elf in XSDK 2015.2

I’ve been using XSDK v14.7 with a Xilinx Virtex 6 and the Microblaze MCS v1.4 successfully. I’m now trying to move XSDK 2015.2 with an Atrix 7 and the Microblaze MCS v2.3.
When I select "Xiliinx Tools" then "Program FPGA" in XSDK v14.7, the following happens:
1) XSDK takes my fpga.bit file, my mcs_bd.bmm file, and my software.elf file and merges them into a file called download.bit.
2) XSDK configures the FPGA using the download.bit file.
3) My software.elf immediately begins running.
When I select "Xilinx Tools" then "Program FPGA" in XSDK v2015.2, I _think_ the following happens:
1) XSDK prompts me for my fpga.bit file, my mcs_bd.bmm file, and my software.elf file.
2) XSDK downloads my fpga.bit file to the FPGA.
3) XSDK does NOT install the software.elf file in a configuration bitstream NOR does it program software.elf into the FPGA.
4) My software.elf never runs. Whatever file was embedded in the fpga.bit file out of Vivado runs instead.
I have debug turned off in the Microblaze MCS IP generator and I have XSDK set to generate a Release build.
Is there any way to make the "Release" version of my code immediatley begin running after downloading the FPGA configuration bitstream in XSDK 2015.2 like it does in XSDK 14.7? (Without having to copy the software.elf into the Vivado project and regenerating the bitstream from within Vivado.)
Alternatively, what setting changes do I need to make to Run -> Run Configurations to cause my .elf file to download and run when selecting Run -> Run (CTRL+F11)?
Thanks,
Glen
 

Yeah, everything works. I have a hardware project, a board support project, and an application project. I have the .bit, the _bd.bmm, and the .elf. Going to check to see if I have a .mmi file too tomorrow. I can tell Vivado to bake the .elf file into the .bit file when it generates the bitstream and download that to the part and have everything just start working.
I’m just trying to understand the differences in operation between XSDK 14.7 and XSDK 2015.2 when you select Xilinx Tools -> Program FPGA.
In XSDK 14.7, I select program FPGA and tell it the locations of all the files (.bit, _bd.bmm, .elf), click OK, and my design just starts working.
In XSDK 2015.2, I select program FPGA and tell it the locations of all the same files (.bit, _bd.bmm, .elf), click OK, and it appears to only load the .bit file until I click Run -> Run three times and click through a bunch of annoying dialog boxes and errors. And If I don’t have the debug target in the MCS, Run -> Run won’t even work.
Clearly the XSDK 2015.2 Program FPGA command operates differently than the XSDK 14.7 program FPGA command. It’d be nice to know exactly what changed between versions.
I’m going to investigate writing a tcl script that calls UpdateMEM and then calls whatever the command is to configure the device from within Vivado’s hardware manager.

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