REQ: Example of Dig Pulse Train where PWM varies.

Hi!
I'm setting up a temperature controller. I want to use the counter output of my DAQmx compatible device to create a PWM signal that drives the relay to my heater ban. A PID controller VI will be used to set the PWM value (0-100%) of the counter output. I have attempted this several times now, and my resulting code was always buggy to say the least. Issues I've run into:
1. PWM Counter output does not allow 0 or 100% output. As a matter of safety, 0.0000001% or whatever is just not close enough to 0.
2. "Task not complete" errors when trying to change the PWM value for the "DAQmx Write - Counter Freq 1Chan 1Samp".
I've been through the examples provided by NI for setting up PWM in LabVIEW, but I can't find a good example of what I am trying to accomplish.
Attached is probably my best (error prone) attempt. The DAQmx stop/start VI's within the conditional blocks are my attempt to get a 0% output. I get error #2 on my list a lot with this code. Also, the observed output doesn't always seem to be correct...
I'm tempted to use a quad-packaged opamp to make a PWM circuit that is driven by the Analog Output. Sadly, diving into analog seems a lot simpler than working out my program errors. Perhaps my approach is way off. Any help would be greatly appreciated.
Thank you for your input.
-Nic
Solved!
Go to Solution.
Attachments:
pwm.jpg ‏65 KB

1. PWM Counter output does not allow 0 or 100% output. As a matter of safety, 0.0000001% or whatever is just not close enough to 0.
2. "Task not complete" errors when trying to change the PWM value for the "DAQmx Write - Counter Freq 1Chan 1Samp".
You can get the PWM outputs to work the way you want, and you'll then be able to run your code on any DAQmx device that has counter outputs. Two tricks:
1. As I think you discovered, stop the DAQmx task in order to set the output to 0.
2. In order to set the frequency and duty cycle while the counter is running, you use a different function than you use when the counter is not running. If I remember correctly, you need to use DAQmx Write when the counter is not running; when it is running, use a DAQmx channel property node (dig around a bit and you'll find the properties for frequency and duty cycle). I have no idea why this is necessary but it works. In my code I wire the output of "DAQmx Is Task Done?" to a case structure that determines whether to use the property node or DAQmx Write to set the frequency and duty cycle. I don't have a copy of that code write now but if I can find it in the morning I'll post it.

Similar Messages

Examples of continuous pulse train generation on a 6602 using C#

Hi All
I have an application in which I am hoping to use a 6602 counter timer to generate a square wave whose frequency can be varied, on the fly, between 10 Hertz and 250 KHertz. Now I have been able to create a task using MAX to output the waveform on Counter 0 output but I am unable to duplicate it using my own software. I am trying to write the code in C# using Visual Studio.Net 2005. Does anyone have any examples or can offer any guidance on how I can best achieve this.
Any help would be gratefully appreciated.
Kind regards
Jamie

Hi Jamie,
National Instruments provides a native .NET API for NI-DAQmx. This
is available as a part of the NI-DAQmx driver and does not require
Measurement Studio. You can find examples in the following default directory location (exaxple programs are located according to the Operating System and version of NI-DAQmx used):
For NI-DAQmx versions prior to NI-DAQmx 8.5 examples are stored in C:\Program Files\National Instruments\DotNET\Examples\DAQmx.
Sub-folders named VB contain Visual Basic.NET examples, and sub-folders
named CS contain C# examples. If the example directory path does not
exist, make sure you have .NET support installed for NI-DAQmx.
Starting with NI-DAQ version 8.5, the .NET example paths have changed. In the following paths, x is the letter of the hard drive. The .NET example paths for Windows Vista are x:\Users\Public\Documents\National Instruments\NI-DAQ\Examples\DotNET1.1 and x:\Users\Public\Documents\National Instruments\NI-DAQ\Examples\DotNET2.0.
The .NET example paths for Windows XP and Windows 2000 are x:\Documents and Settings\All Users\Documents\National Instruments\NI-DAQ\Examples\DotNET1.1 and x:\Documents and Settings\All Users\Documents\National Instruments\NI-DAQ\Examples\DotNET2.0.
Double-click the .vbproj file to open the project.
Also, several examples can be found at NI Developer Zone. Let me know if this helps you.
Kind Regards,
CLA | LabVIEW 7.1... 2013
www.renishaw.com

How to generate sequence of pulse trains with DAQmx?

I need to generate a sequence of pulse trains with DAQmx (the card I have is a PXI-6229 card). As an example:
- 10'000 pulses at 20kHz every 5 seconds with an initial offset of 2 seconds (let's say 10 pulse trains in total).
If I use the CreateVirtualChannel.vi in "CO pulse ticks" mode, I can only specificy offset, high ticks and low ticks, but not that the sequence of pulses should be repeated after some time.
Now I thought that I could solve this problem if it were possible to multiply two counter outputs: the first counter would generate the pulses (continuously) whereas the second one would switch between low and high on a slower timescale in order to gate the first counter, thereby providing an initial offset and the "off" phases between the pulse trains.
Is it somehow possible to multiply two outputs with DAQmx and the card I have? Or is there another solution to the problem?
Thanks a lot in advance for any hints!

Hi dlanger,
what you want to do requires a little bit more work.
First look at the example "Gen Dig Pulse Train-Continuous.vi" from the LV example finder.
This example generates a continuous* pulse train. As you see, you need a sample clock VI for setting the sample mode.
* NOTE: Generating a finite pulse train with a M-series card requires 2 counter.
With a pause trigger (DAQmx trigger property node) you can gate the output of that counter.
Now you have to generate a gate-signal with the the 2nd counter. That means, only if Ctr1-out is high Ctr0-out outputs the 20 kHz-signal.
Maybe you have to adjust the times in my example a bit.
Unfortunately there is just one "small" problem: "let's say 10 pulse trains in total"
This is not possible, because a 3rd counter would be necessary (*).
As a workaround you can modify the while-loop that both tasks are cleared after 50s. This is not brilliant, but should work fine for you.
A more sophisticated way is to perform a correlated DIO. So you can generate custom pattern for multiple outputs.
A good example can you find here:
Retrigger and Repeat Finite Digital Pulse Train in LabVIEW
http://decibel.ni.com/content/docs/DOC-8473
or here:
Generating More Than 2 Pulse Trains Using CompactDAQ
http://decibel.ni.com/content/docs/DOC-2167
Hope this helps.
With best wishes,
Ralf N.
Attachments:
Gen Gated Dig Pulse Train-Continuous.vi ‏38 KB

Generating multiple Pulse Trains.

I am trying to generate two different pulse trains. Once the first pulse train has begun I need to start the
second pulse train approximately .69444 ms after the first has started. I am currently using the two counter channels on the NI ELVIS, but the second pulse doesn't always start after the first, but it does work sometimes. How can I fix this? Attached is my vi file.
Thanks,
David
Note: Each pulse train has a 33% duty cycle.
Attachments:
SaO2.vi ‏91 KB

Hello,
Here is what I would try:
1. Set up counter 0 to perform a continuous pulse train (see the LabVIEW example called Gen Dig Pulse Train-Continuous.vi)
2. Set up counter 1 to perform a continuous pulse train with a digital start (see the LabVIEW example Gen Dig Pulse Train-Continuous-Dig Start.vi)
A. Modify this example code so that the trigger source is your counter 0 output.
B. Modify this example code so that the initial delay value of the pulse train is 0.7 milliseconds (or whatever delay you want). Create the delay with the input to the DAQmx Create Channel VI (the delay is currently set with a default of 0.00 seconds).
What you are doing is triggering the second counter off of the rising edge of the first counter. So, counter 0 will start generating a pulse train. Counter 1 will not start until the rising edge of counter 0's first pulse has occurred. Once this trigger has occurred, Counter 1 will start (after the initial delay time of 0.7 ms has passed). You can cut and paste to put the code of the two examples together.
Hope this works for you,
Sam

Two retriggerable pulse generations after a pulse train generation

I am trying to generate 3 pulse trains (ABCABCABC...) one after another.
The program currently I am using generates 2 pulse trains (ABABAB.....).
I am using the Traditional NI-DAQ and PCI-6602.
I am thinking about using pulse train generation first and then retriggerable pulse generation after that.
I understand that the retriggerable pulse generation can generate a pulse train triggered (or gated) by other counter output.
I have attached a test vi.
It uses the pulse train generation code when the counter number is 0 and when the counter number is not 0, then it uses the retriggerable pulse generation code, which I tried to modify from the pulse train generation code.
First of all, I am not sure if I wrote the retriggerable pulse generation code correctly.
Secondly, I don't know if the whole code will generate ABCABCABC...
I would really appreciate your help.
pchemjjang

pchemjjang,
I believe I may have misunderstood your original concern. It sounds like you want to output this finite pulse train on three different counters. You will output these pulse trains for 10 minutes and cease your program. The Finite Pulse Train.vi will output a pulse train from only one counter. With this Traditional DAQ example you would need to have three of these Finite Pulse Train.vi programs running simultaneously in parallel to output from 3 counters. I would strongly recommend using DAQmx for this application because you will only need to utilize 4 VIs. The rest of the work is done behind the scenes. There is an example in DAQmx which should accomplish exactly what you are looking for in one program. You must make sure to make the number of pulses 2000000, the duty cycle as 1/3 and the frequency as 1/(300us). The DAQmx driver can found here. In terms of the counters, I believe that each task requiring two counters will use the counter adjacent to it. If you would like to output on counter 0 using finite generation then counter 1 will be used as the gating counter. When you have the DAQmx driver then you can find this example by selecting Help>>Find Examples and then expanding Hardware Input and Output>>DAQmx>>Generating Digital Pulses>>Gen Dig Pulse Train-Finite.vi. I have included an image to show how the front panel of this example should be configured to work. The major note to make is that you will need to configure all of the counters in the channel names list. In Traditional DAQ this did not seem possible. In Traditional DAQ you would need to create a subvi out of the Finite Pulse Train.vi run three copies of it, in parallel, in a larger program. Please let me know if you will be able to utilize DAQmx in this application.
Thanks,
Gio L.
Digital Support - Product Manager
National Instruments
Attachments:
Counteroutput.jpg ‏49 KB

Finite pulse train with variable pulse widths

Greetings LabVIEW developers,
Does anyone have code that can show me how to use E-series counters to generate a finite pulse train where the individual pulse widths vary? I need to generate a series of 20 pulses with the high time for each pulse randomly varying between 50 and 1000 microseconds. The low time for each pulse needs to be constant (around 50 microseconds).
Thanks,
Ryan Wright

Ryan,
Sorry, but this isn't possible with the counter/timers. I've been wanting this capability myself for about 6 years now.
Personally, I think it's an unfortunate "hole" in product capability. The other major data acq hw allows you to capture and later replicate a signal of interest. You can capture an analog waveform with AI and later play it back with AO. You can capture a digital pattern and later play it back with timed DIO. You can capture buffered semi-periods with a counter -- but you can't play play them back later. So for your app, you'll need to generate the variable freq using timed DIO. The new M-series boards ought to work for this, or a dedicated high-speed digital board.
There's another product that I think is even better for timed DIO though and it's put out by one of NI's "Alliance partners" -- Viewpoint systems. Here's an example of why I like it. Let's say you need to generate 20 pulses within 60 seconds. The times of the pulses need to be precise to within 1 usec, and they have no common divisors. The NI method will require you to use an update rate of 1 MHz and you'll create a buffer of 60 MB to represent the digital pattern at every usec. The Viewpoint method needs a buffer of 40 entries. Each entry is a combination of a timestamp and a pattern to generate at that timestamp. That pattern will just stay there until the next defined timestamp. So all you do is define the digital pattern at the instants when one or more bits will change. It works analogously for digital input - if you capture with 1 usec resolution for 1 minute but there are only 20 pulses (40 digital transitions), you only capture the 40 relevant timestamps & patterns instead of a full 60 MB.
If interested, look for the PCI-DIO64 at Viewpoint's website.
-Kevin P.

Finite pulse train with different frequency

Hello,
I'm trying to modify the labview example "generate finite pulse train" to generate a finite pluse train with different frequencies. Each freq will run 400 pulses. The freqs are stored in an array, which is being fed into a for loop. Thus ramp up the freq each iteration. However the program only generate 400 pluse at first given freq. I'm fairly new to daqmx and not sure what is wrong. Anyone have some idea how to fix it?
Attachments:
pulse train finite mod.vi ‏38 KB

The best "fix" will depend a bit on the needs of your app.
Is it ok to have a fraction of a second without any pulses each time you change frequencies? If so, then there's a pretty simple solution:
1. Outside the loop you'd create a DAQmx virtual channel and configure for Finite Sampling (# samples = 400) using DAQmx Timing.vi.
2. Inside the loop you'd chain together a DAQmx Channel property node where you set the pulse frequency property, then perform a DAQmx Start, a DAQmx "Wait for Task Complete", and a DAQmx Stop.
3. So for each freq in your array, you'll program the counter for that frequency, start the generation of pulsetrains, and then stop the task after 400 pulses have been generated.
If you must change frequency on-the-fly, producing *exactly* 400 pulses at each freq setpoint will be tricky, and maybe even impossible to do reliably.  Some techniques will get you closer than others though, so post back if you need to do this.
-Kevin P.

Gen Digital Pulse Train Finite Retriggerable - Initial Delay is only for first trigger

The DAQmx example Gen Digital Pulse Train Finite Retriggerable has an Initial Delay parameter. It appears (6602 and an E series card) that this Initial Delay only delays the pulse generation for the first trigger. Subsequent triggers show no delay. Is this the designed behavior ? Any way to get the Initial Delay to occur for all triggers ?
Steve

So, yes, you are seeing the appropriate behavior. However, it is possible to get a re-triggerable finite pulse train with an initial delay. What you have to do is set up a re-triggerable pulse, and have that pulse act as a pause trigger for a continuous pulse train. Let me explain further with an example.
1) Set up counter 0 as a re-triggerable single pulse (Gen Dig Pulse-Retriggerable.vi). Set the low time = initial delay = X, and high time = Y. The re-triggerable pulse will be low for X, then high for Y after every trigger (it applies the initial delay to the first pulse, and the low time to every pulse after the first). The trigger source is your actual trigger.
2) Set up counter 1 as a pause-triggered continuous pulse train (Gen Dig Pulse Train-Continuous-Pause Trigger.vi). This pulse train will be the frequency of the finite pulse train you want. The pause trigger source will be the output of counter 0.
I have attached the VIs I used to accomplish this. There are three VIs, the two mentioned in 1) and 2) and another VI I used just to monitor the signals. These could be combined to a single VI if you would like. Hope this helps!
-Alan A.
Attachments:
Retrig_Finite_Pulse_Delay.zip ‏135 KB

Generate PULSE TRAIN VI & Measure Frequency VI

Can I RUN both Generate pulse train VI and Measure Frequency VI without either slowing down? Is Generate pulse train VI same as generate PWM VI? I have only attached the generate pulse train VI as I can only attached one file at a time.
Attachments:
Generate Pulse Train VI.vi ‏15 KB

Hi labview1958,
This depends on the kind of frequency you'd like to generate, and the range of frequency you'd like to measure. You didn't mention the kind of hardware and software (version) being used, so I'll assume you're using an E Series DAQ device and programming in LV 7.1. If you're generating a continuous pulse train, only one counter is required, hence there should be another counter available (for most DAQ devices). If you're generating a finite pulse train, two counters are required, and there'll be no counter available for frequency measurement. Also, frequency measurement can use one or two counters depending on the frequency range. You can find LV shipping examples (Help >> Find Examples) for both pulse train generation and frequency measurement. These make a good starting point for your development. In the case that you don't have a counter available for frequency measurement, you can also use the "Extract Single Tone Information" VI to measure the frequency in software.
These tutorials will provide more details:
Generating a Pulse Train with a Counter
Making Accurate Frequency Measurements
Hope this helps,
Lesley Y.

Hello, I would like to produce 2 different pulse trains on the CTRo and CTR1 output pins.

(DAQ-CARD E6024 PCMCIA)I have the 2 output pins monitored on my scope, when CTR0 puts out a pulse train, CTR1 goes high. When CTR1 puts out a pulse train CTR0 goes high. Also, the pulses are interleaved with each other. Is there a way to make then start at the same time
Attachments:
Stim_Output_pulses_CTR_0,1.vi ‏94 KB

Hello Zoltan,
I would suggest using the counter gates to synchronize the counters. You will need to externally run a wire from one of the DIO lines you're not using to one of the counters' gates. When the counter gate is high, the pulse train will be generated on each counter. Both counters will need to use the same PFI line as the gate.
There is an example program that ships with LabVIEW 7 called "Gen Dig Pulse Train-Continuous-Pause Trigger" for DAQmx. This demonstrates how to configure the counter to only generate the pulse train when the gate is high.
With this configuration, you could synchronize the counters by writing to the DIO line which is wired to one of the counter gates when you're ready to start the pulse train generation.
Hope t
his helps.
Kristi Hummel
Applications Engineer
National Instruments

PCI 6602:How can I use the digital lines of the board and in the same time to generate pulse train using a counter?

Hello!
My problem appeared when I tried to update my code from Traditional NI-DAQ Legacy to DAQmx.
I am using 2 counters (counter 5 and counter 7) from PCI-6602, to generate pulse train, and also the Digital I/O lines of the port 0 (the lines form 0 to 7). What I do in my application is that I am starting to generate the pulse train on the output of the 2 counters, and after that I am playing with the state of the digital lines.
In traditional there was no problem using the counters and the digital lines in the same time, everything was going perfectly, but in DAQmx this is not possible.
What happens: I start to generate pulse train on the output of the counters, no errors encountered, but when I try to modify the state of one line of the digital port the generation of the pulse train is stopped. This is happening when I start the task associated to the digital port.
My question is: it is possible to create a channel on the digital lines without altered the channels created for the counters?
Another thing what I manage to see using the "Measurement & Automation Explorer" and Test panels for PCI-6602, basically is the same thing, I generate pulse train on the output of the counter 7 and try to start a task on the digital line, but I get one error :
"Error -200022 occurred at Test Panel
Possible Reason(s):
Measurements: Resource requested by this task has already been reserved by a different task.
Device: Dev4
Terminal: PFI8"
Instead if I use the counter 0 or counter 1 to generate pulse train I don't encounter the same problem.
Which resources are used by the counters 2 to 7 from the PCI-6602 board and the counters 0 and 1 do not use?
Thank in advance for any replies!
Ciprian
Solved!
Go to Solution.

Hello Jordan, thank you for your reply.
I am sorry but I can not see or run your example, I don't use LabView, I use Visual C++ for developing.
Here is the code for generating the pulse train:
GeneratePulseTrain(unsigned long ulCount1, unsigned long ulCount2)
    short nStatus = 0;
    nStatus = DAQmxCreateTask("",&m_taskHandle);
    nStatus = DAQmxCreateCOPulseChanTicks (m_taskHandle, "Dev4/count5", "", NULL, DAQmx_Val_Low, 0.0, ulCount1,ulCount2);
    if( bTriggerMode == true) // if hardware trigger is enabled
       nStatus = DAQmxSetTrigAttribute (m_taskHandle, DAQmx_ArmStartTrig_Type, DAQmx_Val_DigEdge);
       nStatus = DAQmxSetTrigAttribute (m_taskHandle, DAQmx_DigEdge_ArmStartTrig_Edge, DAQmx_Val_Rising);
       nStatus = DAQmxSetTrigAttribute (m_taskHandle, DAQmx_DigEdge_ArmStartTrig_Src,"Dev4/PFI17" );
   //set the internal timebase
   nStatus = DAQmxSetCOCtrTimebaseSrc(m_taskHandle,"Dev4/count5","20MHzTimeBase" );
   nStatus = DAQmxStartTask(m_taskHandle);
    return nStatus;
And the code where I try to set the digital line:
SetChannelState(short nState)
    short nStatus = 0;
    uInt8 wrtBuf0[1]={0};
    nStatus = DAQmxCreateTask("",&m_taskHandle);
    // Configure line as output
    nStatus = DAQmxCreateDOChan (m_taskHandle, "Dev4/port0/line0", "", DAQmx_Val_ChanPerLine);
nStatus = DAQmxStartTask(m_taskHandle);
    wrtBuf0[0] = nState;
    nStatus =DAQmxWriteDigitalLines (m_taskHandle, 1, 0, 0, DAQmx_Val_GroupByScanNumber , wrtBuf0, NULL, NULL);
    nStatus = DAQmxWaitUntilTaskDone(m_taskHandle,10);
    nStatus = DAQmxStopTask(m_taskHandle);
    nStatus = DAQmxClearTask(m_taskHandle);
    m_taskHandle = 0;
    return nStatus;

Using a SCC counter pulse train to control a SCC digital out signal

I am trying to send a digital high signal on a SCC-Digital ouput module for a certain number of pulses generated by a SCC-Counter/timer pulse train. I have found examples of how to route such signals through PFI12 etc on an M-series board but I am trying to achieve this without referring to the card, just the SCC modules themselves.
I cannot find a way to use the sample clock from the counter generated pulse train to synchronise the digital output.
Is there any way I can do this without referring to the connected M-series DAQ card channels?
Thanks in advance for your assistance.
Cheers.

Hi Phil,
The SCC carrier is only conditioning your signals (i.e. if your signals are not in optimal ranges, bandwidth or need external excitation). The actual counters and all digital lines are controlled directly by the M-series board. This means you will never be able to refer to a counter in the SCC module.
If you route the signals of the M-Series board, is as if you had done so externally from the SCC. Look at this example and might give you more insight to how to implement it (This is software timing). The hardware timing would be doing correlation DIO. Here is an example that needs to be modified to adapt to your timing: http://zone.ni.com/devzone/cda/epd/p/id/4414
Hope this helps,
Yardov
Gerardo O.
RF Systems Engineering
National Instruments
Attachments:
Finite Dig Output High.vi ‏31 KB

How to generate a pulse train with different pulse width and delay?

How to generate a triggered pulse train with different pulse width. for example, after each trigger signal, let's say 2 ms, then the counter output a pulse with pulsewidth of 1 ms, and then after 3 ms delay after the first pulse, the second pulse was generated with a pulse width of 4 ms. Next cycle when the trigger signal comes, the same two pulses will be generated and so on. Is it possible to achieve this by using 6601 counter card? and if yes, how to achieve this? Thanks!

Unfortunately you can not create a hardware timed pulse train with different widths on each pulse from a counter. Whilst it can be changed on the fly using software, since you require a hardware triggered signal getting the software involved will not give a huge amount of accuracy when the pulse will actually change.
So in short you can't use your 6601 card (or a counter timer) to achieve this
There are three possible Alternative solutions
1 You could use a high speed digital IO device such as the (6533/34) to generate your variable signal which would require setting up the pulse train as a series of states based around the burst transmission mode where the clock would give you your specific timing.
2 A timed analogy output (for example on a MIO card with a clock (PCI-6220 / 62xx), i.e. Not the 6704 style static analogy output cards)
3 A high speed digital waveform card such as the (, 656x , 655x, 654x, 6534, 6533 (http://www.ni.com/modularinstruments/find_right.htm) ) this could then be scripted to work with your triggering and also there is a digital waveform editor which will enable you to set up the pattern you wish to generate (http://sine.ni.com/nips/cds/view/p/lang/en/nid/13555)
Hope that helps
Tim Matthews
NI (UK)

Finite Pulse Train

Dear All,
I have an application where I am using digital finite pulses (see attached example) but I want the generation to be stopped by the user too in addition to the task completed function.
Also, when I use generate finite pulse / generate continuous pulses can I use the other counter to count the pulses.
I am using PCI 6221 & LV8.0
Regards
James
Attachments:
FINITE PULSE TRAIN.vi ‏26 KB

Hello james!
Thanks for your post. I think what you want to do instead of "wait until DAQmx task is done" just use the "is DAQmx tasks done". That way you only call the VI once in software and it either returns true or false. If you "wait" until the task is done then you program loop will not continue until the task is finished. Take a look at the following pictures that shows you how I would do it. The task will give you a warning and tell you that you have not finished generating all the pulses yet but its just a warning and the task will stop. Let me know if you have any other questions and if this helps you with your application.
Cheers!
Corby_B
http://www.ni.com/support
Attachments:
False case keep generating.JPG ‏44 KB
True case STOP program.JPG ‏43 KB

Finite Pulse Train TIO-Timing Specs

Howdy everyone,
Got a question regarding the pulse specs of finite pulse generation with a 6602 (TIO chip).
I'm using a slightly modified version of the Finite Pulse Train (NI_TIO).vi found in the examples directory to produce finite pulses.
The slight modifications are to allow for some hardware triggering. I am using counters 2 and 3 to produce a finite pulse train.
My external electronics provides the trigger to the gating counter.
I want all of my timing specs relative to this external pulse.
Let's say I want a delay of 10 seconds until my first output pulse is produced by the output counter; I want pulses to come every 1 sec; Pulses are 0.5 sec wide.
I know from looking into the VI's that the TOTAL delay--ie the time from my external trigger until the time the output counter outputs a 0.5 sec pulse--is equal to the "initial delay (in secs) in the finite pulse specs cluster in the VI plus the interpulse interval minus the pulse width.
Thus, If I enter a value of 10 seconds for initial delay, I actually expect the first pulse to be output at time = 10 +1 - 0.5 sec = 10.5 sec. This is one-half second later than desired, but it is easy to correct.
Now for my real question:
I'm usually looking at pulses coming about 20 msec after the trigger arrives. The pulse interval is 5msec and the pulses are 0.5 msec wide.
Even when I program my counters to get the timing I want with this correction, ie. implement the formula Desired Delay = "Initial Delay" - (pulse interval - pulse width), I still see my pulse arriving late by 1msec. 1 msec is enough that I care to get it right. I don't understand the source of this delay. Does anyone have any idea what could be happening?
It seems totally independent of any parameters I enter for pulse interval, intial delay, pulse width.
Not sure if it matter, but I'm generating this finite pulse train inside of a much larger VI that is busy collecting and displaying data from a 6071E.
Any thoughts/help would be greatly appreciated!

I'm using Traditional DAQ (not DAQmx), so I think points 3 and 4 are not strictly true for my VI.
(I'm am very hesitant at this moment to think about switching over to DAQmx : I"m at the end of my graduate career and don't have the time to overhaul my program at the moment; and my VI works perfectly for my needs..except the 1msec delay. I'll suggest future lab peoples move to mx...)
As I understand, for traditional DAQ:
1. Start the counter -- I believe it will force the output into its idle state (low by default).
2. Trigger edge occurs
3. Output remains in idle state for "initial delay."
4. Output transitions to armed state and remains low for "low time" which is computed/specified by the "frequency" and "duty cycle" specs. So the total delay is the "initial delay" + "low time"
5. Ouput transitions to high state for a time, also determined/computed by the frequency and duty cycle specs.
6.Thereafter, the times will be based on your regular pulse specs, such as low time / high time.
OK, I didn't want to drag the VI into it, but it seems there is no other way; and I really want to know why my timing is not quite as I would expect.
The VI I posted has 3 outter sequence frames. The action, as far as we're concerned in this post, is in outter frame number 3; inner frame number 3, case True, subVI Finite Pulse Train (NI-TIO)-jev4.vi. This VI is "slightly" modified from the example that came packaged with LV "Finite Pulse Train (NI-TIO).vi" The modifcations I made were 1. removed the while loop that checked the status of the counters, because I needed this subVI to return before the pulse train had actually finished executing. 2. Added start trig capability to the gating counter's gate. (Maybe this is the source of the 1msec error?).
There is a variable "stim delay (msec)" that specifies when the first high pulse should be output from the 6602. (device 2 for me.)
To complicate things further, " stim delay" is actually relative to another variable in Neurochip-legacy.vi called "record delay." Record delay specifies the delay between the the arrival of the trigger pulse and start of data acquisition on NI6071E. (had to do this because of the way things are set up in the lab). This trigger pulse is shared with the 6602--it is hardwired in a breakout box to also be routed to my 6602 card. Thus, if the trigger arrives at time = 0, record delay = 20 msec, and stim delay = 40 msec, I would like to see my first output pulse of the train (on the 6602) come at time = 60 msec.
For the time being I have set the "initial delay" = record delay + stim delay - (pulse interval - Ta), where pulse interval is just 1/"frequency" parameter for finite pulse generation, and Ta is the desired width of the output pulse which in turn specifies "duty cycle" parameter. For the moment, I've also hardcoded in a 1msec correction--which was the whole reason for the original post.
Maybe in all this arithmetic and wiring I've made a goof somewhere...if so, maybe a fresh pair of eyes would help.
Ok, so if you are brave enough to check out the code, it is attached.
If you find that you are getting the same result as me, I would love to know it.
If you are getting different result than me, I'd love to know it.
If you see where I went wrong, I'd really love to know where.
Thanks very much
jon
Attachments:
Neurochip-Legacy.vi.zip ‏637 KB

REQ: Example of Dig Pulse Train where PWM varies.

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