SPI and UART
Hi Everyone,
Hope all is well. I am new to the lab view environment and embedded design and I have a question that I am hoping you all will be able to help me with. On the SPI and UART example I have found that changing the baud rate will increase the clock speed during a sample, however, there is a gap in between samples. Is there anyway that I can reduce this gap so that at a high frequencies I can make the end of one clock cycle closer to the beginning of another? Specifically, I would like to sample 16 bit data from the spi at 240 ksamples/second. Please let me know and thanks in advance for the help.
~rrobinson
Hi,
I believe the behavior you are seeing is relatively expected. This example does not make an attempted to have things super synchronized. For example: inside the main VI there is a subVI called Device Single Word ReadWright. The last thing this subVI does is disable the SPI and thus it has to be enabled the next loop iteration. This example is probably not optimized to do exactly what you want. You will probably need to come up with some buffering scheme of your own. To see how the buffers are set up in this example you can open up the SPI Action.vi.
Charlie M. CLD
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You need to get control of your Apple ID. Change the password.
Manage your Apple ID -
https://appleid.apple.com/cgi-bin/WebObjects/MyAppleId.woa/
If you can't change the password because this person ahs changed the password to something that you don't know then contact the Account Security Team to get control of your account.
Apple ID security issues -
Call Apple Care for your country and ask for the Account Security Team. They can assist you with your issue.
http://support.apple.com/kb/HT5699
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Mcb2300 (lpc2378) SPI and external ADC
Hello,
I'm using LabVIEW 2011 Embedded for ARM in conjunction with the MCB2300 development board and the MCP3204 12-bit ADC chip. I'm attempting to use the basic SPI VIs to communicate with the MCP3204. I enclose below the screenshot of my VI. Can somebody tell me if this is correct way of thinking ? I'd like to read data from all 3 channels from ADC - 3 axis of ADXL sensor connected. Additionally, I attached a few pages from MCP3204 datasheet.
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Solved!
Go to Solution.
Attachments:
mcb2300_spi_vi.png 155 KB
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there is solution on NI Developer zone, that can help you - https://decibel.ni.com/content/docs/DOC-15231 -
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If there are problems with updating or with the permissions then easiest is to download the full version and trash the currently installed version to do a clean install of the new version.
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Dual SPI.png 26 KBHi Viper
You are right, the 8451 can only be configured as an SPI Master. For creating a slave you would have to choose an FPGA based solution. Depending on the hardware from NI that you currently have, you can choose from different FPGA cards or devices. I found some links that might help you with your search:
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Adam Taylor publishes the MicroZed Chronicles weekly in the Xcell Daily blog so you are likely familiar with his writing. Adam has just published an article about SDSoC and Zynq titled “High-level synthesis comes of age with SDSoC” on the Embedded.com Web site. Here’s his motivation for writing this article:
“…Zynq is a device every embedded system designer should be familiar with and considering for their application. At its heart the Zynq is not a FPGA with embedded processors -- like previous generations of FPGA with Power PCs -- but a true embedded processor with very flexible interfacing capabilities (DDR, CAN, UART, USB, Giga Bit Ethernet, SPI and I2C to name a few). What separates the Zynq from other embedded processors is the attached programmable logic, and with SDSoC embedded system developers can exploit this pretty simply…
SDSoC takes the eclipse front end, Vivado HLS, Vivado and a lot of behind the scenes intelligence to create seamlessly the option to accelerate software functions in the attached programmable logic of the device.”
What follows is a simple explanation of what SDSoC brings to the party from a design engineer’s perspective.
Recommended reading.
xisal wrote:
Take a look into /etc/hal/fdi/policy/10-keymap.fdi. This works with portuguese layout:
<snip>
The file did not exist, so I created it and changed "pt" to "it". Thanks a bunch, that fixed it!
Try SMPlayer.
Ah, I'd rather not involve Qt. Besides, isn't SMPlayer simply a frontend to Mplayer (who already has GMplayer integrated into it, IIRC)?
Mikko777 wrote:
Why would you want to use 75Hz with lcd display?
Does it make a difference?
On my monitor, from my point of view, it appears to make a difference. It's that simple
azleifel wrote:In gmplayer Preferences -> Audio -> (assuming alsa selected) -> Configure driver and change the mixer channel to something other than PCM, e.g. Master.
For all the three combos, I have "driver default" selected. The other option is "default"; I tried to manually type "Master" into the mixer channel field, but then gmplayer's windows and my Xfce taskbar started blinking, so I knew I had just "crossed streams".
Regarding NVIDIA X Server Settings, running "usr/bin/nvidia-settings --load-config-only" at login is the only way to apply the settings "automatically".
I've slapped that on my ~/.xinitrc before "exec startxfce4". Thanks in advance, going to test it now!
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Account HACKED, identity fraud, and no help
Hello I was recently informed that one of my contacts on Skype had their account compromised (April 19th). Their name was changed to "Ray Morgan" and their birthday was changed to "June 12, 1960" as well as their place of residence changed to "New York, USA" and their picture too. Then I had noticed something strange going on with my OWN account. I can no longer log in, and when I try to reset my password, it says to contact Customer Service.
I have filled out the Account Verification form three times already, have offered ALL of my information, including my name, date of birth, all my contacts, my billing address.. basically everything I can possibly give, and still no response. I am just getting the same email over and over again.
ANOTHER note. My contact whose account was initially compromised is a family member of mine, and I had created her account, however I do not remember the email used to create the account. The Skype representative who I spoke to over chat said that it does NOT matter, because Skype has other ways of verifying an account. This is extremely frustrating and quite frankly, scary.
Last night, our camera had randomly turned on on the laptop, without talking with anybody. When I quit Skype (as it just runs in the background), the light went off. I believe somebody was accessing my camera. I don't know what further steps to take, I believe somebody is spying and hacking on me. Why doesn't Skype help, this is ALL on you. My billing information is on my account.Hello,
Our escalation team reports as follows:
" I have viewed the customer’s community post and pulled up the Skype account that is associated with the e-mail address below. The Skype account associated with the customer’s e-mail address provided does not contain any stored payment details, nor is the account blocked. No record of any account take over on the user name is present, and the password was recently changed on April 19th 2015.
If the customer is referring to a different skype name that is associated with a different e-mail address (Which I suspect is the case in this circumstance) I would be happy to help with the issue by providing whatever guidance I can. However, we cannot support account recovery via live chat or phone call for security and privacy purposes. Because the information required for account verification contains sensitive information, verification can only take place over e-mail through the form that was provided previously. If the customer has filled out the form for account verification/recovery, I will be able to see the information that she filled out and compare that to her account information to hopefully give her back access to the account. If the information provided does not match the account information the account will remain blocked.
If there are other accounts that have been compromised the account owner should contact support and create their own request for recovery. "
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How can I view resolution in DPI and not PPI?
Hi all,
Under Bridge>view content as list, I got a column of Resolution but the mesurement are ppi and not dpi and i need to see the dpi.
Anyone knows where can i set it?
thanks..
shlomitShlomit,
Strictly speaking, images do not have dpi (ever), only ppi. Images are made of pixels, not dots.
Dpi refers to prints.
However, in everyday use, the terms are loosely used interchangeably. They work out to exactly the same thing (same numbers), but ppi is the correct terminlogy.
See: http://www.scantips.com/basics01.html
DPI, PPI, SPI - What's in a name?
Printer ink dots and image pixels are very different concepts, but both use the term dpi in their own way (dots per inch).
Inkjet printer dpi ratings refer to printer ink dots (the four colors of ink), which is NOT AT ALL the same thing as image pixels. These are such different concepts that some people think we should reserve the term dpi for those inkjet ink dots, and reserve use of ppi only for image pixels. Not a bad plan, except that this view fails to recognize real world usage.
We may hear scanning resolution called spi (Samples Per Inch), and that is indeed what it is. We often hear image resolution called ppi (Pixels Per Inch), and that is indeed what it is. The spi and ppi terms are correct. But historical and common usage has always said dpi for image resolution, meaning pixels per inch, and fully interchangeable with ppi. Pixels are conceptually a kind of colored dot too, and resolution has always been called dpi, for years before we had inkjet printers. Dpi is just jargon perhaps, but it is a fact of life. Scanners and scanner ratings say dpi too, meaning pixels per inch (see dialog pictures here, here, here, and here). I habitually always say dpi myself, but I did try to switch to ppi in the book version.
We may use the term of our own preference, but we need to understand it both ways. Some photo editor programs have switched to saying ppi now, which has much to be said for it. But others have not switched, so insisting on conformity for others to only say ppi will necessarily encounter much frustration, because the real world simply isn't that way, and obviously is not ready to switch yet.
My point here is that we must understand it both ways, because we will see it both ways, often, in the real world.
It's easy, not a problem - the idea of printing digital images is always about pixels per inch, so when the context pertains to images instead of printers, all of these terms, spi, ppi, and dpi, are exactly the same equivalent concept - they all mean pixels per inch.
There is no problem understanding any use of dpi if you know the context. It always means the only thing it can possibly mean. If the context pertains to images or printing pixels, dpi means "pixels per inch". If the context pertains to inkjet printer ratings, dpi means "ink dots per inch". There is no other meaning possible. This should be clear and no big deal - the English language is full of multiple context definitions. -
MicroBlaze MCS: UART TX in Interrupt Mode (I/O Module)
I'm getting my feet wet with the MicroBlaze MCS IP Core, and I'm having trouble using the XIOModule_Send function in interrupt mode. My assumption is that I simply don't understand how things are supposed to be hooked up - I'm hoping someone can show me what I'm doing wrong.
Below is my C code:
#include <stdio.h>
#include "xiomodule.h"
#include "xparameters.h"
int main()
u8 msg[20] = "Buffer Text\r\n";
XIOModule io;
microblaze_enable_interrupts();
microblaze_register_handler(XIOModule_DeviceInterruptHandler, XPAR_IOMODULE_0_DEVICE_ID);
XIOModule_Initialize(&io, XPAR_IOMODULE_0_DEVICE_ID);
XIOModule_Uart_EnableInterrupt(&io);
XIOModule_Connect(&io, XIN_IOMODULE_UART_TX_INTERRUPT_INTR, (XInterruptHandler)XIOModule_Uart_InterruptHandler, &io);
XIOModule_Start(&io);
XIOModule_Send(&io, msg, 20);
xil_printf("Immediate Text\r\n");
If I understand correctly, as each byte of msg is transmitted, XIOModule_Uart_InterruptHandler should fire and call SendDataHandler, which in turn calls XIOModule_SendBuffer. That function manages shifting the SendBuffer.NextBytePtr pointer to the next byte in the buffer, decrementing SendBuffer.RemainingBytes, and transmitting the next byte. This process of interrupts should continue until the entire buffer (or however many bytes are specified in the XIOModule_Send call) are transmitted.
However, the output I end up with is this:
BImmediate Text
I was expecting something more like this:
BImmediate Text
uffer Text
Interestingly (to me, who admittedly doesn't fully understand how all this works), if I debug the program, and step through the code, making sure to step INTO the XIOModule_Send call, and step INTO the XIOModule_SendBuffer call, the output comes out like this:
Buffer Text
Immediate Text
If I step OVER either of those functions, my output is the same as simply letting the program execute.
I realize that I can use the XIOModule_Send function in "polled mode", essentially placing it in a loop, and using the return value of the function to see how many bytes were transmitted during the call (if any), then re-calling the function with an appropriately updated buffer pointer, and finally exiting the loop when the entire buffer is sent. My objective, however, is to utilize the "interrupt mode", allowing the UART buffer to transmit while the micro performs other tasks (and not "blocking" it for the entire message all at once).
I'll also mention that I've made the correction to my XIOModule_Uart_InterruptHandler mentioned here. I have written a few other pieces of test code, and can get receive interrupts to fire as expected.
Thanks for your time!I hacked away at this for a couple of weeks, and finally got things straightened out. The short of it is that the Xilinx drivers for the I/O Module UART aren't the most robust, and have problems that stem from three main issues:
1) The UART status register and interrupt enable/pending registers do not contain the same kind of data. In more than one location, data from one is compared as though it came from the other.
2) UART interrupts are acknowledged before they're serviced. This means the interrupt pending register can't be checked to see what type of UART interrupt (RX or TX) fired.
3) The UART TX interrupt fires when the UART TX buffer is emptied. This means the UART TX buffer can't be relied on to tell what kind of UART interrupt fired.
So, on to the code... I made changes to XIOModule_Uart_InterruptHandler and XIOModule_SendBuffer, both located in xiomodule_uart_intr.c, and things are now working basically as I would expect. I'll quickly mention that, if anyone wishes to make similar adjustments, they should be made to the "master" source files located at \Xilinx\14.7\ISE_DS\EDK\sw\XilinxProcessorIPLib\drivers\iomodule_v1_04_a\src (assuming your version and installation are similar to mine), and then the board support package will need to be regenerated; changing the source files in an already-generated BSP won't actually do anything. Play it safe - make backups, or just comment out the original stuff.
First off, let's pick apart the "out-of-the-box" XIOModule_Uart_InterruptHandler (this function is intended to be connected to UART RX and TX interrupts - XIN_IOMODULE_UART_RX_INTERRUPT_INTR and XIN_IOMODULE_UART_TX_INTERRUPT_INTR from xiomodule_l.h - using the XIOModule_Connect function from xiomodule.c):
void XIOModule_Uart_InterruptHandler(XIOModule *InstancePtr)
u32 IsrStatus;
Xil_AssertVoid(InstancePtr != NULL);
* Read the status register to determine which, could be both,
* interrupt is active
IsrStatus = XIOModule_ReadReg(InstancePtr->BaseAddress,
XIN_IPR_OFFSET);
if ((IsrStatus & XUL_SR_RX_FIFO_VALID_DATA) != 0) {
ReceiveDataHandler(InstancePtr);
if (((IsrStatus & XUL_SR_TX_FIFO_FULL) == XUL_SR_TX_FIFO_FULL) &&
(InstancePtr->SendBuffer.RequestedBytes > 0)) {
SendDataHandler(InstancePtr);
To begin with, the value of the interrupt pending regsiter is read and stored to the IsrStatus variable. Bit 0 is then compared (XUL_SR_RX_FIFO_VALID_DATA = 0x0 in xiomodule_l.h) to determine whether or not a UART RX interrupt fired (bit 0 of the UART status register indicates RX valid data; it tells whether or not the UART TX buffer, which holds a single byte of data, is full). As matthijsbos points out in his post (link in OP), this comparison doesn't accomplish anything, and always results in a false result, since IsrStatus contains data not from the UART status register, but from the interrupt pending register, bit 0 of which indicates whether or not a UART error interrupt fired. Hence, ReceiveDataHandler is never called. Following is his recommended correction, the function can be modified thusly:
void XIOModule_Uart_InterruptHandler(XIOModule *InstancePtr)
u32 IsrStatus;
Xil_AssertVoid(InstancePtr != NULL);
* Read the status register to determine which, could be both,
* interrupt is active
//IsrStatus = XIOModule_ReadReg(InstancePtr->BaseAddress,
// XIN_IPR_OFFSET);
IsrStatus = XIOModule_ReadReg(InstancePtr->BaseAddress,
XUL_STATUS_REG_OFFSET);
if ((IsrStatus & XUL_SR_RX_FIFO_VALID_DATA) != 0) {
ReceiveDataHandler(InstancePtr);
if (((IsrStatus & XUL_SR_TX_FIFO_FULL) == XUL_SR_TX_FIFO_FULL) &&
(InstancePtr->SendBuffer.RequestedBytes > 0)) {
SendDataHandler(InstancePtr);
The offset passed to XIOModule_ReadReg is changed from XIN_IPR_OFFSET to XUL_STATUS_REG_OFFSET (from 0x34 to 0x8, both in xiomodule_l.h), resulting in the UART status register now being read into IsrStatus (the variable name should probably have been changed for clarity, but oh well). Consequently, an appropriate comparison is made against the value of the RX valid data bit, and UART receives now work correctly in "interrupted mode".
...however, let's continue on to look at the code handling UART TX interrupts. The value of the TX used bit, again from the UART status register, is compared, and the value of the SendBuffer.RequestedBytes variable (inside the XIOModule struct, defined in xiomodule.h) is checked to see whether or not a UART TX interrupt has fired. SendBuffer.RequestedBytes is set when XIOModule_Send is called by the application, and is reset to 0 by SendDataHandler after the indicated number of bytes in the referenced buffer have been placed into the UART TX buffer (both of these functions are in xiomodule_uart_intr.c). This means it's a solid check to see if more bytes still need to be transmitted, but it's not a stand-alone indicator of whether or not a UART TX interrupt has fired, hence the coupling with the TX used bit check. This bit tells whether or not the UART TX buffer is full (similar to the UART RX buffer, it holds only a single byte). Unfortunately, as mentioned at the top of the post, the UART TX interrupt fires when the UART TX buffer is emptied, so when this comparison is performed, it will always return false, and SendDataHandler will never be called. The inverse comparison can't be made, since it's possible for a UART RX interrupt to occur, and for there to be a byte of data in the UART TX buffer which simply hasn't been transmitted yet (it would also fail following transmission of the final byte of data).
As a solution, I pose the following. XIOModule_UART_InterruptHandler is intended to be called only for UART RX and UART TX interrupts. As written, it is intended to deal with both interrupts firing at the same time (though, for the above reasons, it doesn't actually work) with default interrupt servicing (only the highest priority interrupt will be serviced - to set otherwise, XIOModule_SetOptions from xiomodule_options.c would need to be called passing XIN_SVC_ALL_ISRS_OPTION from xiomodule.h). The likelkihood of both interrupts occurring "simultaneously" (within the same microprocessor clock cycle) is remote, and thus I claim only a single comparison is necessary to determine which of the two interrupts fired:
void XIOModule_Uart_InterruptHandler(XIOModule *InstancePtr)
u32 IsrStatus;
Xil_AssertVoid(InstancePtr != NULL);
* Read the status register to determine which, could be both,
* interrupt is active
//IsrStatus = XIOModule_ReadReg(InstancePtr->BaseAddress,
// XIN_IPR_OFFSET);
IsrStatus = XIOModule_ReadReg(InstancePtr->BaseAddress,
XUL_STATUS_REG_OFFSET);
//if ((IsrStatus & XUL_SR_RX_FIFO_VALID_DATA) != 0) {
// ReceiveDataHandler(InstancePtr);
//if (((IsrStatus & XUL_SR_TX_FIFO_FULL) == XUL_SR_TX_FIFO_FULL) &&
// (InstancePtr->SendBuffer.RequestedBytes > 0)) {
// SendDataHandler(InstancePtr);
if ((IsrStatus & XUL_SR_RX_FIFO_VALID_DATA) != 0)
ReceiveDataHandler(InstancePtr);
else
SendDataHandler(InstancePtr);
In my version of the function, only the UART RX receive buffer is checked to determine which of the interrupts fired. Since XIOModule_Uart_InterruptHandler will ONLY be called when either a UART RX or UART TX interrupt fires, neither of the appropriate handlers will be called erroneously. There is only the (extremely) small chance that both interrupts will fire within the same microprocessor clock cycle, in which case only ReceiveDataHandler will be called, resulting in only the UART RX interrupt being appropriately serviced.
...yet this still doesn't completely get "interrupted mode" UART transmits working. Let's now take a look at the unedited version of XIOModule_SendBuffer:
unsigned int XIOModule_SendBuffer(XIOModule *InstancePtr)
unsigned int SentCount = 0;
u8 StatusRegister;
u8 IntrEnableStatus;
* Read the status register to determine if the transmitter is full
StatusRegister = XIOModule_GetStatusReg(InstancePtr->BaseAddress);
* Enter a critical region by disabling all the UART interrupts to allow
* this call to stop a previous operation that may be interrupt driven
XIomodule_Out32(InstancePtr->BaseAddress + XIN_IER_OFFSET,
StatusRegister & 0xFFFFFFF8);
* Save the status register contents to restore the interrupt enable
* register to it's previous value when that the critical region is
* exited
IntrEnableStatus = StatusRegister;
* Fill the FIFO from the the buffer that was specified
while (((StatusRegister & XUL_SR_TX_FIFO_FULL) == 0) &&
(SentCount < InstancePtr->SendBuffer.RemainingBytes)) {
XIOModule_WriteReg(InstancePtr->BaseAddress,
XUL_TX_OFFSET,
InstancePtr->SendBuffer.NextBytePtr[
SentCount]);
SentCount++;
StatusRegister =
XIOModule_GetStatusReg(InstancePtr->BaseAddress);
* Update the buffer to reflect the bytes that were sent from it
InstancePtr->SendBuffer.NextBytePtr += SentCount;
InstancePtr->SendBuffer.RemainingBytes -= SentCount;
* Increment associated counters
InstancePtr->Uart_Stats.CharactersTransmitted += SentCount;
* Restore the interrupt enable register to it's previous value such
* that the critical region is exited
XIomodule_Out32(InstancePtr->BaseAddress + XIN_IER_OFFSET,
(InstancePtr->CurrentIER & 0xFFFFFFF8) | (IntrEnableStatus & 0x7));
* Return the number of bytes that were sent, althought they really were
* only put into the FIFO, not completely sent yet
return SentCount;
First, XIOModule_GetStatusReg (from xiomodule_l.h) is called to retreive the value of the UART status register. This value is then apparently used with a bit mask to disable any enabled UART interrupts. Unfortunately, this is another case of comparing dissimilar data from two different registers. Further complicating matters, the contents of the interrupt enable register can't be read as an alternative (an attempt to read any of the constituent bits will return a 0, even if the associated interrupt is truly enabled). Continuing, the value of the UART status register is again checked to ensure the UART TX buffer is empty, appropriate variables in the XIOModule struct are checked to see how many bytes still need to be transmitted, and the address of the next byte to place into the UART TX buffer is used to do just that. After send counts are updated, the value of the UART status register is again erroneously used in an attempt to re-enable any UART interrupts that had been disabled earlier in the function.
My corrections instead rely on the value of the CurrentIER ("current interrupt enable register") variable in the XIOModule struct, which is appriopriately updated by other functions as interrupts are modified, to correctly disable and enable UART interrupts:
unsigned int XIOModule_SendBuffer(XIOModule *InstancePtr)
unsigned int SentCount = 0;
u8 StatusRegister;
u8 IntrEnableStatus;
* Read the status register to determine if the transmitter is full
StatusRegister = XIOModule_GetStatusReg(InstancePtr->BaseAddress);
* Enter a critical region by disabling all the UART interrupts to allow
* this call to stop a previous operation that may be interrupt driven
//XIomodule_Out32(InstancePtr->BaseAddress + XIN_IER_OFFSET,
// StatusRegister & 0xFFFFFFF8);
* Save the status register contents to restore the interrupt enable
* register to it's previous value when that the critical region is
* exited
//IntrEnableStatus = StatusRegister;
XIomodule_Out32(InstancePtr->BaseAddress + XIN_IER_OFFSET, InstancePtr->CurrentIER & 0xFFFFFFF8);
* Fill the FIFO from the the buffer that was specified
while (((StatusRegister & XUL_SR_TX_FIFO_FULL) == 0) &&
(SentCount < InstancePtr->SendBuffer.RemainingBytes)) {
XIOModule_WriteReg(InstancePtr->BaseAddress,
XUL_TX_OFFSET,
InstancePtr->SendBuffer.NextBytePtr[
SentCount]);
SentCount++;
StatusRegister =
XIOModule_GetStatusReg(InstancePtr->BaseAddress);
* Update the buffer to reflect the bytes that were sent from it
InstancePtr->SendBuffer.NextBytePtr += SentCount;
InstancePtr->SendBuffer.RemainingBytes -= SentCount;
* Increment associated counters
InstancePtr->Uart_Stats.CharactersTransmitted += SentCount;
* Restore the interrupt enable register to it's previous value such
* that the critical region is exited
//XIomodule_Out32(InstancePtr->BaseAddress + XIN_IER_OFFSET,
// (InstancePtr->CurrentIER & 0xFFFFFFF8) | (IntrEnableStatus & 0x7));
XIomodule_Out32(InstancePtr->BaseAddress + XIN_IER_OFFSET, InstancePtr->CurrentIER & 0xFFFFFFFF);
* Return the number of bytes that were sent, althought they really were
* only put into the FIFO, not completely sent yet
return SentCount;
With both of these functions modified as I have above, UART transmits work as I would expect them to in "interrupted mode". Once a byte is placed into the UART TX buffer, execution returns to the primary application. When the UART TX buffer clears, a UART TX interrupt fires, the next byte is placed into the UART TX buffer, and execution again returns to the primary application. This continues until all indicated bytes are transmitted, and then the application provided send data handler is called (set with XIOModule_SetSendHandler in xiomodule_uart_intr.c). A good pracitce for this handler would be to immediately disable/disconnect UART TX interrupts in order to avoid complications and unintended results. It's worth mentioning that attempting to interject non-interrupted mode UART transmits (say, for instance, using xil_printf) in the middle of an interrputed mode transmit will produce very unpredictable results.
That all being said... I would wager that many of those using an embedded MicroBlaze controller for its UART functionality are probably doing so while their VHDL is doing all the "heavy lifting", and the gains made by utilizing "interrupted mode" transmits would be marginal.
-
Is it possible to release the SPI clock signal so it reamins high immediately after sending data on the SDO line? Currently, SCLK is held low for a significant period of time after transmission of the final data bit before it is released to a logic high state. Is there a way to configure this? Is there also a way to configure DIO signals independent of the SPI using scripting?
Hi John,
I believe you are referring to the clock polarity and phase.
Where Can I Find More Information About the SPI Clock in a USB-8451?
http://digital.ni.com/public.nsf/allkb/4FB0A184E545AC1586257609007537EF?OpenDocument
The information is found here in the NI-845x Hardware and Software Manual:
http://www.ni.com/pdf/manuals/371746e.pdf#page=26
Additionally, beyond using SPI scripting, we can use the basic SPI and basic DIO examples installed with the 845x driver in Help > Find Examples.
Joey S.
Software Product Manager
National Instruments -
Costum module interfaces compact rio: how do I select SPI or parallel template in operation mode
Hi,
I want to create custom module for my compact rio embedded chassis.And my question is how I can select between SPI and parallel interface in the operation mode? Do I have to write a logical low or high to a special pin to select the SPI template??
Regards,
bluemoonFor development of custom modules you need the cRIO Module Development Kit.
http://sine.ni.com/nips/cds/view/p/lang/de/nid/14548
Along with the Kit comes the documentation which includes handling of the interface.
Regards
Stephan A.
NI -
Zynq SPI Slave mode receive error
Hi,
We are using SPI-0 as master (uses SS-0) and SPI-1 as slave (uses SS-0) on our custom Zynq-7020 board. We have verified SPI-0 interface but SPI-1 does not seem to receive anything. Even when we set internal SPI-to-SPI loopback mode (through SLCR MIO-LOOPBACK reg.) SPI-1 receives nothing. We can reach registers of SPI-1 correctly so we assume SPI-1 is clocked properly. But after transmission completed, there is no change in status register of SPI-1 and Rx FIFO reads return all 0x00s. Any similar experience or suggestions for using PS SPI in slave mode or using both PS SPI peripherals?
Regards, Zafer.SPI-0 uses MIO[40...45], SPI-1 uses MIO[46...51], MDIO uses MIO[52...53] and Eth-0 uses MIO[16...27], so yes, both SPIs and MDIO can be configured without any conflict.
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IChat And New D-Link Router Problems
Folks,
I really need a helping hand with iChat. I've posted some problems here before which you were kind enough to help me out with but I am at wits end tonight. I just bought a new D-Link EBR-2310 Wired Router (Hardware Version B1 and Firmware Version 2.01 - the very latest version). I'm completely up to date on my iMac running Mac OS X 10.5.7 with every software update known to June 11th, 2009 including QuickTime 7.6.2. I have QuickTime Streaming set to 1.5Mbps T1/Intranet LAN and iChat Bandwidth Limit set to 500 kbps.
I use an AIM account which uses port 5190. With my old D-Link Router (DI-604), I had to set up an Advanced Virtual Server for UDP Port 5190 and I also had to disable the "Discard Ping From WAN side" function (which seems to almost defeat the purpose of the security of the router in some ways but I didn't have much choice). Making these changes seemed to fix all the iChat "communications error" problems I was having with the older router. Things seemed to work fine after making these changes mind you, this was under Mac OS X 10.5.6 and I'm now running Mac OS X 10.5.7.
In this new D-Link EBR-2310 Router, I've done much the same thing. In the Advanced Section of the new router under Application Rules, I've set up a new "application name" called iChat and configured Trigger Port 5190 UDP and Firewall Port 5190 UDP - set to "always" but should I have both UDP and TCP enabled or just UDP? I've also enabled "WAN Ping Respond" (again, this seems to defeat some of the security of the router but no choice other than to do this).
I'm getting iChat "communications errors" and just a generally poor connection with whomever I chat with. On their end, my voice will drop out at times and my image will sometimes have a little static in it. It happens with all users on their end (some are AIM users, some are dotmac/mobile me users). After a few minutes of being able to chat, the picture will freeze and a communication error pops up. We have to quit out of our connection and log back in and then it will work again for a while until the same problem occurs.
I called D-Link and they were of no help when it came to using Macs with iChat (iChat isn't even listed as one of the applications in any of the router preferences). They suggested changing the MTU from 1500 down to 1492 but my old D-Link worked fine at 1500. They also suggested disabling "SPI" in the router firewall settings. I haven't done any of this yet as they didn't know much about Macs.
Do I need to disable "SPI" in the router firewall settings? Do I need to configure both UDP and TCP ports 5190 in Application Rules? Do I need to set up some sort of Port Forwarding on this new router? Is there some other configuration I need to set up in this new router? I'm just lost. Darned near ready to do away with the router completely but we have three Macs on our network so we need the router in order for all of us to be able to access the Internet.
Any help would be greatly appreciated.
Thanks,
GerardHi,
Both are correct.
iChat 3 uses 20 ports as a Range for the A/V chats as it uses 4 ports on a Vid in Vid Out, Audio In Audio Out basis where as iChat 4 sends and gets everything on one port.
The iChat 4 Article http://support.apple.com/kb/HT2282 does not mention the Bonjour or Jabber Ports which are still needed (in the router and/or Modem)
What the Second Article does not list is the iChat Screen Sharing port.
For this using UPnP if the device has it is better.
UPnP (Universal Plug and Play) allows the app to sate when and what ports are open for it (they close after a period of Non use that can be adjusted in some modem/routers).
You need this as the Screen Sharing ports is random.
The Port Forward site shows two versions
Version 1
Version 2
with slight differences in how the boxes can be filled in.
Neither set of pics gives clues as to whether UPnP is on there.
Yes I would disable SPI (And/Or DoS)
SPI (Stateful Packet Inspection) tries to examine the data coming to your modem and judge if it is Ok to pass on.
There is so much iChat Video data in some chats that it can not keep up and closes the port.
DoS (Denial Of Service) measures the rate of data and when it reaches a threshold it cuts the port presuming it to be an attack. Of course most devices that have it have un-adjustable settings that do not reflect modern Internet Speeds.
EDIT
This Emulator says UPnP is in Advanced Network along with Enable WAN Ping Respond (Although you do not have a time limit adjustment)
9:57 PM Friday; June 12, 2009
Please, if posting Logs, do not post any Log info after the line "Binary Images for iChat"
Message was edited by: Ralph Johns (UK) -
Can the USB-8451 run both I2C & SPI Interfaces at the same time?
I have an 8451 on the way and initially will be developing a driver for our product using the SPI I/F. I am also developing a test setup that will use the I2C I/F and need to know if 1 8451 will handle both at the same time or will I have to re-configure each I/F when I need to use it if I have only 1 8451 in the system?
The SPI driver will communicate with our product & the I2C I/F will communicate with the test fixture...
TIAWell, you may be only able to open 1 VISA session to the 8451, but that doesn't mean you cant use both SPI and I2C at the same time. I guess it depends on what your definition of "same time" is.
I have a project that uses 4 SPI channels and the I2C using a single OEM 8451 simultaneously without having to create a new session for each use. Just create and store (I do it as class data) the visa session handle and create and store all your channel references. Each channel you create does not need its own VISA session. I access the 8451 from several different VIs asynchronously without any problem. The VISA protocol will sort out coincident requests.
Buying a seperate 8451 should definitely not be required
Bill F -
I can iChat using AIM screen names with other Mac's, but I can't with my father on his PC using AIM and his AIM screen name. I have read through many posts on this topic, but have merely succeeded in thoroughly confusing myself.
I have an iMac with OSx 10.5.7. It is on a wireless network using a Netgear WGR614 router. I am using iChat version 4. My father has a Windows XP computer. He is using a D-Links DI-624 router. His version of AIM is 6.9. I have asked him to turn off "Real Time," although I'm not quite sure that he has figured out how to do that yet (he just turned 80 years old).
Can I correctly assume that because I can iChat successfully with other Mac users that my router is properly configured and that the problem lies with my father's set up?
If the problem is with my father's set up, this Apple support document suggests that with respect to configuring his DI-624 router, all he needs to do is turn off UPnP. http://support.apple.com/kb/HT1787. But I can't tell if the document applies only to Mac users of iChat or to Windows users of AIM who wish to chat with Mac users of iChat. My father is in the latter catergory.
If my father must configure his DI-624 router, which ports mucst he open/forward? The ones that I have seen listed that iChat users are suppose to open, the ones that AIM users are suppose to open, both?
Finally, the DI-624 seems to permit two methods to open ports: "Firewall Rules" and "port triggering". Which should I use?
Thanks for all your help.
JohnHi
Which Netgear WGR 614 version do you have ?
Things don't really improve with this series until Version 9 (It's about the only dud for iChat Netgear there is.)
It should be doing UPnP
DOS (Or SPI) and Ping Blocking in the WAN Set up page should both be Off.
If that D-Link does UPnP then use that.
On his PC
He will need to do this Blue stuff in his Firewall
http://www.ralphjohns.co.uk/page12.html#_Service
Simplefied version
Go to Start > Control Panels.
Access the Firewall
Click the Exceptions tab
Add AIM6.exe as the method suggests (Navigate to the Program Files > AIM blah blah)
Enable UPnP as well in the List.
Your Post suggests you have Read this
http://discussions.apple.com/thread.jspa?threadID=1968438
Turning Off Real Time supersedes this.
THE AIM FAQ and Pics about Real Time
If his does not do UPnP then use this page as well as the port 5190 listed he will need to enter as many as he can fro the Group 1024-5000
Unfortunately he can not add the Group and has to enter each port on one entry. (He will not get all the ports in the table - technically 4 should be enough)
9:44 PM Tuesday; June 23, 2009
Please, if posting Logs, do not post any Log info after the line "Binary Images for iChat"
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