TS3274 My ipad still refuses to power off will not let me slide

The screen says not enough storage
This ipad cannot be backed up because
there is not enogh icloud storage available
you can manage storage in settings
CLOSE SETTINGS
it will not let me press either and also can not poere off

can anyone help??????

Similar Messages

My ipad will not let me slide to log in, or power off. i have tried to hold down the sleep and home button at the same time, but that did not work. Do you have any tips for me? Thanks

my ipad will not let me slide to log in, or power off. I have tried to hold down the sleep and home button at the same time, but that did not work. D o you have any tips for me? Thanks.

recovery mode
open itunes on computer
plug cable into computer not iOS device
turn phone off
hold home button and plug cable into phone. do not release home button until an itunes graphic appears on device.
look to computer should have message about recovery mode click ok and restore
Peace, Clyde
if u need an article see
http://support.apple.com/kb/HT1808

Iphone 4 slide to unlock and slide to power off will not work but all other touch features work

Iphone 4 slide to unlock and slide to power off will not work but all other touch features work properly

You will have to get it serviced.

HT201412 My lock screen is frozen. It will not let me slide to unlock or anything. I can't power it off because my lock button is broken and I can't do the assistive touch thing? Help!

My lock screen is frozen! It will not let me slide to unlock or touch the screen at all. I can't power it down either because the lock button is broken. A friend of mine said I might need a new Digitizer? Is there anyway I can avoid that? Pleasae Help!

I am having the SAME exact problem! Except instead of lock button broken it's my home button so I can't do the whole "put in recovery mode" deal. My screen only says "tap the home button 3 times" and it has my screen locked until I hit the home button but since it is broken I can't get in my phone at all. I have all of my work info in my phone so I'm screwed and can't get any help. PLEASE let me know if you find a way around this...!!!
Thanks!

HT4623 After updating my phone yesterday it worked for about 30 minutes. Now however, it will not let me "Slide To Unlock" the screen is totally unusable and i have alarms that go off every 8 minutes because i am not able to get into my phone to them off.

After updating my phone yesterday it worked for about 30 minutes. Now however, it will not let me "Slide To Unlock" the screen is totally unusable and i have alarms that go off every 8 minutes because i am not able to get into my phone to them off. has anyone else had this problem with it being "stuck"?

Basics from the user guide have always been, and still remain, restart, reset, restore from backup, restore as new.

HT4061 my new apple ipad will turn on to the apple logo but will not let you slide to open

my apple ipad will not let you slide to open, have tries resetting by holding down wake and home button but it goes back to the slider. anyone know what else i can do

What to Do When Your iPad Won't Turn On
http://ipad.about.com/od/iPad_Troubleshooting/ss/What-To-Do-When-Your-Ipad-Wo-No t-Turn-On.htm
iOS: Not responding or does not turn on
http://support.apple.com/kb/TS3281
iPad Frozen? How to Force Quit an App, Reset or Restart Your iPad
http://ipadacademy.com/2010/11/ipad-frozen-how-to-force-quit-an-app-reset-or-res tart-your-ipad
iPad: Basic troubleshooting
http://support.apple.com/kb/TS3274
Take it to an Apple Store for evaluation.
Make a Genius Bar Reservation
http://www.apple.com/retail/geniusbar/
 Cheers, Tom

I have a program that requires cancel, details or continue. It appears to be stuck and will not let me slide to unlock or slide to close. How do I restart the ipad?

I have a program that requires cancel, details or continue. It appears to be stuck and will not let me slide to unlock or slide to close. How do I restart the ipad?

Hi there, welcome to the site,
I have posted a link below which has instructions on how to do this. They are quite simple, so take a look.
iPad not responding
Regards,
Nathan

Please help! My iPhone 4s will not let me slide wifi from off to no"

Please help! My iPhone 4s will not let me slide wifi from off to no"

http://support.apple.com/kb/ts1559

Please help! My iPhone 4s will not let me slide from off to no

Please help! My iPhone 4s will not let me slide from off to no

try this:
Hold down the Sleep/Wake button and the home button together until the apple logo appears (ignore the ON/OFF slider) then let both buttons go and wait for phone to restart (no data will be lost).

My 2 week old ipad randomly shuts down and sometimes will not let me type web address into browser.

Sometimes my ipad will just restart itself (the screen goes black, and the apple icon appears and then it's back on). The battery will be higher than 50%. Also, when this is occurring frequently, the web browser will not let me type an address in. When I tap on the address bar it sends me back to my home screen. It will connect to the internet during this time, so I know it's not a internet connection problem.

When in doubt, reboot. Press and hold the sleep and power buttons until the apple logo appears. Ignore the red slider. You may simply be overwhelming the memory. From time to time, doulbe click on the home button to see the task bar. Touch and hold any of those icons until they jiggle, then delete them by touching the minus sign.

MSi GT70 - 0NE-276us Sudden Power Off/Will not Stay On

First and foremost, thank you for taking the time to read about my problem. No sob story, however this is my only computer and it was/is my work machine in the IT Administrative/Deskside Workplace. Any ideas are welcome.
I have an MSi GT70-0NE 276us Laptop. I bought it last year (Christmas). I was playing a game on Steam when suddenly the machine turned off. Using my troubleshooting experience, here is what I tried:
-Removing the battery and power supply from the machine and holding power button for 1 minute
-After testing with ONLY the battery inside the machine, pressing the power button makes a white flash and a shimmer of light sent to the keyboard, but doesnt actually turn on. It does this upon each keypress and does not skip a beat.
- I tried to connect the power supply directly into the laptop WITHOUT the battery connected, and it does the same thing. As for the battery indicator light, it does not stay on as it normally would when the power is connected to it.
NOTE: I have NEVER used my laptop WITHOUT the power cord connected; it is always attached since I know its a power hog.
- I have checked for any smells of burning/melting and there are none. The laptop was also not that hot when it cut off suddenly.
- Ive blown the mainboard/underside with compressed air and removed all of the dust
- Ive made sure the fan was clear and connected
- Ive reseated the RAM
- I have NOT tried another power brick; the one I received was refurbished.
- The LED on the power brick lights up but nothing is coming into the machine
- I have not had the laptop 10 months and its always connected to the wall/power outlet
So if it is the motherboard, I wouldnt be too surprised but Ive know MSi to make excellent motherboards, hence the reason I spent 2500.00 on it. A fellow IT friend said I may want to try a new power supply that has the exact specs your laptop needs. As if its possible the load on the end of the power brick that goes into my laptop may be done for.
I removed the Battery and noticed this:
The inside of the laptop after removing the battery say
MS 1762
DC Rating 19V=9.5A
My Battery says (MSi battery)
11.1 Vdc = 7800mAh, 87 Wh
..But the power brick reads
Input 100-240 V ~2A 50-60Hz
Output 19.5 Volts =7.7 A
He suggested trying a new power suppy but Im concerned its the motherboard (because us IT Guys know the motherboard will get you everytime)
So is it possible? Im not sure why they may have given me the wrong power brick, if it is wrong. He says the specs dont add up, and since each time I press the button and the white light flickers and part of the keyboard, he said it may be the power bricks' node that connects to my machine. Im used to motherboards that are done for the machine shows no sighns, no hints, no flickers. This is atleast flickering, just not coming on .
I know its alot to read and I appreciate all of the techs/other users time.

Thanks guys. Your input is not falling on deaf ears and it seems im getting reputable support via the forums with the MSi tech team.
It really is so weird. Today I tried the process of elimination from a video I saw on you tube. Now, keep in mind, each time the power button is pressed with either their power brick/battery alone in the machine, the power light and the 'battery' indicator light at the front of the machine flicker (each keypress; even if you do it rapidly).
I took the bottom tray off and checked the fan and blew it out with compressed air. Checked the thermal paste under the processor heatsink, checked the processor condition and all looks well there.
Tested by removing one connection at a time then testing for power (all along while testing, keep in mind I only have the 19.5v 7.7 amp power brick.)
- removed D:/ drive secondary then checked for continuity; no luck
- removed all 4 ram sticks and tested one at a time with the power supply connected; no continuity
- removed the keyboard ribbon cable and tested; still no luck
- removed (what I believe to be) the usb ribbon cable (hub with 3.0 ports) and tested for any indicator lights; still no luck
- unplugged the cmos for 5 mins and reconnected; still no luck
*NOTE: when I look underneath of the laptop when pressing the power button, the fan that has the gpu and the cpu heatsinks up against, it actually spins for a brief second; about as long as the power button flashes.
I stopped at some stores looking for a 180+ watt adapter and i couldnt find one that carried it. I wanted to test it before purchasing, so Ive avoided online purchase up to this point. However, I do realize I need one anyway at this point regardless.
My buddy has his own PC Repair shop. He doesnt have a power brick of that magnitude, but cant we get a voltmeter and check for continuity from not only the power supply, but also the jack soldered on the motherboard?
He is saying kinda what Dark is saying... Me, I think its a short somewhere... he thinks the computer asked for too much power from the power supply and probably burnt out the tip because at the time it cut off, I was playing a graphic intensive game, and in my USB 3.0 ports on a single hub, I had the following connected:
- A Logitech USB headset (wired)
- an XBOX 360 wired controller
- A Logitech G700 gaming mouse charging
Ive never had that many power hungry devices connected to one hub at one time before.

After the new IOS for Ipad the words with friends app will not let me sign on (it says item I wish to buy is no longer available????) I uninstalled it but when I tried to install it still repeats (item you wish to buy...) Help

After downloading the new IOS for Ipad I cannot use Words for Friends from Ipad. I uninstalled it but when I try to reinstall it pops up with "item you wish to buy is no longer available".

I suggest trying the update again after an hour or two. Sometimes, the notice that an update is available comes an hour or two before the developers actually sends the revised app out to be downloaded.

How to turn off ipad if it will not let me slide to turn off

help

Perform a Reset... Try again...
Reset ( No Data will be Lost )
Press and hold the Sleep/Wake button and the Home button at the same time for at least ten seconds, until the Apple logo appears. Release the Buttons.
http://support.apple.com/kb/ht1430
If no joy...
Connect to iTunes on the computer you usually Sync with and “ Restore “...
http://support.apple.com/kb/HT1414

HT5622 Ipad 3 version 6.1.3 will not let me use iMessage or FaceTime!

"Sign in with you Apple ID..." I do and I get a message that says "Could not sign in. Please check your network conn. and try again" I can use the safari app on my ipad and browse the internet. I am able to use iMessage and FaceTime on my Iphone 4 so I'm kind of confused. I don't know how to solve this issue. I've already tried the DNS thing, time-zone thing, restore, reboot, you name it, I tried it. Does anyone else have any other suggestions? The last message I received or sent out was on Aug. 28, 2013.. I'm not sure when it stopped working but I noticed this problem last week. HELP pleaseeee!
Wi-fi Only Ipad

Trouble-shooting FaceTime
http://support.apple.com/kb/TS3367
Trouble-shooting iMessage
http://support.apple.com/kb/ts2755

IMac G3 computers still refusing to power up? Here is a solution.

This post is the sequel to the discussion "iMac G3 computers still refusing to power up? Here is what I've found out!", accessible under this link http://discussions.apple.com/thread.jspa?threadID=2326420&tstart=0 .
I made it! I have fixed the issue of the iMac DV refusing to power up.
For this, I had to design and build a prototype of a cost-effective nonresident hardware patch, which I am about to describe in this article. I will also give the instructions of use. Subsequently, I will expose the rationale, which led to the background of the design. Finally, I will report the observations after the experiment with the patch and sketch the theory of its actual operation with the PMU firmware.
*TABLE OF CONTENTS*
1. Applicability condition and restriction
2. Description of the PMU hardware patch
3. Interconnections of the PMU microcontroller with the PMU Hardware Patch
4. Instructions to read before mounting and unmounting the PMU Hardware Patch on the iMac
5. Background to the design of the PMU Hardware Patch
5.1. The genesis
5.2. What the PMU Hardware Patch actually does
6. Recommended updates before using the PMU Hardware Patch
7. User's Manual of the PMU microcontroller
8. Datasheets of the 74HC4049 Hex inverting high-to-low level shifter
9. Datasheets of the 74HC193 Presettable synchronous 4-bit binary up/down counter
10. Errata to the discussion start of February 6th, 2010
h1. 1. Applicability condition and restriction
The hardware patch addresses the issue of a slot-loading iMac, which can be powered up only within two seconds after resetting the PMU microcontroller. It is not required otherwise.
Moreover, it does not need to reside in the iMac, but suffices once to permanently cure the power-management firmware.
h1. 2. Description of the PMU hardware patch
As seen on figures 1 and 2, the PMU hardware patch relies on a low part count: two logic ICs (74HC193 and 74HC4049), two 0805-packaged resistors and two 1206-packaged capacitors, which all fit on a 31mm x 45mm single-sided SMD prototyping board. The circuit consumes a current intensity of about 7.5 milliamps for a supply voltage of 3.3 volts.
The PMU hardware patch functions as a frequency divider of the PMU sub-clock generator output, XCOUT. It applies an active low pulse to the PMU NMI_bar non-maskable input, once every sixteen XCOUT rising edge for half a period. It is disabled when the PMU main clock generator output, XOUT, returns to 0 by oscillations, or when the system is being reset with the PMU RESET_bar input asserted to 0. The peak-to-peak 1.5-Volt oscillations of XCOUT are fed through the 1-nanofarad DC-blocking capacitor to the inverter biased in the linear region by a feedback resistor of twice 270 kilo-ohms, for translation to 3.3V-compatible logic levels.
The power-supply bypass capacitor amounts to 100 nanofarads.
*Figure 1: Schematics of the PMU Hardware Patch*
[Figure 1|http://www.flickr.com/photos/aegidius_2/4923600713/in/photostream/|Click to view in a new tab.]
Note the 0.5mm-diameter insulated copper wires in ochre color on the prototype board (figure 2).
*Figure 2: Picture of the PMU Hardware Patch prototype - component side*
[Figure 2|http://www.flickr.com/photos/aegidius_2/4924196064/in/photostream/|Click to view in a new tab.]
The 10cm-long interface wires can be clamped to the board with cylinder blocks made of epoxy glue (Araldite), as seen on figure 3.
*Figure 3: Picture of the PMU Hardware Patch prototype - interface side*
[Figure 3|http://www.flickr.com/photos/aegidius_2/4924196296/in/photostream/|Click to view in a new tab.]
h1. 3. Interconnections of the PMU microcontroller with the PMU Hardware Patch
The PMU Hardware Patch uses the signals RESET_bar, NMI_bar and the clocks XOUT and XCOUT of the PMU microcontroller, U34 on the Logic Board underside. Both are supplied by the voltage available across the tantalum capacitor C131.
Pin 73 of U34 performs the function INT3_bar because it turns out to be permanently configured as an edge-sensitive interrupt input, once the PMU Hardware Patch has been used. This will be justified in section 5.2. When the computer is plugged to the mains, a pressure on any power button can induce a falling edge on pin 73. U34 responds by asserting pin 75 to logic 0, as long as the computer has to remain powered on from the PAV board.
Pin 10 of U34 is the active low reset input, RESET_bar. It toggles from logic 0 to 1, a few hundred milliseconds after U35 has detected the supply voltage across the capacitor C131 has settled above 2.2 volts, either because a good battery has been inserted in the holder, or else because the computer has been plugged to the mains and the trickle power from the PAV board, T5V, is available. It is also asserted to logic 0, as long as the PMU reset button is depressed.
Pin 9 of U34 is the sub-clock output, XCOUT. The PMU microcontroller selects it for its operation in low-power dissipation mode to carry on the timekeeping, normally as soon as the computer is being shut down. The microcontroller shall then draw no more than 40 microamps typically from the battery.
Pin 11 of U34 is the main clock output, XOUT. It is the default clock of the PMU microcontroller after the reset phase. The microcontroler selects it for its operation in high-speed mode, when the computer is powered on.
Pin 15 of U34 is the active low edge-sensitive non-maskable interrupt, NMI_bar. It is normally unused and its voltage remains pulled up to the microcontroller supply through resistor R124. However, it happens to help resolve the power-up issue when it is controlled by the PMU Hardware Patch. The justifications are exposed in section 5.2.
Figure 4 shows an easier access to the clock and control signal pins of U34, to be connected to the PMU Hardware Patch, from the top of the Logic Board. You will have to solder the PMU Hardware Patch interface wires at the locations pointed to.
*Figure 4: View of the access to the PMU U34 chip signals for the PMU Hardware Patch*
[Figure 4|http://www.flickr.com/photos/aegidius_2/4929783304/in/photostream/|Click to view in a new tab.]
h1. 4. Instructions to read before mounting and unmounting the PMU Hardware Patch on the iMac
All possible updates accessible from the links in section 6 shall be installed. Then remove the battery. All this ensures your iMac will be prepared to interact with the PMU Hardware Patch under the same initial conditions as in the experiment I have carried out.
Afterwards, remove the bottom housing, the metal shield, the SDRAM, the IDE cable and disconnect the hard-drive power cable. Take off the Logic Board together with the Down Converter board and the modem and place it on your workbench. Now carefully solder the PMU Hardware Patch interface wires at the locations pointed to in figure 4. Figure 5 illustrates the result.
Install the boards back in the iMac, reconnect the hard-drive power cable and the IDE cable, and re-insert the SDRAM in its original slot. Put the computer on a large flat and safe area near a power socket. Stand up the PMU Hardware Patch on a plastic pouch, to insulate it for the parts of the Logic Board, as seen in figure 6. Connect the keyboard and the mouse.
Once you have plugged the computer back to the mains, don't take the risk to touch the computer except the keyboard and the mouse, because quite a few visible metal parts are live and lethal by body contact!
Wait for twenty seconds and then unplug the computer from the mains. Wait for a minute. Again, supply the mains to the computer and wait for twenty seconds, before you press the power button on the keyboard. Then let the operating system load until you can see the menu bar. Maybe a window will pop up to warn you that the system date is too ancient, but you can skip it. Now shut down the computer by selecting the command in the Special menu. I know it is awkward to move the mouse pointer when the picture is upside down. But take it easy!
Unplug the computer from the mains and unmount the PMU Hardware Patch. Once you have re-assembled your iMac, you can power it up and use it without the constraint to reset the PMU each time before and then to press on a power button in a hurry within two seconds.
A good tip: get all this task cleanly done by a professional, like a repairman or an electronics technician, if you feel you don't have enough skill in soldering!
*Figure 5: View of the Patch-PMU interconnections*
[Figure 5|http://www.flickr.com/photos/aegidius_2/4929190683/in/photostream/|Click to view in a new tab.]
*Figure 6: View of the mounted PMU Hardware Patch*
[Figure 6|http://www.flickr.com/photos/aegidius_2/4929190963/in/photostream/|Click to view in a new tab.]
h1. 5. Background to the design of the PMU Hardware Patch
h2. 5.1. The genesis
My idea to the design of the PMU Hardware Patch started with the study of the user's manual of the PMU microcontroller and with my observations on the clocks XOUT and XCOUT.
The symptom of the power-up default was accompanied by the disappearance of the clocks XOUT and XCOUT, if no power button was depressed within two seconds after pushing on the PMU reset button. I concluded, it was the reason why the PMU microcontroller could no longer react to a power button signal on pin 73 (P15/D13/INT3) and perform any timekeeping until the next PMU reset.
By looking at the block diagram Figure 1.10.3 (Clock generating circuit) of the microcontroller user's manual, I noticed that any clock oscillator, XOUT and XOUT, can be re-enabled after the CM10 bit has pulsed to logic 1, provided that the SR latch is reset by the NMI_bar non-maskable interrupt line or by the RESET_bar input. If bit CM04 was set to logic 1, then XCOUT resumes the clock oscillations, and likewise for XOUT if bit CM05 was set to logic 1.
I assumed the situation CM04 = 1 and CM05 = 0, as the PMU microcontroller enters the STOP mode. My idea was then to let it avoid the STOP mode and continue operating in the low-power dissipation mode, by periodically refreshing the SR latch reset through a low pulse on the NMI_bar input. Since the 32.768-kHz oscillations on XCOUT fade within a few hundred microseconds, repeating the pulse on NMI_bar at a quicker rate, once every 488 microseconds (i.e. once every sixteen XCOUT clock period) is acceptable.
However, I could not foresee how the non-maskable interrupt routine would interfere with the PMU firmware, whenever the NMI_bar pulse would be acknowledged to let the microcontroller program counter branch to it. I know that events on edge-sensitive interrupt lines are normally latched, which allows the microcontroller state machine to detect them even if they are too short compared to the clock period. And yet, I assumed it differently, after reading this excerpt in the microcontroller user's manual in the section "Precautions for Interrupts": "Signals input to the NMI pin require an “L” level of 1 clock or more, from the operation clock of the CPU". I decided to design and build a PMU Hardware Patch, that would generate a pulse on NMI_bar for a duration of less one XCOUT clock period, actually for half of it. If it is synchronised with the appropriate edge of XCOUT, then maybe the pulse would not cause the branch to the NMI routine. Moreover, when both XOUT and XCOUT are running, the duration of the pulse from the PMU Hardware Patch would exceed the period of the XOUT clock. To avoid the risk that the pulse occurs for more than one period of XOUT, as the operation clock of the microcontroller, I designed the PMU Hardware Patch, so that it remains inactive as long as XOUT is not steadily asserted to logic 1. The PMU Hardware Patch will not either generate any low pulse during the reset phase, as long as RESET_bar is asserted to 0, and as required in the microcontroller user's manual.
Once the PMU Hardware Patch assembled, I took the risk to use it in the iMac DV. What a relief it was, whenever I turned on the computer again, without the need to press the PMU reset button each time. The PMU Hardware Patch works!
After a power cycling of one minute, without unplugging the iMac from the mains, I looked at the time and date I had initially set. The time had not advanced correctly, while the computer was turned off. Instead it was lagging: it recovered with the value I had initially entered, plus about one minute that the operating system takes to load. That means that no clock was running again, while the computer was turned off. Nonetheless I unmounted the PMU Hardware Patch and tried power cycling the computer at any time interval. Powering it on always succeeded without the need anymore to reset the PMU microcontroller before each attempt.
h2. 5.2. What the PMU Hardware Patch actually does
This means the PMU Hardware Patch had definitely interfered with the PMU firmware and cured it with respect to the power-up issue once and for all. I have figured out it interrupts the firmware through the NMI routine, which restores a few data in the non-volatile FLASH memory. These data are used to program the interrupt control register INT3IC, so that pin 73 behaves as the edge sensitive interrupt INT3_bar. This eliminates the need to have any clock running to register a request on pin 73 to power up the computer. Furthermore, when INT3_bar senses a low pulse because a power button is being pushed on, it urges the internal signal "Interrupt request level judgment" to reset the SR latch register, which re-enables any clock oscillator, as seen in figures 1.11.9 (Maskable interrupts priorities (peripheral I/O interrupts)) and 1.10.3 (Clock generating circuit). The PMU microcontroller can resume its operations and look for the source of the interruption. It finds out it has to power up the iMac, because INT3_bar had been latched in as active.
h1. 6. Recommended updates before using the PMU Hardware Patch
+Mac OS 9: Available Updates+
http://support.apple.com/kb/HT1387
+Power PC-based iMac: When to install available updates+
http://support.apple.com/kb/HT2560?viewlocale=enUS&locale=enUS
+iMac: How to Install an iMac Firmware Update+
http://support.apple.com/kb/HT2561
h1. 7. User's Manual of the PMU microcontroller
http://documentation.renesas.com/eng/products/mpumcu/62aeum.pdf
h1. 8. Datasheets of the 74HC4049 Hex inverting high-to-low level shifter
http://www.nxp.com/documents/datasheet/74HC4049CNV.pdf
http://www.st.com/stonline/products/literature/ds/1965/m74hc4049.pdf
http://www.ti.com/lit/gpn/cd74hc4049
http://www.fairchildsemi.com/ds/MM/MM74HC4049.pdf
h1. 9. Datasheets of the 74HC193 Presettable synchronous 4-bit binary up/down counter
http://www.nxp.com/documents/datasheet/74HCHCT193.pdf
http://www.ti.com/lit/gpn/cd74hc193
h1. 10. Errata to the discussion start of February 6th, 2010
1. "PRAM battery": Wrong naming! The Logic-Board battery only serves to support the timekeeping operation when the mains is removed from the computer, whereas the PRAM data are stored in the non-volatile FLASH memory of the PMU microcontroller (in slot-loading iMacs).
2. "(...) sets bit 1 of the CM1 register (system clock control register 1) to 1 (...)". This fragment shall rather read: "(...) sets bit 0 of the CM1 register (system clock control register 1) to 1 (...)".
Aegidius_2
Keep perseverance and reach your goal!

This post is the sequel to the discussion "iMac G3 computers still refusing to power up? Here is what I've found out!", accessible under this link http://discussions.apple.com/thread.jspa?threadID=2326420&tstart=0 .
I made it! I have fixed the issue of the iMac DV refusing to power up.
For this, I had to design and build a prototype of a cost-effective nonresident hardware patch, which I am about to describe in this article. I will also give the instructions of use. Subsequently, I will expose the rationale, which led to the background of the design. Finally, I will report the observations after the experiment with the patch and sketch the theory of its actual operation with the PMU firmware.
*TABLE OF CONTENTS*
1. Applicability condition and restriction
2. Description of the PMU hardware patch
3. Interconnections of the PMU microcontroller with the PMU Hardware Patch
4. Instructions to read before mounting and unmounting the PMU Hardware Patch on the iMac
5. Background to the design of the PMU Hardware Patch
5.1. The genesis
5.2. What the PMU Hardware Patch actually does
6. Recommended updates before using the PMU Hardware Patch
7. User's Manual of the PMU microcontroller
8. Datasheets of the 74HC4049 Hex inverting high-to-low level shifter
9. Datasheets of the 74HC193 Presettable synchronous 4-bit binary up/down counter
10. Errata to the discussion start of February 6th, 2010
h1. 1. Applicability condition and restriction
The hardware patch addresses the issue of a slot-loading iMac, which can be powered up only within two seconds after resetting the PMU microcontroller. It is not required otherwise.
Moreover, it does not need to reside in the iMac, but suffices once to permanently cure the power-management firmware.
h1. 2. Description of the PMU hardware patch
As seen on figures 1 and 2, the PMU hardware patch relies on a low part count: two logic ICs (74HC193 and 74HC4049), two 0805-packaged resistors and two 1206-packaged capacitors, which all fit on a 31mm x 45mm single-sided SMD prototyping board. The circuit consumes a current intensity of about 7.5 milliamps for a supply voltage of 3.3 volts.
The PMU hardware patch functions as a frequency divider of the PMU sub-clock generator output, XCOUT. It applies an active low pulse to the PMU NMI_bar non-maskable input, once every sixteen XCOUT rising edge for half a period. It is disabled when the PMU main clock generator output, XOUT, returns to 0 by oscillations, or when the system is being reset with the PMU RESET_bar input asserted to 0. The peak-to-peak 1.5-Volt oscillations of XCOUT are fed through the 1-nanofarad DC-blocking capacitor to the inverter biased in the linear region by a feedback resistor of twice 270 kilo-ohms, for translation to 3.3V-compatible logic levels.
The power-supply bypass capacitor amounts to 100 nanofarads.
*Figure 1: Schematics of the PMU Hardware Patch*
[Figure 1|http://www.flickr.com/photos/aegidius_2/4923600713/in/photostream/|Click to view in a new tab.]
Note the 0.5mm-diameter insulated copper wires in ochre color on the prototype board (figure 2).
*Figure 2: Picture of the PMU Hardware Patch prototype - component side*
[Figure 2|http://www.flickr.com/photos/aegidius_2/4924196064/in/photostream/|Click to view in a new tab.]
The 10cm-long interface wires can be clamped to the board with cylinder blocks made of epoxy glue (Araldite), as seen on figure 3.
*Figure 3: Picture of the PMU Hardware Patch prototype - interface side*
[Figure 3|http://www.flickr.com/photos/aegidius_2/4924196296/in/photostream/|Click to view in a new tab.]
h1. 3. Interconnections of the PMU microcontroller with the PMU Hardware Patch
The PMU Hardware Patch uses the signals RESET_bar, NMI_bar and the clocks XOUT and XCOUT of the PMU microcontroller, U34 on the Logic Board underside. Both are supplied by the voltage available across the tantalum capacitor C131.
Pin 73 of U34 performs the function INT3_bar because it turns out to be permanently configured as an edge-sensitive interrupt input, once the PMU Hardware Patch has been used. This will be justified in section 5.2. When the computer is plugged to the mains, a pressure on any power button can induce a falling edge on pin 73. U34 responds by asserting pin 75 to logic 0, as long as the computer has to remain powered on from the PAV board.
Pin 10 of U34 is the active low reset input, RESET_bar. It toggles from logic 0 to 1, a few hundred milliseconds after U35 has detected the supply voltage across the capacitor C131 has settled above 2.2 volts, either because a good battery has been inserted in the holder, or else because the computer has been plugged to the mains and the trickle power from the PAV board, T5V, is available. It is also asserted to logic 0, as long as the PMU reset button is depressed.
Pin 9 of U34 is the sub-clock output, XCOUT. The PMU microcontroller selects it for its operation in low-power dissipation mode to carry on the timekeeping, normally as soon as the computer is being shut down. The microcontroller shall then draw no more than 40 microamps typically from the battery.
Pin 11 of U34 is the main clock output, XOUT. It is the default clock of the PMU microcontroller after the reset phase. The microcontroler selects it for its operation in high-speed mode, when the computer is powered on.
Pin 15 of U34 is the active low edge-sensitive non-maskable interrupt, NMI_bar. It is normally unused and its voltage remains pulled up to the microcontroller supply through resistor R124. However, it happens to help resolve the power-up issue when it is controlled by the PMU Hardware Patch. The justifications are exposed in section 5.2.
Figure 4 shows an easier access to the clock and control signal pins of U34, to be connected to the PMU Hardware Patch, from the top of the Logic Board. You will have to solder the PMU Hardware Patch interface wires at the locations pointed to.
*Figure 4: View of the access to the PMU U34 chip signals for the PMU Hardware Patch*
[Figure 4|http://www.flickr.com/photos/aegidius_2/4929783304/in/photostream/|Click to view in a new tab.]
h1. 4. Instructions to read before mounting and unmounting the PMU Hardware Patch on the iMac
All possible updates accessible from the links in section 6 shall be installed. Then remove the battery. All this ensures your iMac will be prepared to interact with the PMU Hardware Patch under the same initial conditions as in the experiment I have carried out.
Afterwards, remove the bottom housing, the metal shield, the SDRAM, the IDE cable and disconnect the hard-drive power cable. Take off the Logic Board together with the Down Converter board and the modem and place it on your workbench. Now carefully solder the PMU Hardware Patch interface wires at the locations pointed to in figure 4. Figure 5 illustrates the result.
Install the boards back in the iMac, reconnect the hard-drive power cable and the IDE cable, and re-insert the SDRAM in its original slot. Put the computer on a large flat and safe area near a power socket. Stand up the PMU Hardware Patch on a plastic pouch, to insulate it for the parts of the Logic Board, as seen in figure 6. Connect the keyboard and the mouse.
Once you have plugged the computer back to the mains, don't take the risk to touch the computer except the keyboard and the mouse, because quite a few visible metal parts are live and lethal by body contact!
Wait for twenty seconds and then unplug the computer from the mains. Wait for a minute. Again, supply the mains to the computer and wait for twenty seconds, before you press the power button on the keyboard. Then let the operating system load until you can see the menu bar. Maybe a window will pop up to warn you that the system date is too ancient, but you can skip it. Now shut down the computer by selecting the command in the Special menu. I know it is awkward to move the mouse pointer when the picture is upside down. But take it easy!
Unplug the computer from the mains and unmount the PMU Hardware Patch. Once you have re-assembled your iMac, you can power it up and use it without the constraint to reset the PMU each time before and then to press on a power button in a hurry within two seconds.
A good tip: get all this task cleanly done by a professional, like a repairman or an electronics technician, if you feel you don't have enough skill in soldering!
*Figure 5: View of the Patch-PMU interconnections*
[Figure 5|http://www.flickr.com/photos/aegidius_2/4929190683/in/photostream/|Click to view in a new tab.]
*Figure 6: View of the mounted PMU Hardware Patch*
[Figure 6|http://www.flickr.com/photos/aegidius_2/4929190963/in/photostream/|Click to view in a new tab.]
h1. 5. Background to the design of the PMU Hardware Patch
h2. 5.1. The genesis
My idea to the design of the PMU Hardware Patch started with the study of the user's manual of the PMU microcontroller and with my observations on the clocks XOUT and XCOUT.
The symptom of the power-up default was accompanied by the disappearance of the clocks XOUT and XCOUT, if no power button was depressed within two seconds after pushing on the PMU reset button. I concluded, it was the reason why the PMU microcontroller could no longer react to a power button signal on pin 73 (P15/D13/INT3) and perform any timekeeping until the next PMU reset.
By looking at the block diagram Figure 1.10.3 (Clock generating circuit) of the microcontroller user's manual, I noticed that any clock oscillator, XOUT and XOUT, can be re-enabled after the CM10 bit has pulsed to logic 1, provided that the SR latch is reset by the NMI_bar non-maskable interrupt line or by the RESET_bar input. If bit CM04 was set to logic 1, then XCOUT resumes the clock oscillations, and likewise for XOUT if bit CM05 was set to logic 1.
I assumed the situation CM04 = 1 and CM05 = 0, as the PMU microcontroller enters the STOP mode. My idea was then to let it avoid the STOP mode and continue operating in the low-power dissipation mode, by periodically refreshing the SR latch reset through a low pulse on the NMI_bar input. Since the 32.768-kHz oscillations on XCOUT fade within a few hundred microseconds, repeating the pulse on NMI_bar at a quicker rate, once every 488 microseconds (i.e. once every sixteen XCOUT clock period) is acceptable.
However, I could not foresee how the non-maskable interrupt routine would interfere with the PMU firmware, whenever the NMI_bar pulse would be acknowledged to let the microcontroller program counter branch to it. I know that events on edge-sensitive interrupt lines are normally latched, which allows the microcontroller state machine to detect them even if they are too short compared to the clock period. And yet, I assumed it differently, after reading this excerpt in the microcontroller user's manual in the section "Precautions for Interrupts": "Signals input to the NMI pin require an “L” level of 1 clock or more, from the operation clock of the CPU". I decided to design and build a PMU Hardware Patch, that would generate a pulse on NMI_bar for a duration of less one XCOUT clock period, actually for half of it. If it is synchronised with the appropriate edge of XCOUT, then maybe the pulse would not cause the branch to the NMI routine. Moreover, when both XOUT and XCOUT are running, the duration of the pulse from the PMU Hardware Patch would exceed the period of the XOUT clock. To avoid the risk that the pulse occurs for more than one period of XOUT, as the operation clock of the microcontroller, I designed the PMU Hardware Patch, so that it remains inactive as long as XOUT is not steadily asserted to logic 1. The PMU Hardware Patch will not either generate any low pulse during the reset phase, as long as RESET_bar is asserted to 0, and as required in the microcontroller user's manual.
Once the PMU Hardware Patch assembled, I took the risk to use it in the iMac DV. What a relief it was, whenever I turned on the computer again, without the need to press the PMU reset button each time. The PMU Hardware Patch works!
After a power cycling of one minute, without unplugging the iMac from the mains, I looked at the time and date I had initially set. The time had not advanced correctly, while the computer was turned off. Instead it was lagging: it recovered with the value I had initially entered, plus about one minute that the operating system takes to load. That means that no clock was running again, while the computer was turned off. Nonetheless I unmounted the PMU Hardware Patch and tried power cycling the computer at any time interval. Powering it on always succeeded without the need anymore to reset the PMU microcontroller before each attempt.
h2. 5.2. What the PMU Hardware Patch actually does
This means the PMU Hardware Patch had definitely interfered with the PMU firmware and cured it with respect to the power-up issue once and for all. I have figured out it interrupts the firmware through the NMI routine, which restores a few data in the non-volatile FLASH memory. These data are used to program the interrupt control register INT3IC, so that pin 73 behaves as the edge sensitive interrupt INT3_bar. This eliminates the need to have any clock running to register a request on pin 73 to power up the computer. Furthermore, when INT3_bar senses a low pulse because a power button is being pushed on, it urges the internal signal "Interrupt request level judgment" to reset the SR latch register, which re-enables any clock oscillator, as seen in figures 1.11.9 (Maskable interrupts priorities (peripheral I/O interrupts)) and 1.10.3 (Clock generating circuit). The PMU microcontroller can resume its operations and look for the source of the interruption. It finds out it has to power up the iMac, because INT3_bar had been latched in as active.
h1. 6. Recommended updates before using the PMU Hardware Patch
+Mac OS 9: Available Updates+
http://support.apple.com/kb/HT1387
+Power PC-based iMac: When to install available updates+
http://support.apple.com/kb/HT2560?viewlocale=enUS&locale=enUS
+iMac: How to Install an iMac Firmware Update+
http://support.apple.com/kb/HT2561
h1. 7. User's Manual of the PMU microcontroller
http://documentation.renesas.com/eng/products/mpumcu/62aeum.pdf
h1. 8. Datasheets of the 74HC4049 Hex inverting high-to-low level shifter
http://www.nxp.com/documents/datasheet/74HC4049CNV.pdf
http://www.st.com/stonline/products/literature/ds/1965/m74hc4049.pdf
http://www.ti.com/lit/gpn/cd74hc4049
http://www.fairchildsemi.com/ds/MM/MM74HC4049.pdf
h1. 9. Datasheets of the 74HC193 Presettable synchronous 4-bit binary up/down counter
http://www.nxp.com/documents/datasheet/74HCHCT193.pdf
http://www.ti.com/lit/gpn/cd74hc193
h1. 10. Errata to the discussion start of February 6th, 2010
1. "PRAM battery": Wrong naming! The Logic-Board battery only serves to support the timekeeping operation when the mains is removed from the computer, whereas the PRAM data are stored in the non-volatile FLASH memory of the PMU microcontroller (in slot-loading iMacs).
2. "(...) sets bit 1 of the CM1 register (system clock control register 1) to 1 (...)". This fragment shall rather read: "(...) sets bit 0 of the CM1 register (system clock control register 1) to 1 (...)".
Aegidius_2
Keep perseverance and reach your goal!

TS3274 My ipad still refuses to power off will not let me slide

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