Using external clock on sbRIO 9606

I'm trying to use LTC2170 ADC with sbRIO 9606. The ADC chip has serial data outputs, a frame start output and a data clock output. How can I use the frame start and data clock outputs of the ADC in LabVIEW to read serial data bits from the ADC? The shifting in of the serial data should start with the frame start output of the ADC and each bit should be shifted in with the data clock output of the ADC.
Attachments:
21721014fb.pdf ‏1520 KB

http://zone.ni.com/reference/en-XX/help/371599D-01/lvfpgaconcepts/external_clocks/

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How can I use external clock to implement a delay?

Hi all,
I am testing to use external clock to drive dev/PFI0 (on device 6711) which is used as the clock for the analog ouput. I have thinking two applications by using the external clock but I don't have much idea on the implementation yet.
First of all, I have a sequence of data (array) with each sample being sent at the interval of 1us. I use an external clock (10MHz) driving the PFI0 so it is pretty easy to achieve that goal. I am thinking what happen if I want each sampel being sent at different time. For example, if I have 5 samples, I want the first one sent 1us after the task start and wait 2us to send the 2nd sample, wait 5us to send the 3rd sample and wait 11 us to send the 4th sample, and wait 1us to send the last sample. Is it possible to achieve that based on the external clock?
Second question is about the delay. My code require ciritcal timing and the builtin delay doesn't behave very well because I am running in windows. I can increase the priority of the vi to highest, it helps a bit but still not perfect. I am thinking if it is possible to implement hardward delay based on the external clock. Any idea?

Hello dragondriver,
To answer your first question, yes you could send data in that fashion. You would have to programmatically build a pulse train and use that to trigger the sending of data. The answer to the second question is essentially the same. You should be able to programmatically build a pulse train with a delay and use it as trigger to begin whatever operation you have.
Jonathan L.
Applications Engineer
National Instruments

Want to use external clock for SCTL on myRIO

Hi people,
I'm trying to find a way to get a 2.5 MSPS 16-bit ADC, TI ADS1602, to send data to the myRIO device. Ideally, I want to record bits at 40 MHz in order to get the benefit of the full 2.5 MSPS. I know that I can create an 80 MHz SCTL on the FPGA to create a 40 MHz clock, but when I checked this clock signal on an oscilloscope it was obviously significantly degraded by slew rate limitations, so it looked more like a sine wave than a square wave. I doubt that it would work to use this signal as a clock to drive the ADC, since the ADC's specifications say the allowable jitter is around 100ps.
I can use an external oscillator to drive the ADC, but then I have to find a way to sync that clock with the 40MHz FPGA clock. Is there any kind of PLL structure that would allow me to sync the myRIO FPGA clock to an external clock? Is there a way to make a single cycle timed loop be driven by an external clock? Or if I was able to customize the FPGA personality to accept an SPI signal of up to 40 MHz (ten times the officially supported limit...), would it be ok to use an FPGA loop running at ~160 MHz and tell it to sample the SPI line each loop and proceed from there?
Thanks!
Solved!
Go to Solution.

Hi 3.14159... ,
The myRIO does not have the ability to import a clock to use on the FPGA Block Diagram to clock single-cycle timed loops (SCTLs). The new sbRIO-9651 that just released at NI Week (not shipping yet) is the only sbRIO that has the ability to import an external clock into LabVIEW. Several of our FlexRIO products also have this ability.
As you alluded to, you can sample the signal at twice the frequency (or possibly more) to and wait until an edge trigger to execute a certain piece of logic. If you open the Example Finder and navigate to Hardware Input and Output » R Series » FPGA Fundamentals » Triggers and Watchdog » Trigger Detection this gives a simple example of doing that. Again, since you are wanting to sample at 10x the supported frequency, all bets are off but it may be worth a try.
Tannerite
National Instruments

Using external clock on a 6062E DAQ card

In my application I need to use an external clock (2 MHZ) to sample 10 channels at 40 KHz each. I connected the external clock to PFI_7/Startscan, enabled the ND_IN_CHANNEL_CLOCK_TIMEBASE and ND_IN_SCAN_CLOCK_TIMEBASE using The Select_signal function. If I use only two channels (instead of 10) everything works fine. If I try to increase the number of channels to more than 2 I get a digitized waveform with points missing (one every 2). I tried to decrease the sampling rate to 4 KHz per channel, but the problem persisted. For 2 channels everything is always fine, but for more than 2 I get the same error in the digitization pattern.
The relevant lines of my codes are attached
Thank you for your help
Enrico Gratt
on
Attachments:
Sample_code.pas ‏3 KB

Enrico,
I have a couple of questions. Do you see the same amount of missing data regardless of how many channels (more than 2) you are acquiring? If you use the internal 20 MHz timebase, can you successfully acquire all 10 channels at 40 kHz?
Spencer S.

Can I acquire waveform at faster sampling rate using external clock?

I am trying to acquire waveform at a sampling rate of 1MHz. My 6036E card is maxed out at 200KHz. Is there a way to achieve a sampling rate of 1MHz using an external sample clock? Your PFI pin can take external clock as an AI sample clock, right?

Hi,
I remember I asked the similar question before in the NI forum, they reply me:
the max sample rate (scan/s/channel) cannot be greater than your board max sample rate, even you use external scan clcok. So the answer is no for your case.

Use external clock (PFI2) with Traditional DAQ

Can figure out how to specify the external clock line (PFI2) while using Traditional DAQ (7.4.2f3).
Can anyone help? TIA.
George
George Zou
http://webspace.webring.com/people/og/gtoolbox

I never used such a configuration but I found an example that will probably be helpful for your problem: it's named SCANsingleBufExtScan and you will find it in samples\daq\ai folder on your hard disk.
Proud to use LW/CVI from 3.1 on.
My contributions to the Developer Zone Community
If I have helped you, why not giving me a kudos?

Using External Clock to write counter value to buffer

Using CTR mode config which input controls at what frequency the counter value gets written to the buffer? How do I set it up so the counter value is written to the buffer at the same time Anologue inputs are written to a buffer, without using the other counter.

Hello,
Could you please explain what type of counter operation are you interested in doing? That would help me in suggesting something.
But if I roughly understand what you are saying here, you can use a same clock to provide as scan clock for analog input and then use that clock for the counter. But depending on what counter operation you are trying to do will decide whether that clock be provided as source or Gate.
You may take a look at examples provided at the following location too :
Measurement Hardware
Sincerely
Sastry V
Applications Engineer
National Instruments

External clocking on 6711 card

Hi all,
I just read the manual of the card PCI6711, it supports the external clock. So does it mean we can change the update rate by using different external clock rate?

chris88 wrote:
HI dragondriver
They are both correct, the PCI 6711 supports external clocking for the analog output tasks, but for Digital I/O tasks the timing can only be set to software timed, meaning that you cannot use external clock for digital tasks.
The main difference between RTSI and PFI is the physical connection, PFI lines conects through the connector block you are using and the RTSI is connected through a RTSI bus cable used to synchronize several DAQ cards.
You can choose any PFI <0 to 9> and this article show how to select which PFI line is the source of sampling.
Regards
Thanks for the clarification . I only one doubt. Someone told me that 6711 only supports software-based digital pulse input/output but it supports external-clock-driving counter output. So when you said softwarebased digital I/O task, do you mean all digitals output including counter output? Thanks.

5641R External Clock

Recently we have met with an issue when using external sampling clock on 5641R. When we use 5641R Internal,everything is O.K. Signal we get is stable. But when we use External Clock (The “Clock In “ is connected to the Sine signal generated by Pxie5652,10dBm). Abnormal phenomena: The amplitude is not stable within the acquisition time. Settings: Ni 5640R configure Timebase.vi: CDC Clock Source=SMB External Ni 5640R ADC Configue NCO.vi: Previously Configured Clock Frequency= Sine signal generated by Pxie5652.
Would you please tell me how to solve it?

Hello,
I would like to ask you a few questions and suggestions about your setup.
1) You have mentioned that you are using NI 5640R Configure Timebase.VI, Using this the clock that you bring in can only be used to PLL (Reference Clock). In order to use the CLK IN as an external sample clock, you will have to program in LabVIEW FPGA, based on the help documentation below:
2) If you are programming in LabVIEW FPGA, would you mind uploading your code, so I can take a look at it?
3) What is the clock frequency, you are importing?
Best Regards,
Jignesh P
Applications Engineer

How I can measure frequency of TTL signal without external clock?

Hello,
I want to measure frequency of TTL signal using PXI-6254 or PXI-6713, without using external clock.
Frequency will be up to 100kHz. How I can use internal counter of 20MHz or 80MHz?

Hi Yuta K,
You have not stated what software you want to use for this measurement, but in case you're using LabVIEW, please go to the Example Finder (in LabVIEW go to "Help >> Find Examples").
In the Example Finder, you make sure the "Browse" tab is stil selected, and than you go to:
Hardware Input and Output >> DAQmx >> Counter Measurements >> Digital Frequency
Here you will find some good examples of measuring a digital frequency with 1 or 2 onboard counters.
If you need additional information, please let us know!
Best regards,
Peter S

How do I use a quadrature encoder as an external clock (PCI 6229)

Hello, ( a similar post has been placed on DAQ forum apologies as I did not know best place)
I have a PCI 6229 M Series data acquisition card. I want to use a quadrature encoder to be the external clock driving the acquisition of a number of signals. I have set up reading 24 signals each time a clock pulse is received using the DAQ assistant and set my external clock to pin pfi8 (I think) this is then connected to an encoder output. This works well enough until the encoder is run too fast when it appears I am either missing pulses or getting bounce.
How can I set up to clock using a quadrature encoder? I have seen a number of questions on this forum regarding quadrature encoders and reverse counting but not on using them as an external clock.
Basically I want to have the stability and "bounceless" nature of using two outputs from a quadrature encoder whilst still using an external clock. Is this just a case of configuring controls to certain pfi's? If so how is it done?
Any help or pointers would be helpful. So far I have managed very nicely by simply using the DAQ assistant and the interface it has would suggest that if configured for a certain pfi pin I could actually still use it.
Thanks in advance.
Kevin

Hi,
Well I've had alook into this for you and I'm not quite sure I understand what you are looking for.
Is it possible for you to phone back in to support?
The reason you are seeing bounce at high speeds, or indeed loss of points, is due to the sampling rate that you have set up.
What you will find is that the trigger will start an aquisition of a number of points at a certain rate. If your sampling rate is too low then you will not finish that sample batch before the next set of samples is recorded.
It is possible to use an external clock into a trigger or digital line, however this will limit the number of samples you can take to the speed of your encoder.
If you increase your sampling rates, and then configure a start trigger from a single input from the encoder you will be able to record a number of samples after a rising/falling edge. (Set the clock as an internal clock)
Hope this helps
AdamB
Applications Engineering Team Leader | National Instruments | UK & Ireland

Is it possible to read digital data using an external clock (PCI-6259 M)?

I’m using a NI PCI-6259 M Series card and trying to write my program in VC++6.0 using the functions in the DAQmx driver.
Question1: Not all functions listed in the NI-DAQmx C Reference Help seems to be supported by my NI-card, where can I find information about which of the functions that are supported?
Question2: I want to read data from a device that clock out data on the falling edge of a clock signal. The clock signal and the data signal are routed to two DIO terminals on the NI-card. The question is if it is possible to read data using the clock as a sample clock? See two code examples below that doesn’t work. In both cases 10 samples are read at once, even if the external clock is not present.
Example 1
// Create tasks
Status = DAQmxCreateTask("", &m_ReadTrimTask);
// Set up read task
status = DAQmxCreateDIChan(m_ReadTrimTask, "Dev1/port2/line0", "", DAQmx_Val_ChanPerLine);
status = DAQmxCfgChangeDetectionTiming(m_ReadTrimTask,"Dev1/port2/line6","Dev1/port2/line6",DAQmx_Val_FiniteSamps, 10);
// Read data
int32 sampsPerChanRead, numBytesPerSamp;
status = DAQmxReadDigitalLines(m_ReadTrimTask, 10, 10.0, DAQmx_Val_GroupByChannel, result, 10, &sampsPerChanRead, &numBytesPerSamp ,NULL);
Example 2
// Create tasks
Status = DAQmxCreateTask("", &m_ReadTrimTask);
// Set up read task
status = DAQmxCreateDIChan(m_ReadTrimTask, "Dev1/port2/line0", "", DAQmx_Val_ChanPerLine);
status = DAQmxSetSampTimingType(m_ReadTrimTask, DAQmx_Val_SampClk);
status = DAQmxSetSampClkRate(m_ReadTrimTask, 1000.0);
status = DAQmxSetSampClkActiveEdge(m_ReadTrimTask, DAQmx_Val_Falling);
status = DAQmxSetSampClkSrc(m_ReadTrimTask, " Dev1/port2/line6");
// Read data
int32 sampsPerChanRead, numBytesPerSamp;
status = DAQmxReadDigitalLines(m_ReadTrimTask, 10, 10.0, DAQmx_Val_GroupByChannel, result, 10, &sampsPerChanRead, &numBytesPerSamp ,NULL);

Hello Magnus,
Thank you for contacting National Instruments.
"Question1: Not all functions listed in the NI-DAQmx C Reference Help seems to be supported by my NI-card, where can I find information about which of the functions that are supported?"
The best place to look for this information would be the M Series Help Manual. There you can find the features of your PCI-6259 and what operations it supports.
"Question2: I want to read data from a device that clock out data on the falling edge of a clock signal. The clock signal and the data signal are routed to two DIO terminals on the NI-card. The question is if it is possible to read data using the clock as a sample clock? See two code examples below that doesn’t work. In both cases 10 samples are read at once, even if the external clock is not present."
Look at the "ContReadDigChan-ExtClk_Fn.c" example project which ships with the NI-DAQ driver. This is located at: C:\Program Files\National Instruments\NI-DAQ\Examples\DAQmx ANSI C\Digital\Read Values\Cont Read Dig Chan-Ext Clk.
You will have to make some minor modifications to convert this to a finite acquisition, but that is simply a matter of changing the "sampleMode" parameter of the DAQmxCfgSampClkTiming() function. You will also have to route your clock signal to a PFI line and specify which line in your code.
I hope this helps.
Sean C.
Applications Engineering
National Instruments

NI 5772, using clk_in as an external clock

Hi.
I'm using NI 5772R with NI PXIe-7966R NI FlexRIO FPGA Module.
I'm trying to sample the signal with external clock (CLK_IN). An example file 'Clock Select (FPGA).vi' is successfully compiled. However when running 'Clock Select (host).vi', the data doesn't seem to be sampled with CLK_IN signal even if I choose the clock source as 'External Clock'. Actually externally clocked data is the same as internally clocked data.
So I wonder if this is because the signal plugged into 'CLK_IN' has wrong range. The frequency range of my CLK_IN signal is 80~160MHz, while the specification of NI5772 says the CLK_IN input range is 400-800MHz. Would it be a problem?
Also, My clock signal is sinusoidal, rather than TTL. Does the CLK_IN need to be TTL?
Thanks for your help.

Yes the output impedance of the amplifer is designed 50 ohms, so that is not an issue ...
We have hooked it up to a function generator, and gotten it to work at 500 MHz even at the lower voltages.
After unplugging the function generator, then plugging in our external clock, it will run, by the signal is corrupted at several points.
The long period duty cycle of the clock is only about 60% (i.e. there is a log period where no clock signal is sent)
I think the issue may also have to do with the clock phase, which is not unform. The NI 5772 uses a Texas Instruments ADC . Reading the manual for tha part, it seems like the clock requirements are pretty tight, as it is expecting a very low jitter clock signal
Another group we work with has a digitizer made by another company that apparently solves this issue by routing the clock though a VCO, which somehow stablizes the clock. However, after some consultation we are not convinced that is the real solution either, because the clock is supposed to be somewhat unstable in the first place, which is the issue we are trying to correct for (we are trying to avoid having to resample the data in software)

How to use an external clock to acquire analog data?

I need to acquire dta using an external clock which has a variable frequency (in a small range). I am using a PCMCIA 6062 board. Does it accept external clok?

The 6062 can acquire data based on an external clock. If you are programming in LabVIEW, take a look at the shipping example called Cont Acq&Graph ExtScanClk.vi. If you are using C or VB, there are examples in the NI-DAQ/Examples folder.
Regards,
Brent Runnels
Applications Engineer
National Instruments

Using an external Clock with NI 6585

I have an interface board connected to a TI ADS6444 Evaluation board (QUAD serializer ADC), in turn plugged into my NI 6585/PXI-7954R, see the Project Screen shot. I can acquire data using internal clock but now I want to switch to an external clock. First I want to get the external clock working then do the unserializing. I am quite new to LabVIEW FPGA.
I get a variety of errors such as " The Read method for IO Module\DDCA_Data_Rd_Rise is used in a clock domain that does not support it. The supported clock domain is "IO Module Clock 0". To change the frequency of the supported clock domain, launch the properties dialog for the CLIP item in the LabVIEW project and choose the "Clock Selections" page." I have tried to configure the clock to fixed and variable frequencies, see clock properties screen shot.
Thanks in advance.
LeMur Technology Services, LLC
President
[email protected]
Toll Free: 877-761-2916
Cell: 609-577-2628
Fax: 215-862-9816
Attachments:
Project screen shot.jpg ‏164 KB
clock properties screen shot.jpg ‏77 KB

Update
Opened a service request. for this problem. Talked it over with NI engineer and thought the problem was because I disn't have the latest and greatest software versions e.g. RIO and LabVIEW. Compiled a blank VI using the DDC connector and comilied successfully. No matter what I do if I do a FPGA I/O Node call to DDCA_Data_RD_RISE (or fall) I get the error: "The Read method for IO Module\DDCA_Data_Rd_Fall is used in a clock domain that does not support it. The supported clock domain is "IO Module Clock 0". To change the frequency of the supported clock domain, launch the properties dialog for the CLIP item in the LabVIEW project and choose the "Clock Selections" page."
For grins I wired the FPGA I/O node Expected I/O module ID to the FIFO input and read a number (7488[HEX]).
Begining to suspect the NI 6585 CLIP has a bug?
LeMur Technology Services, LLC
President
[email protected]
Toll Free: 877-761-2916
Cell: 609-577-2628
Fax: 215-862-9816

Using external clock on sbRIO 9606

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