DIFFICULTY PROGRAMMING CUSTOM BOARD WITH VIVADO

Question

Hey Xilinx gurus,
I’ve been having difficulty programming a custom board with Vivado. I am using the XC7A50T-FGG484 Artix device in my design. I am also using the S25FL128SAGMFI003 Spansion flash memory chip. I first tried to program the Artix FPGA directly, then tried to program the FPGA using the flash memory. Neither of these have been successful and I need some help. I have scoured the user guides and forums with little success.
Here are some warnings/errors that I run into when programming (I included the entire TCL console script below):
WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Byte 15370 does not match (FF != 00)
ERROR: [Labtools 27-3161] Flash Programming Unsuccessful
ERROR: [Common 17-39] 'program_hw_cfgmem' failed due to earlier errors.
Thank you in advance for your time and direction, it is much appreciated!
Best,
Ralph
ENTIRE TCL CONSOLE SCRIPT:
start_gui
open_project C:/Vivado/imu3artix/imu3frequency/imu3frequency.xpr
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2015.1/data/ip'.
open_project: Time (s): cpu = 00:00:21 ; elapsed = 00:00:20 . Memory (MB): peak = 704.227 ; gain = 92.195
open_hw
****** Webtalk v2015.1 (64-bit)
**** SW Build 1215546 on Mon Apr 27 19:22:08 MDT 2015
**** IP Build 1209967 on Tue Apr 21 11:39:20 MDT 2015
   ** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
source C:/Vivado/imu3artix/imu3frequency/imu3frequency.hw/webtalk/labtool_webtalk.tcl -notrace
webtalk_transmit: Time (s): cpu = 00:00:00 ; elapsed = 00:00:15 . Memory (MB): peak = 66.770 ; gain = 0.023
   while executing
"webtalk_transmit -clientid 3767299429 -regid "210956146_0_0_059" -xml C:/Vivado/imu3artix/imu3frequency/imu3frequency.hw/webtalk/usage_statistics_ext_..."
   (file "C:/Vivado/imu3artix/imu3frequency/imu3frequency.hw/webtalk/labtool_webtalk.tcl" line 28)
INFO: [Common 17-206] Exiting Webtalk at Thu Aug 06 11:42:27 2015...
connect_hw_server -url localhost:3121
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
current_hw_target [get_hw_targets */xilinx_tcf/Xilinx/0000177f243b01]
set_property PARAM.FREQUENCY 1500000 [get_hw_targets */xilinx_tcf/Xilinx/0000177f243b01]
open_hw_target
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Xilinx/0000177f243b01
set_property PROGRAM.FILE {C:/Vivado/imu3artix/imu3frequency/imu3frequency.runs/impl_1/IMU3.bit} [lindex [get_hw_devices] 0]
current_hw_device [lindex [get_hw_devices] 0]
refresh_hw_device -update_hw_probes false [lindex [get_hw_devices] 0]
INFO: [Labtools 27-1435] Device xc7a50t (JTAG device index = 0) is not programmed (DONE status = 0).
set_property PROBES.FILE {} [lindex [get_hw_devices] 0]
set_property PROGRAM.FILE {C:/Vivado/imu3artix/imu3frequency/imu3frequency.runs/impl_1/IMU3.bit} [lindex [get_hw_devices] 0]
program_hw_devices [lindex [get_hw_devices] 0]
INFO: [Labtools 27-3164] End of startup status: HIGH
program_hw_devices: Time (s): cpu = 00:00:24 ; elapsed = 00:00:24 . Memory (MB): peak = 741.168 ; gain = 0.000
refresh_hw_device [lindex [get_hw_devices] 0]
INFO: [Labtools 27-1434] Device xc7a50t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution:
Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
create_hw_cfgmem -hw_device [lindex [get_hw_devices] 0] -mem_dev [lindex [get_cfgmem_parts {s25fl128sxxxxxx0-spi-x1_x2_x4}] 0]
set_property PROGRAM.BLANK_CHECK 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
set_property PROGRAM.ERASE 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
set_property PROGRAM.CFG_PROGRAM 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
set_property PROGRAM.VERIFY 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
refresh_hw_device [lindex [get_hw_devices] 0]
INFO: [Labtools 27-1434] Device xc7a50t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution:
Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
set_property PROGRAM.ADDRESS_RANGE {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
set_property PROGRAM.FILES [list "C:/Vivado/imu3artix/imu3frequency/imu3frequency.runs/impl_1/IMU3.bin" ] [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0]]
set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
set_property PROGRAM.BLANK_CHECK 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
set_property PROGRAM.ERASE 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
set_property PROGRAM.CFG_PROGRAM 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
set_property PROGRAM.VERIFY 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
startgroup
if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE [lindex [get_hw_devices] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]]]] } { create_hw_bitstream -hw_device [lindex [get_hw_devices] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices] 0]]; program_hw_devices [lindex [get_hw_devices] 0]; };
INFO: [Labtools 27-3164] End of startup status: HIGH
program_hw_devices: Time (s): cpu = 00:00:05 ; elapsed = 00:00:05 . Memory (MB): peak = 784.484 ; gain = 0.000
program_hw_cfgmem -hw_cfgmem [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]
Mfg ID : 1   Memory Type : 20   Memory Capacity : 18   Device ID 1 : 0   Device ID 2 : 0
Performing Erase Operation...
Erase Operation successful.
Performing Program and Verify Operations...
Program/Verify Operation failed.
Byte 15370 does not match (FF != 00)
ERROR: [Labtools 27-3161] Flash Programming Unsuccessful
program_hw_cfgmem: Time (s): cpu = 00:00:00 ; elapsed = 00:00:21 . Memory (MB): peak = 784.484 ; gain = 0.000
ERROR: [Common 17-39] 'program_hw_cfgmem' failed due to earlier errors.

Answer 1

 This indicates your device got programed. those warnings can be safely ignored.
INFO: [Labtools 27-1434] Device xc7a50t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution:
Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
Manually launch hw_server with -e "set xsdb-user-bscan <C_USER_SCAN_CHAIN scan_chain_number>" to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
FPGA is getting programmed but flash got problems while programming. Let me see if I could get anything from log