Jitter of output digital waveform with external clock
Hi,
I need to generate digital waveform with 20 bits pattern * 1000 times. Digital waveform must be sync with 1 MHz external clock.
It is not big deal.
But there is additional requirement that digital waveform has jitter < 200 ps. It can be delayed for couple ns but it must be very stable.
Can anyone point me on that parameter? Or share your expirience?
Thanks!
Hi Andrei,
Tph on figure 3 is defined as tp - 2.2ns as we discussed earlier. The data jitter, along with channel to channel skew, is already taken into account. We don't specifically spec the data jitter since we have made this calculate for you. It is safe to say that the data jitter involved in tph is less than 200 ps however this is not a standard spec we provide.
As for additional board recommendations, what is your application? The 6562 is designed for LVDS applications. The 655x series is highly recommended for high speed TTL based applications. If you reference the 655x manual you will notice similar or better specifications in regards to setup and hold times, which again already take into account data jitter and skew.
I am curious as to why you would like the specific values documented. We provide the current specifications so that you do not have to use the individual statistics to calculate numerics such as the setup and hold times. Is there something specific you are trying to do here? You mentioned a simple example earlier, what is your actual application?
Regards,
Chris Behnke
Sr. RF Engineer
High Frequency Measurements
Similar Messages
-
Reading digital port with external clock at maximum speed
I have a PCI-6509. I am programming a fast loop to read 32 bits values from the digital input using an external clock ( injected into one of the card pin inputs )
The environment is Windows2000 + Visual C++ .
basically I am doing
DAQmxErrChk (DAQmxCreateTask("",&taskHandle));
DAQmxErrChk (DAQmxCreateDIChan(taskHandle,"Dev1/port0:3","",DAQmx_Val_ChanForAllLines));
DAQmxErrChk (DAQmxSetSampTimingType(taskHandle,DAQmx_Val_ChangeDetection));
DAQmxErrChk (DAQmxCfgChangeDetectionTiming (taskHandle,"/Dev1/port5/line4:4", NULL, DAQmx_Val_FiniteSamps , sampsRequested));
DAQmxErrChk (DAQmxStartTask(taskHandle));
getSystemTime...
DAQmxErrChk (DAQmxReadDigitalU32(taskHandle,-1,-1,DAQmx_Val_GroupByChannel,data,sampsRequested,&sampsRead,NULL));
getSystemTime...
I pass a data buffer big enought to hold the number of samples I am requesting ( for example 10000 of uInt32 ).
It works fine. I get my values but the speed I get is only around 10 KHz.
I print the system time before and after the call to DAQmxReadDigitalU32 as you can see from the above code.
This makes no sense because my external clock in ,"/Dev1/port5/line4:4" (as selected on the ChangeDetectionTiming call) runs at 2.0 MHz.
Could someone tell me what parameters I have to pass to this sequence of NI DAQ functions calls in order to really read at the speed of my external clock?
many thanks in advance,
Roberto AButer.
Note :
I am going desperate with the web pages, documentation , online helps and the pletora of products and so on.
I did pay to NI a considerable amount of money for the card , the labview software etc and I just want to do the simplest 20 lines C program to read my digital signal at the speed is being injected. Should that be that difficult????Hello caca,
the board you are using is specified as a static IO board. That means it was not constructed to do highspeed DIO operations.
You cannot use a hardware clock to time your input and output
operations, so you have to use a software timing or, as you chose, the
change detection interrupt. But the maximum speed you can archieve
doing this, is somewhat limited of course.
Check this thread for some more information.
Ingo Schumacher
Systems Engineer Sound&VibrationNational Instruments Germany -
DIO Pattern with external clock
I use Pattern Input with external clock, I only wire external clock to REQ pin, I see how frecuency vary, but I do not receive data but the one that was latched last time, Do I need to wire something else in order to receive correct and continuos data? I think I just need a singnal to get data latched every time I require trought external clock. What do I have to do to get my application running?
It sounds as though you are using a NI-653X data acquisition board to perform Pattern Input. When performing Pattern Input, data is transferred upon the rising or falling edge (user configurable) of each clock pulse. This clock signal can be externally provided or internally generated. To use an external clock signal of up to 20MHz, simply connect the signal to the REQ pin as you are doing.
I recommend trying a LabVIEW shipping example already set up to do pattern input. The particular example I am thinking of gives you the option to try either an internal clock or provide an external clock. I would recommend trying each option. I do not know which version of LabVIEW you have but will provide the path to the example in LabVIEW 7; the path is very simi
lar in earlier versions of LabVIEW:
Help >> Find Examples >> Hardware Input and Output >> DAQ >> Digital Input and Output >> 653x >> Cont Pattern Input.vi
I hope this helps!
Sonya -
Driving DO lines with external clock wired to PFI lines
Hi all,
I have few issues understanding how to use hardware timing resources in M series USB6229, with particular focus on DO. I have read last couple of day all google offered on the subject but I am still straggling with some basic tasks. To cut the story short, the 1e6 dollar question: can I set up 7 independent DO lines where (different tasks or virtual channels) where lines use same hardware timing source (eg, freqout or CO0 set to ~10kHz sampling time routed to PFI0).
Note: the reason I need 7 independent lines and not a port output (which would be obvious solution) is because I need to have (vastly) different number of samples and for each line.
Follow up question regarding timing: As I understood, any of PFI ports could be used and a input to the external clock which could be used to drive DO line(s) samples. I have tried to generate one DO, eg. P0\line4 by using CO0 to generate 10kHz sample rate. The signal on the line4 is pulse with frequency of few Hz which I routed to PF6 (with actual wire) in hope to use this signal as a clock for line5. I tried this but I am receiving errors about "resources in use"
Possible reason(s):
Specified route cannot be satisfied, because it requires resources that are currently in use by another route.
Property: SampClk.Src
Property: SampClk.ActiveEdge
Source Device: USB-6229
Source Terminal: PFI6
Required Resources in Use by
Task Name: _unnamedTask<7B>
Source Device: USB-6229
Source Terminal: PFI4
Destination Device: USB-6229
Destination Terminal: do/SampleClock
Task Name: _unnamedTask<79>
Apparently, many of internal clocks are routed internally to different PFI lines which mean the lines are occupied resource, and I do not know how to solve this.
I wanted to ask you does this principle sound as something that should work and if you know about some examples that would be excellent.
Any help would be greatly appreciated.
Cheers, Nenad> To cut the story short, the 1e6 dollar question: can I set up 7 independent DO lines where (different tasks or virtual channels) where lines use same hardware timing source (eg, freqout or CO0 set to ~10kHz sampling time routed to PFI0).
No, you can't. The USB-6229 has a single digital output FIFO which can only be used by one task at a time.
> Note: the reason I need 7 independent lines and not a port output (which would be obvious solution) is because I need to have (vastly) different number of samples and for each line.
It should be possible to generate all seven signals with a single task by generating a waveform that includes all seven signals. If the signals repeat at different rates or you need to start/stop them independently, you will have to disable regeneration and continuously generate new waveform segments on the fly. Continuous Write Digital Port - External Clock - Non Regeneration should be a good starting point for the DAQmx programming, but actually generating the data is likely to be the challenging part.
Brad
Brad Keryan
NI R&D -
Single Pulse Width with External Clock
I am trying to setup a 6602 counter for a single (non-buffered) pulse width measurement with an external clock. Under normal testing, the unit under test will provide the pulses, I need to measure the number of pulses during different time periods (1, 60, and 300 seconds). I want to do a pulse width measurement and I'll supply the gate signal pulse to the counter for the specific time needed.
Under normal operation, the unit under test is wired into the counter's source and the pulse is wired into the gate. For testing purposes I am using a BNC-2121. I have the counter's source wired to the Adjustable Square Wave Output and the gate wired to the Trigger output.
Here is my C++ code. I am getting a timeout error on the read and I don't know why. Any help would be appreciated.
//Create Task
DAQmxCreateTask( "task1", taskHandle );
//Create Pulse Width Channel
DAQmxCreateCIPulseWidthChan( taskHandle, // TaskHandle
szCtrName.c_str(), // Counter Name
"", // Channel Name
dMin, // Min Value
dMax, // Max Value
DAQmx_Val_Ticks, // Units
DAQmx_Val_Rising, // Gate Edge
"" ); // Scale Name
//Set the Pulse Width Terminal to the gate signal
DAQmxSetCIPulseWidthTerm( taskHandle, // TaskHandle
"", // Channel
"/CTR2/PFI38" ); // Terminal
//Set the Timebase Src to the counter's source
DAQmxSetCICtrTimebaseSrc( taskHandle, // TaskHandle
"", // Channel
"/CTR2/PFI39" ); // Terminal
//Start Task
DAQmxStartTask( taskHandle );
//***Send pulse to gate counter***
//Read Counter
DAQmxReadCounterU32( taskHandle, // Task Handle
DAQmx_Val_Auto, // Num Samps to Read
10, // Timeout
ulBuffer, // Read Buffer
1000, // Buffer Size
&lSampsRead, // Num Samps Read
NULL ); // ReservedI've setup a pulse width task in NI-MAX using the onboard clock and everything worked fine, so I know the hardware is working.
My unit under test is providing the pulses (from gyros) I need to measure. The pulses indicate the position of the unit so there are X, Y and Z axis gyros. I need to measure these pulses for specific periods of time (1, 60, and 300 seconds). For example during the 1 second measurement, the X and Y gyros should measure zero pulses and the Z axis should measure 515 gyros. During a 300 second measurement the X and Y gyros should measure < 60 and the Z axis should measure 30800.
So the gyro pulses are wired to the counter input and I am using a DIO channel from NI-6508 to provide the gate pulse. The gate signal will be high for either 1, 60, or 300 seconds depending on the test. The gyro pulses are essentially the external clock to the counter. I want to count the gyro pulses during the pulse of the gate (DIO).
To simplify the setup, I connected to BNC-2121 directly to the card. I have the adjustable clock output going to the counter input of ctr0 and the trigger signal going to the gate of ctr0. Once the task has been started and before the read ( I had a breakpoint set in the code), I would press the trigger button on the BNC-2121 and hold for approx. 1 second. I then execute the Read statement, and I always get a timeout. From my experience working with NI, I'm guessing I don't have a channel property set correctly, but its not obvious to me and I can't find an example to do exactly what I'm trying to do.
The CTR2 designation in the code was the object name of the card. I have two 6602 cards in my chassis. I was using ctr0 of the second counter card, so PFI38/39 was correct.
Again, any help would be appreciated. -
Configure digital filter for external clock
I am trying to use a digital filter on my PXI-6602 card and I can't get it to configure for an external clock. It keeps telling me the numbers don't match up but I don't see the logic to the numbers it supports. Here is the error I got for a time base of 100 Hz and a min pulse width of 1/(100 / 2) based on the period of 2 clock cycles.
Desired Minimum Pulse Width could not be produced.
Minimum Pulse Width is affected by the Digital Filter Timebase Source and the Digital Filter Timebase Rate. To see how these two property settings can affect the Minimum Pulse Width, refer to product documentation for more details.
Property: CI.CountEdges.DigFltr.TimebaseSrc
Requested Value: /PXI1Slot2/PFI36
Property: CI.CountEdges.DigFltr.TimebaseRate
Requested Value: 100.000000
Property: CI.CountEdges.DigFltr.MinPulseWidth
Requested Value: 20.0e-3
Supported Values: 80.0e-3 to 171.798692e6
Task Name: _unnamedTask<49>
I know my math is off since the filter uses the leading edge of the pulse but 0.08 seconds is 12.5 Hz and I don't get it. Other frequencies produce different but also odd (to me) numbers.
Attached is a copy of my VI
Attachments:
External Clock for Filter.jpg 131 KBDigital filtering ensures that a high pulse is high for at least a certain time (minimum pulse width) in microseconds. This is to ensure that a fluke noise signal does not count as a high pulse. It also ensures that a voltage overshoot to the high value does not register more than one high pulse as it settles in to the value.
The specifications of the digital filtering is outline on page 3-1 to 3-3 of the 660x User Manual, found here. It specifies on page 3-3 that there are five different settings for the digital filter minimum pulse width:
5 µs
1 µs
500 ns
100 ns
Or, programmable with a custom tfltrclk (period in seconds of Filter Clock). However, when using tfltrclk, minimum pulse width needs to equal to 2*tfltrclk. Your current setup has the minimum pulse width set up for minimum pulse width = 1/(tfltrclck/2) = 2/tfltrclck rather that 2*tflrclk.
I think you already knew all of this. However, the Filter Clock does not equal the Filter Clock Timebase.
If we look on page 3-3 in the manual we seed that Filter clock is actually 1/4th the speed of the Filter Clock Timebase.
Therefore, in your setup:
Filter Timebase Rate = 100Hz
Filter Clock Rate= 1/4th *100 Hz = 25Hz
Filter Clock Period = 1/25Hz = 0.04 seconds
2*Filter Clock Period = Minimum Pulse Width = 2*0.04=0.08 seconds.
Which is the minimum value it was suggesting. This will always be four times as large as what you were guessing before.
Eric S.
AE Specialist | Global Support
National Instruments -
Trouble outputting digital waveform to single line
i want to output to a single digital line a digital pulse. my current attempt is to generate a digital waveform and then provide this as data to a digital line output. the vi runs, and the waveform appears as i want, but the digital line doesn't output anything? any help would be greatly appreciated!
Attachments:
digital pulse out.vi 32 KBHi
In reference to my previous post, you can just leave the inner for-loop, but you have to extract the 4 channels.
Just have a look at the picture.
Hope this helps.
Thomas
Using LV8.0
Don't be afraid to rate a good answer...
Attachments:
DigitalWaveform.png 6 KB -
Ni5640R sync with external clock
Hi,
I have a highly stable 10MHz sine source, and I need to phase-lock NI5640R's internal 200MHz generator to it.
I don't really understand half of the parameters in "Config Timebase". Any advice on how to do this?As I understand it, in:
CDC Clock Source tab:
* Clock Source = VCXO, since I need not external clock, but internal oscillator locked on external signal
VCXO tab:
* VCXO Control = PLL, since VCXO frequency will be controlled by external clock via PLL
* VCXO Enable = ON, obviously
Reference tab:
* RTSI Ext Ref Enable = OFF
* SMB Ext Ref Enable = ON, since this is the external signal source
* Clk100 Ref Enable = OFF
* RTSI(7) Direction = OFF, don't know what it is, but doesn't seem relevant
PLL tab:
* Ref Delay = 0ps, I only care about phase stability at the moment, so delay is not relevant
* VCXO Delay = 0ps, same here
* Ref Divider = 10, this divides 10MHz external reference to get 1MHz
* VCXO Divider = 200, this divides 200MHz internal generator to get 1MHz, then both 1MHz freq's are synchronized
* CP Current = 2.5mA, but I have no idea what this does
* CP Enable = NO, no idea
* CP Invert = NO, no idea
* PFD Pulse Width = 1500ps, (CDC7005 datasheet states, that PFD pulse is something that improves spurious suppression) I have no idea how wide the PFD pulse should be, I guess it depends on external source quality
* Lock Detect Window = 1.2ns, as I understand it, PLL is considered locked when rising edge of controlled signal of is in this window, so smaller window means less jitter
Routing tab:
* PLL Feedback Channel = Y2, this is by default, I don't know if this should be touched. This is also a bit confusing, since the choice is between [Y0, Y1, Y2, Y3, Y4, Y3, Y3, Y3]. I wonder how these Y3's are different?
* Y0 (ADC0) Division = divide by 2, Y0 Enable = YES, I see no need to modify this
* Y1 (ADC1) Division = divide by 2, Y1 Enable = YES, same here
* Y2 (DAC0) Division = divide by 2, Y2 Enable = YES, same here
* Y3 (DAC1) Division = divide by 2, Y3 Enable = YES, same here
* Y4 (RTSI Ref) Division = divide by 2, Y4 Enable = YES, same here
Misc tab:
* OPA Enable = FALSE, OPA is a enable/disable control for amplifier. I'm not really sure about what it does and if this is even connected in NI5640R, default is off
* Enable Ext Ref R = FALSE, may be something related to what I need, by default it is off
* Hold = FALSE, as I understand, when this is enabled, PLL tries to maintain lock when missing reference cycle, probably may be used for clock extraction from serial data stream. for this application it's not necessary
* NPD = TRUE, according to CDC7005 datasheet, NPD is asynchronous power down, and should be held high
* NRESET = TRUE, asynchronous reset signal, should be held high
* Bandgap Enable = TRUE, not sure what bandgap is, and I don't think it's relevant
External tab:
* HW NPD = TRUE, should be hardware power down
* HW NRESET = TRUE, hardware reset -
How to get Digital waveform with Time.
Hi
I have 3 channels , each of which have ON/ OFF cycles specified with milliseconds as shown below.
Channel 1 OFF(3000) ON(2000) OFF(1000) ON(500) OFF(4000) ON(300)
The number in the bracket is the time in milliseconds for which the channel has to be ON or OFF.
Channel 2 OFF(800) ON(1000) OFF(6000) ON(2000) OFF(5000) ON(400)
Channel 3 OFF(1000) ON(700) OFF(500) ON(800) OFF(400) ON(600)
So i need a digital waveform plot with Y axis showing the highs and lows for the channel and X- Axis showing the time in milliseconds.
All the channels can be plotted in one graph or separate graphs.
I tried plotting with each OFF as False and ON as TRUE and built a boolean array. then converted to digital. but was not able to get the time (X-axis ) correctly. Is there any way to get Time on X axis for the Digital channel.
Thank you .Regards. Hema.Hi Dennis,
I have done the same way as you suggested.but the sample rate is common to all the channels.( that is each channel is one boolean array column in the 2D boolean array which is fed to the Digital function , but i need separate sample rate for each channel(1-D array).
The Boolean array to digital takes 2D array as input, so i was not able to get different Time on X-axis.
But i found out a solution( very long method) by building time array separately and plotting the waveform without using sample rate.
Now i want to get rid of the '1' and '0' which gets displayed on the digital waveform by default . That is for every high there is number 1 shown and every low number 0 is shown on the graph. Please can I know how to remove this number display.
I saw digital waveform example too, but on all digital waveform, the numbers are shown. Is there any property to be set to disable 1 and zero display.
Thank you. -
Hiow to build digital waveform with transition values bigger U32?
Greetings!
Is that possible to build digital data with transitions values represented bigger than U32 values? (It seems to me that Labview 8.0 cannot accept U64. See attachment.)
What do you recommend? I cannot change dt, so scaling does not work. This is because, the record length could be very long...and the waveform should be connected to a digital waveform graph.
Thanks in advance!
Attachments:
ReplaceTransitionValues.jpg 21 KBHello Dawid,
Thank you for the answer.
Yes, I'd like to build a big array, which although would not be so big... I have not so many samples (just a few thousands) but the samples could be very far from each other. That's why I need U64.
I'm using compressed digital waveform to transport and display the samples, where the transition value functions as an offset (counted in dt) from the first sample.
For example, to store a 1Hz signal with sampling rate 100MHz the transitions will accumulate by 50M. If the record has 1000 samples then the last transition value will reach 50G which is much bigger than a U32 can store.
You might ask why so high the sampling rate for a 1Hz signal... The signal is stochastic, could be faster, and I would like to keep tha fast pulses also.
I dig into the "Append digital samples.vi" (see attachment) and I found the transition array is build by U32... I hope I did not misunderstand you, but I think it does not help. I suspect even the Digital Waveform Graph itself is not able to accept values over the U32 range, however, I should try that.
Best Regards,
Lamaze
Attachments:
AppendSamples.jpg 155 KB -
How to avoid dependance between output digital port with a PCI 1200 daq card?
Hello,
I don't manage to fix the state of a line on one port (PA0 for ex) without change the state of another line of another digital port (PB0 for ex)
I use a PCI 1200 Daq card with Labview 5.0.1 (under Windows 98)
How to configure a robust state (high logic level) on a line of a port??
Does anybody have an idea on this problem?
Thanks a lot in advance and happy new year to the community
JF LAVEZARDjflab a écrit:
Hello,
I don't manage to fix the state of a line on one port (PA0 for ex) without change the state of another line of another digital port (PB0 for ex)
I use a PCI 1200 Daq card with Labview 5.0.1 (under Windows 98)
How to configure a robust state (high logic level) on a line of a port??
Does anybody have an idea on this problem?
Thanks a lot in advance and happy new year to the community
JF LAVEZARD
Hello,
I've found the problem
The PCI1200 has a chip 8255 for Digital I/O
If I use the bad VI, it reconfigures the port and all the lines go in a low logic state
so I'd to write only on the port or the line without reconfigure the port
So the good VI in the palett is: Port Write and not Digital Port write!
See attached file..
Thanks
Best Regards
Attachments:
port_dio.jpg 771 KB -
hello everybody
first of all: i'm working with m-series card pci 6259 and measurement studio c++.
i want to output digital waveforms to sixteen digital outputs.
the waveform buffer should contain at least 720 points.
the frequency at which the output should be changed is varying between 24kHz and 120kHz.
when one waveform buffer is done, it must be recalculated, frequency adjusted and output again, and so on...
in the data sheet of my card i read about waveform characteristics of port 0. but i can't find any
documentation about this anywhere.
so can anyone help me with this problem?
regards
markusThe standard installation of NI-DAQmx puts an item into the Start menu: Start->National Instruments->NI-DAQ->NI-DAQmx C Reference Help.
Look under C Functions->Channel Configuration/Creation->Create Digital Output Channels, and Write Functions, various DAQmxWriteDigital... functions.
Look in the NI-DAQmx Concepts section for various kinds of information about digital output.
Look for the C-language examples under Program Files\National Instruments\NI-DAQ\Examples\DAQmx ANSI C\.
John Weeks
WaveMetrics, Inc.
Phone (503) 620-3001
Fax (503) 620-6754
www.wavemetrics.com -
External clocking proble with NI-DAQ 6534 after driver upgrade
Hello newsgroup,
I've got a Problem with a pattern generation using the NI-DAQ 6534.
I'm using it in 32 Bit Output mode with external clocking.
After changing the PC and the OS from a P II 333 Mhz running Win98
to a P 4 1,8 GHz running WinXP Pro the use of new drivers was nessasary,
because the old driver doesen't work at all. The following problem occurs
by using actual driver: Using my old programm external clocking doesen't
work anymore, but internal clocking works fine. I'm using C++ not Labview.
I'm not shure if this is the right newsgroup for my problem. If not please
give me a hint were it belongs to.
Regards
MichaelMichael:
What version of NI DAQ did you have? What version did you upgrade to? Is your 6534 a PCI board or is it an AT/ISA based device? Have you changed your code at all? You code should be fully compatible with a new version of NI-DAQ... Please provide more exact details of the problem so I can help futher. Are you getting errors or is it just not working?
Sincerely,
Brooks B
Applications Engineer
National Instruments -
Processor 2.6 Bus 800 shows at XP with 200 External Clock
Hi ,
I have a Pentium4 2.6MHZBus 800, 256MB DDR Bus 400, MotherBoard MSI 865PE Neo2,HD MAXTOR 80G ,VGA GeoForce 4 8X G.Ward 128MB DDR
I upgrade the bios version to the latest 1.9 the i run "LOAD HIGHST PREFORMANCE
But : at the windows XP with SP1 i found the software with read the system configuration ..reading my processor with External clock "200"
Does it show the right ?
OR should it be shown As "800"
By the way the OverClocking on the setup is disabled
Can i use overclocking here? to what range?
Advice please
Thanks in AdvaceHi Wonkanoby,
Im little bit confuse , how can I get the optimum performace of FSB 800 of my processor ? Below is my CPU-Z report and my Computer Specs
Intel P4 2.6Ghz HT @ 2.9Ghz
MSI 865PE Neo2
Geforce FX5200 128MB DDR
80Gig Seagate 7200RPM and 40 Gig Seagate 5400RPM see-through (modified)
GENERIC 256MB DDR400 memory
Pixel View TV tuner
D-Link Internal Modem
Cooler Master AERO CPU Cooler running at 3900RPM
5 X Cooler Master Fan Casing
HEC Power Supply 350Watts
3.3V = 28Amps / 5.0V = 33Amps / 12.0V = 15Amps
MSI CD-RW 52x32x52
ASUS 16X DVD
Win2000 SP3
CPU-Z Report
CPU-Z version 1.20a.
CPU(s)
Number of CPUs 2 (1 Physical)
CPU#1 APIC ID = 0
CPU Name Intel Pentium 4
Code Name Northwood
Specification Intel(R) Pentium(R) 4 CPU 2.60GHz
Family / Model / Stepping F 2 9
Extended Family / Model 0 0
Brand ID 9
Technology 0.13 µ
Supported Instructions Sets MMX, SSE, SSE2
CPU Clock Speed 2925.0 MHz
Clock multiplier x 13.0
Front Side Bus Frequency 225.0 MHz
Bus Speed 900.0 MHz
L1 Data Cache 8 KBytes, 4-way set associative, 64 Bytes line size
L1 Trace Cache 12 Kµops, 8-way set associative
L2 Cache 512 KBytes, 8-way set associative, 64 Bytes line size
L2 Speed 2925.0 MHz (Full)
L2 Location On Chip
L2 Data Prefetch Logic yes
L2 Bus Width 256 bits
CPU#2 APIC ID = 1
CPU Name Intel Pentium 4 (logical unit)
Mainboard and chipset
Motherboard manufacturer MICRO-STAR INC.
Motherboard model MS-6728, 100
BIOS vendor American Megatrends Inc.
BIOS revision V1.7
BIOS release date 10/06/2003
Chipset Intel i865P/PE/G/i848P rev. A2
Southbridge Intel 82801EB (ICH5) rev. 2
Sensor chip Winbond W83627HF
FSB Select 533 MHz
Performance Mode enabled
AGP Status enabled, rev. 3.0
AGP Data Transfert Rate 8x
AGP Side Band Addressing supported, enabled
AGP Aperture Size 128 MBytes
Memory
DRAM Type DDR-SDRAM
DRAM Size 256 MBytes
DRAM Frequency 225.0 MHz
FSB:DRAM 1:1
CAS# Latency 2.5 clocks
RAS# to CAS# 3 clocks
RAS# Precharge 3 clocks
Cycle Time (TRAS) 6 clocks
# of memory modules 1
Module 0 DDR-SDRAM PC3200 - 256 MBytes
Software
Windows version Microsoft Windows 2000 Workstation Service Pack 3 (Build 2195) -
Using external clock on a 6062E DAQ card
In my application I need to use an external clock (2 MHZ) to sample 10 channels at 40 KHz each. I connected the external clock to PFI_7/Startscan, enabled the ND_IN_CHANNEL_CLOCK_TIMEBASE and ND_IN_SCAN_CLOCK_TIMEBASE using The Select_signal function. If I use only two channels (instead of 10) everything works fine. If I try to increase the number of channels to more than 2 I get a digitized waveform with points missing (one every 2). I tried to decrease the sampling rate to 4 KHz per channel, but the problem persisted. For 2 channels everything is always fine, but for more than 2 I get the same error in the digitization pattern.
The relevant lines of my codes are attached
Thank you for your help
Enrico Gratt
on
Attachments:
Sample_code.pas 3 KBEnrico,
I have a couple of questions. Do you see the same amount of missing data regardless of how many channels (more than 2) you are acquiring? If you use the internal 20 MHz timebase, can you successfully acquire all 10 channels at 40 kHz?
Spencer S.
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How Can I detect Underlined Words from a paragraph
I have an application where I have to detect underlined and strikethrough words from a paragraph. I am using Labview 7 Express. Can someone suggest a possible solution ? Thanks in Advance
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Is there a way to do group editing in logic similar to how you can in pro tools? Im trying to allign a drum session Ive done with the the grid but want to be able to keep overhead and cymbol channels in phase with the snare etc. Im aware I could high