Configuration data download to FPGA was not successful.

Question

I have designed a board with the Spartan 6 LX9 TQFP144 Package.
I am able to load a bitstream to the device with the digilent HS-2. However the fpga can not selfconfigure from
the attached SPI Flash.
Here is the console output from iMPACT:
GUI --- Auto connect to cable...
INFO:iMPACT - Digilent Plugin: Plugin Version: 2.4.4
INFO:iMPACT - Digilent Plugin: found 1 device(s).
INFO:iMPACT - Digilent Plugin: opening device: "JtagHs2", SN:210249983579
INFO:iMPACT - Digilent Plugin: User Name: JtagHs2
INFO:iMPACT - Digilent Plugin: Product Name: Digilent JTAG-HS2
INFO:iMPACT - Digilent Plugin: Serial Number: 210249983579
INFO:iMPACT - Digilent Plugin: Product ID: 30900152
INFO:iMPACT - Digilent Plugin: Firmware Version: 0109
INFO:iMPACT - Digilent Plugin: JTAG Port Number: 0
INFO:iMPACT - Digilent Plugin: JTAG Clock Frequency: 10000000 Hz
Attempting to identify devices in the boundary-scan chain configuration...
INFO:iMPACT - Current time: 27.07.2015 16:19:26
PROGRESS_START - Starting Operation.
Identifying chain contents...'0': : Manufacturer's ID = Xilinx xc6slx9, Version : 2
INFO:iMPACT:1777 -
Reading C:/Xilinx/ISE/14.7/ISE_DS/ISE/spartan6/data/xc6slx9.bsd...
INFO:iMPACT:501 - '1': Added Device xc6slx9 successfully.
done.
PROGRESS_END - End Operation.
Elapsed time =      0 sec.
Selected part: N25Q128
Unprotect sectors: FALSE
INFO:iMPACT - Current time: 27.07.2015 16:20:19
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 25000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': SPI access core not detected. SPI access core will be downloaded to the device to enable operations.
INFO:iMPACT - Downloading core file C:/Xilinx/ISE/14.7/ISE_DS/ISE/spartan6/data/xc6slx9_spi.cor.
'1': Downloading core...
 LCK_cycle = NoWait.
LCK cycle: NoWait
done.
'1': Reading status register contents...
INFO:iMPACT:2219 - Status register values:
INFO:iMPACT - 0011 1100 1110 1100
INFO:iMPACT:2492 - '1': Completed downloading core to device.
'1': IDCODE is '20ba18' (in hex).
'1': ID Check passed.
 '1': IDCODE is '20ba18' (in hex).
'1': ID Check passed.
 '1': Erasing Device.
'1': Using Sector Erase.
'1': Programming Flash.
'1': Reading device contents...
done.
'1': Verification completed.
'1':Programming in x4 mode.
'1': Configuration data download to FPGA was not successful. DONE did not go high, please check your configuration setup and mode settings.
INFO:iMPACT - '1': Flash was not programmed successfully.
PROGRESS_END - End Operation.
Elapsed time =     78 sec.
If i read that correctly Data was written to the Flash but the fpga was not able to configure from that data.
Done-pin is connected to 3.3V via a 470 Ohms Resisor.
The Flash is a N25Q128A13ESE40G, Datasheet here: http://www.farnell.com/datasheets/1674445.pdf
I can perform a readback, checksum and an erase.
If i do a read device status this is the console output:
INFO:iMPACT - Current time: 27.07.2015 16:36:27
Maximum TCK operating frequency for this device chain: 25000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': IDCODE is '20ba18' (in hex).
'1': ID Check passed.
 '1': IDCODE is '20ba18' (in hex).
'1': ID Check passed.
 '1': IDCODE is '20ba18' (in hex).
'1': ID Check passed.
 INFO:iMPACT - '1': Reloading FPGA configuration data stored in flash...
INFO:iMPACT:182 - done.
On the Flash side I have pulled s# and Hold up to 3.3V with 100k Resistors.
Can someone help me to find the problem?

Answer 1

So does the FPGA try to read the SPI flash when it boots ?
out with scope, probe the clock and the data , see if you can see it streamig out when you boot.
If so, then one other thing I see wrong a few times is data path of the SPI, single bit or 4 bits of data.
    you have to make certain the bit file was created in the same width as the fgpa is expecting,
      In ISE I think its in Impact where you make the SPI flash file and specify this .