Counter operations in PXI 6722
Hi,
What I want to do :
My application requires generating an analog output, after some time the DUT responds with a pulse of 1.5ms duration. I need to find the time between the point where I genrate the AO and the point where I get the pulse.
What I am planning to do :
I plan to start a counter at the moment I start the AO, the input pulse to counter would be a pulse train from an external clock or another counter output. I would like to stop the counter using the pulse from the DUT by connecting it to the GATE terminal. The idea is derived from the example vi, Count Digital Events-Pause Trig.vi. Based on the number of counts and the pulse train frequency, the time can be measured.
Problems Faced and queries:
1. I tried to test the idea by generating a continuous pulse train from counter_0 and feeding it to the source of counter_1 and use the above example to count the pulses. Here I can only pause the count using the gate input. How do I stop the counting and get the count value using the Pause trigger property?
2. If I want to use the internal clock base instead of using another counter, how should I enable this?
3. Is there any other option to measure the time I need?
4. When Iam using the generate finite pulse train vi in counter_0 and connecting it to Counter_1 source. Using the count digital event, I try to count the events. Error is generated with a reason that there is a hardware conflict. Can I not use different counters in the same card for generating a finite pulse train and counting them on the other counter input?
Regards
Gopal
Hi Gopal,
Thank you for posting to the NI forums. You can use a digital start trigger and a reference trigger to get the functionality that you need. There is a nice Knowledge Base article on this exact issue. The link is below.
How Do I Use a Digital Trigger in LabVIEW to Start and Stop Acquiring Data?
Using the information in this KB, as well as the info in the related links, you should be application to program your application in LabVIEW, but please post back if you have further questions.
Ed W.
Applications Engineer
National Instruments
Similar Messages
-
Hi,
I am trying to use two counter from the same card in paralle. I have attahed the VI here. I used the example VI to generate finite pulses to prepare my VI. Iam using PXI-6722 hardware.
Can this operation be done? How to avoid the conflict?
Regards
Gopal
Attachments:
Parallel Counter operation.vi 34 KBHello Gopal,
You are receiving this error because you need both counters on the device to perform a finite pulse train generation task. You can see this Knowledgebase for more information about the problem.
Matt Anderson
Hardware Services Marketing Manager
National Instruments -
Hi ALL,
I have a car table with the following attribute sale_code,model_car etc
the format of sale_code is year/number exemple when a client buy a car(model_car=mercedes) her code is 2012/0125.
I want to calculate the number of cars that were sold in the year of 2011 grouped by the model_car attribute.
select count (sale_code),model_car
from car
where sale_code like '2011%'
when I tested this querry i received an error.
My question is :
how to resolve the issue when we use an attribute in where and we use the same attribute in count operation ?
Thank you in advance.No Error, right?
with data(salecode, model_car) as
select '2010-01', 'BMW Z8' from dual union all
select '2011-01', 'BMW Z8' from dual union all
select '2011-02', 'BMW Z8' from dual union all
select '2011-03', 'Merc' from dual union all
select '2011-03', 'Merc' from dual
select count(salecode), model_car
from data
where salecode like '2011%'
group by model_car;
COUNT(SALECODE) MODEL_CAR
2 Merc
2 BMW Z8
2 rows selectedPlease follow the Sticky Thread by BluShadow on the Top of Threads list and provide the necessary information to get quick solution.
Regards,
P. -
What are the counter channels on PXIe-6361 pin-out diagram
Hello,
I defined three counters channels using DAQ assistant for the PXIe-6361 board (ctr0, ctr1, ctr2). I did not see explicit labels on the pin-out diagram for the PXIe-6361 card that indicate where these counters are. Can anyone point me out what are the pins / labels on the pin-out diagram for these counters?
Thanks much
Solved!
Go to Solution.Hi Larrage,
The best way to find the default pins is using the DAQmx Help file. You can reach this in MAX by clicking on Help>>Help Topics>>NI-DAQmx>>NI-DAQmx Help. In the help file, you can search for "Connecting Counter Signals" and select the link for the series card you have (X Series in this case).
In your case, the default counter output terminals for ctr0, ctr1, and ctr2 would be PFI 12, PFI 13, and PFI 14, respectively. The counter inputs (for counting edges) would be PFI 8, PFI 3, and PFI 0 for the same counters. You can change the input/output terminals for counters in your VI or MAX, but these are the defaults for the card.
Zach P.
Product Support Engineer | LabVIEW R&D | National Instruments -
Hello,
I have a question on how the implicit timing on a frequency input works. I am inputting a straight frequency into a counter input on a cDaq unit. I set it up using the 20Mhz Timebase. and counter 0, However If for example I input a 10Khz frequency and read data from the read counter vi every 10ms I would expect to see 10,000 * .010 samples or ~100 samples per read right? I am only seeing about 10 samples per read though. Am I not figuring something right? I am setting up the sample clock as implicit using parameters (continuous, 200000 buffer size).You should read the section in the 917x User Manual entitled Choosing a Method for Measuring Frequency. In summary:
The one counter method loses accuracy as frequency increases.
The two counter (large range) method is the same as the one counter method but it takes the measurement over N consecutive periods which allows you to increase accuracy at the expense of measurement time. To get a reasonable accuracy at high frequencies however would require your low frequency measurements to take a very long time.
The two counter (high frequency) method loses accuracy as frequency decreases.
The sample clocked method has good accuracy at all frequency ranges and maintains consistent measurement time.
The sample clocked method should be the obvious choice for measuring a large range of input signals. However, it comes with the caveat that your input signal must be faster than the sample clock or you will receive an error and have to restart the task (which might not even be an issue depending on synchronization requirements). You'll probably end up using a second counter to generate the sample clock.
Best Regards,
John Passiak -
Using PXI 6251 counter to delay a trigger on PXI
Hi at all,
I need to synchronize some devices on an PXI chassis. Basic operation is a user waveform generation on a PXI5401 that routes the Trigger Signal for the generation to one of the PXI (RTSI) lines. I'd like to use this trigger signal to start a counter on a PXI 6251 counting the PXI 10MHz Clock. No problem so far ( at least none that I see What I need is a possibilty to set another sync signal as soon as a certain counter value is reached in order to use this signal as a delayed trigger signal. Is it possible? And how? I've taken a look at the LabVIEW Example finder, but haven't found an example yet...
Thanks!
Oli
P.S. Using LabVIEW 7.1.1, NIDAQ7.4 and a PXI 1042 via MXI4
Programming languages don't create bad code, programmers create bad code....Nathan,
Thanks for your excellent solution. I'm ordering the Aux100 cable (9-Pin DIN to two BNC Female) to export the trigger signal from the PXI to the Device_2. I will test the program (Echo_Mode_PXI_5122.vi) to be sure it will be suitable for my application.
Another problem, when my system is working on ultrasound Pulse-echo mode (Pulse_Echo_Mode_PXI_5122.vi), the input trigger must be set a delayed trigger acquisition (by setting the trigger delay to, for example 3µs) to remove the signal of power source. Could you please tell me how I can configure the digitizer in this case?
Regards,
John C.
Attachments:
Echo_Mode_PXI_5122.vi 49 KB
Pulse_Echo_Mode_PXI_5122.vi 49 KB -
How can i find out the resolution and accuracy of PXI-6602 module?
I have a 32 bit 8 channel PXI-6602 counter module. PXI card is interfaced to PC with MXI-4 link. How can i find out the resolution and accuracy of this system.What is the maximum accuracy and resolution i will get from this system. Because optical signal to cmos conversion signal is given as a input to the counter.
Hi chandhu,
Were you referring to the accuracy of the count register or the timing clock?
PXI-6602 specifications can be found in the NI 660x Specifications. The resolution of the count register is, as you’ve noted, 32 bits. This corresponds to a maximum count value of 4,294,967,295. As long as all of the edges are in accordance with TTL specifications, the accuracy of the count register is 100%.
On the other hand, the PXI-6602 baseclock accuracy takes on the baseclock accuracy of the PXI CLK 10 signal. Again, this is all found in the specifications.
You may also want to check out the NI 660x User Manual – it contains a lot of details on the operation of these counter/timer devices.
I hope this helps. Please post back if you have further questions.
Ed W.
Applications Engineer
National Instruments -
X Series is here – New Counter Features!
Hey All,
The new X Series Multifunction DAQ devices have been announced – check them out here.
I’m posting here because I think X Series has several new counter features that many on this forum have been looking for. The user manual
will have all of these details and more with timing diagrams but I
thought I’d summarize a few of the sexier features and open it up for
comments/feedback.
First off – what stayed the same between
M Series/TIO counters and X series counters? The pinouts between M and
X series are the same so the PFI lines and default counter pinouts are
the same. The DAQmx programming is the same (you’ll need DAQmx 9.0, it
should be up this afternoon) and all the functionality that was
supported by M Series is supported by X Series, though a few behaviors
may have changed. Counters are still 32 bit.
Now on to
the fun stuff – the big one that I tend to overlook: X Series has 4
counters per board! They all have the same features and Freq Out is
still there too (with an additional 20MHz timebase).
Timebases:
X Series devices have 100MHz, 20MHz and 100kHz timebases. Note the
difference between 80MHz on M series and 100MHz on X series. DAQmx will
take care of the difference for you, unless you were programming in
terms of ticks and hardcoded in numbers based off of a 80MHz clock.
Counter
FIFOs: X Series has a 127 sample FIFO per counter. When combined with
PCIe/PXIe, our benchmarked buffered counter rates went from ~350k on M series
(with a 2 sample FIFO) with a single counter to 10MHz on all four
counters (160MB/s streaming rate). The FIFO also allows us to implement…
Buffered Counter Output: Probably my favorite new feature. You can
now use a multi point write on counters and write out a buffer of pulse
values. There are two timing modes for this: implicit and sample
clocked. With implicit timing, every idle/active pair you write is
generated as a pulse. You can vary the idle/active time for every pulse
in your pulse train. Check out the "Gen Dig Pulse
Train-Buff-Implicit-Cont.vi" shipping example. With sample clock
timing, the idle/active time are updated every time a sample clock is
received. Check out the "Gen Dig Pulse Train-Buff-Ext Clk-Cont.vi"
shipping example. These modes give you much more control over your
waveform – now everything about it can be hardware timed. Also, I’ve
benchmarked the output rates at 10MHz on all four counters at the same
time.
Finite pulse train with one counter: Each X Series
counter has an Embedded counter paired with it. The embedded counter
isn’t directly programmable, but it does allow you to do counter
operations on one counter that used to take two. A finite pulse train
used to take two counters – one to generate the pulse train and one to
gate it. Now a counter generates the pulse train, and its embedded
counter counts the TCs and disables the counter when it reaches the
number of pulses to generate.
More sample clocked
measurement modes: Edge counting and encoder measurements always
supported sample clocks, all other counter measurements were implicitly
(timed by the measurement waveform) timed. With the addition of the
sample clock terminal to the counters now all counter measurements
(except for semi-period) support sample clock timing. You can now get
the pulse width of the pulse just before the sample clock rather than
getting all the pulse widths and figuring out where they happened in
time. Why not semi period? We added a new “pulse” measurement instead
that returns a sample that contains the high and low time (or high and
low ticks, or frequency and duty cycle) so for each sample clock edge
you get a full pulse spec. Semi period still supports the same
measurements it used to, just not sample clocked. Speaking of sample
clocked…
Sample clocked frequency/period measurement
with averaging: X Series still supports the three frequency modes: Low
frequency 1 counter, 2 counter High Frequency and 2 counter Large
Range. In addition it supports sample clocked averaging. This is
essentially a method that is high accuracy method based on the sample
clock rate. With the same measurement time it has the same accuracy as
the Large range mode but it doesn’t take two counters. Note, counters
do not have their own internal sample clock so you have to provide them
with an external signal.
Hope this helps,
Andrew S
National Instruments
Multifunction DAQ Product Support Engineer
Getting Started with NI-DAQmx
Measurement FundamentalsHi guys,
I drew up a schematic of one of the applications I need to get running in our lab. To recap:
1) We have several piezo controllers for nanopositioning of samples under a microscope, some of them driven by a digital circuit that handles coordinate programming and trigger line programming (for syncing detectors to the piezo motion), other controllers are analog and need to be driven by voltages.
2) We would like to emulate the behavior of the digital controller using the analog HW (we have much more analog controllers than digital ones).
3) The basic implementation is like this (see also slide one in the attached pdf file) and runs perfectly:
a. A global pulsetrain ticks with a certain frequency
b. At each tick a voltage is written on an AO line and this tick is also sent to an RTSI line to sync multiple detectors
4) To fully emulate the digital controller we also need to implement 4 trigger lines that exist on the digital controller. These trigger lines allow for fully programmable pulsetrain output that is in sync with the movement of the piezo. Slide two in the attached pdf illustrates what is needed. These trigger lines allow for much more intricate syncing of our detectors (only measure during certain parts of the motion instead of all the time).
After a lot of thinking and experimenting with the existing M series boards back here I came to the conclusion that the desired behavior is not possible with an M series board since they only allow for the output of “simple” pulsetrains with a given frequency.
Looking at this webpage (http://zone.ni.com/devzone/cda/tut/p/id/9384#toc3) however, I think that the X series board would offer exactly what we need since it allows for buffered counter output that enables definition of very complex pulstrain “shapes”.
Looking at the schemes I provided, could someone confirm that the X-series covers our needs? If this is the case, we would be interested in purchasing these kinds of boards.
Cheers,
Kris Janssen
Attachments:
Raman Imaging Timing Implementation.pdf 76 KB -
Counter Error -10609 "transferI​nProgError​"
I am trying to use a Quadrature Encoder VI (found on ni.com and included below) to simulate wheel speed sensors. However, when I integrate this VI into my program on a PXI-6713 card, I receive the -10609 transfer in progress error. The problem occurs when I move from Park (encoder paused) to any movement speed. I have also been able to generate the same error in the Encoder VI just by moving the knob fast. My guess is that it is trying to update the new frequencies too fast, but I don't know how to solve that. I have the settings for it at Rev/sec and set for 1 pulse/rev. In modifying the quadrature VI to my program, the loop wait time has been changed from 90 to 100 ms, but that shouldn't be a factor.
Attachments:
Quadrature_Encoder_Simulator.llb 483 KBHello,
This is strange. I tried to run the VI and could not face any problem. But of course I had an E series card available with me. If you have an E series card could you please try to see if you get the error? I will try to check out a 6713 and try to run there too.
But my guess is, there might have been some other counter operation with the same counter going on when you ran this qudrature encoder VI. Just a thought. Double checking might be helpful.
Sincerely,
Sastry V.
Applications Engineer
National Instruments -
There is substantial information concerning operating a PXI system as an EtherCAT master, and there is documentation about how to operate a CompactRIO 9144 chassis as an EtherCAT slave with a PXI or third party master, however there is no information as to whether or not you can run a PXI system as an EtherCAT slave.
I have a distributed real-time system in which I have one entity which controls the system and acts as an EtherCAT master. I would like to use a PXI system for data acquisition and processing however, it would need to work as a slave. Is this possible? EtherCAT slave devices typically require more than a standard NIC, and that gives me pause as to whether a PXI system can operate in this mode.
I like the idea of the RIO 9144, however I don't think I can achieve all of my acquisition requirements within the capabilities of this expansion chassis.
Any suggestions would be much appreciated.
ChandlerDirkW,
Thank you for your prompt replies to both this question, and the one I posed over on the real-time board: "High Speed CANbus on a 9144 Slave." As I am sure you concluded, the two questions are related.
I have a heterogenous distributed real time architecture with a variety of different real time systems performing various tasks (computation, actuation, data acquisition, etc.). Currently, the system incorporates a combination of deterministic shared memory and UDP for communications. For cost, scalability, and simplicity reasons we are reconfiguring the architecture to commonize on EtherCAT.
Relative to data acquisition requirements, I have a variety of configurations that are used based on overall system configuration. The lightest weight versions have a very light I/O load, on the order of 5 analog inputs, 10 digital inputs, and 1 CANbus broadcasting 10 or so messages. The heaviest configuration has significantly higher channel count: ~10 analog in, ~10 digital in, ~20 analog out, ~10 freq/PWM inputs, ~5 freq/PWM out, and 2 CANbus. Overall system communications rate, again, depends on system configuration and target performance. This could be in the range of 500Hz or considerably higher.
Again considering the 9144 slave chassis, I have a feeling that the lightweight I/O configuration should not be a problem (assuming CANbus will work vis-a-vis my other posting). The more complex configuration may be a bit much for the slave chassis to handle relying on just the FPGA. Knowing now that a PXI can only be operated as a master, it is not impossible to consider reconfiguring the system topology to operate in this manner. However, there are still compelling reasons as to why we would want to maintain our current master.
If it is capable, my preference would be to go with a 9144. However, I would also like to "commonize" to a single data acquisition platform and not split between cRIO for lightweight applications, and PXI for heavier burden ones. I suppose this raises the fundamental question, currently is the 9144 the only device in the NI lineup that can operate as an EtherCAT slave?
Again, everyone's expertise is much appreciated,
Chandler -
Is "starting" a counter the same as "arming" it?
Hi everyone,
I am trying to understand why I get unexpected behavior with my VI and counter output.
I am outputting 3 single,triggered pulses: 2 on a 6602 (1 each on counters 0 and 1), and 1 on GPCTR0 on a 6071E.
The second pulse on the 6602 (on counter 1) is supposed to immediately pulse after the first pulse (on counter 0) is finished pulsing.
GPCTR0 is a pulse used to start my data acquisition, and occurs before the first pulse from the 6602.
All three counters share a common hardware trigger, a repeating 120Hz pulse, synced to some of my other hardware. This train of triggers arrive only after I switch a DIO line (on yet another card, a 6503), and this DIO line is turned on the a sequence frame after the frame in which I set up and "start" my counters (with control.vi set to "start").
Now here's the problem I encounter:
*most* of the time (~4/5 times) I get the output I want from the 6602, 1 pulse right after the other. But every once in a while, I get the pulses ~8 ms apart--that is, counters 0 and 1 are triggering off different trigger pulses in the 120Hz I send to the gates. So one of my counters is somehow missing seeing the start trigger that another counter sees.
How can this be? If all counters are already started, shouldn't the same start-trigger trigger all of the counting operations at once?!
Also problematic, every once in a while, counter 0 is missing the first hardware trigger, but triggers on the second trigger of the 120 Hz trigger pulses. So it seems my problem is that the counters are sometimes just missing seeing the triggers.
Any ideas? I posted my VI. The relevant portions are in big frame3, inner frames 3 and 5. (frame 3 configures and starts all counters. frame 5 turns on my hardware triggers).
thanks in advance for any help!
Attachments:
Neurochip-legacy.vi 698 KBto answer my own question....
i discovered something miswired in my hardware.
so there seems to be no labview problem... -
How to Use the Average, Count, or Sum to Validate a Collection
hi guys ,
can any one help me with the following problem .
I want to use count function in business rules for the validation of entity objects .
I am new to ADF BC .
and i am not understanding what are the appropriate accessor and attribute for the validation for "COUNT" operation.
regards
Sourav.you have to use collection validator.. for that..
click the entity.. go to business rules tab... select entity validator.. then you will find collection validator.. -
Generate a delayed counter pulse
I am posting this to see if anyone can shed any light on various DAQmx operations with counters. I appear to have found a solution for the project but various counter operations are certainly not well documented and the notes I am posting may help anyone trying to do something similar.
The project is to monitor an analog input channel and when a certain criterion is met generate a pulse with a specified width at a specified delay from the event. It is being done in a LV Real Time system. Initially I tried to start a counter task within a loop, wait until done and stop the task. What I have found is that it takes a long time (of the order of 10-100's of ms) for the start task to return and the wait until done doesn't reliably return at the time the counter pulse is finished being generated. Other people seem to have found the same problem. This is described in the part 1 attachment and the attached vi.
The other way to do it is with a retriggerable counter task and using a digital line on the same card to trigger the counter. Then the way the counter works if there is a single pulse or multiple pulses is different. The way low time and high time are interpreted is odd. This is described in the part 2 attachment with screenshots from Scope captures. I have a proposed solution but I'm not sure if it is the best way to do it.
Any suggestions appreciated.
Attachments:
Generate delayed Counter Pulse problem part 2.doc 108 KB
Generate delayed Counter Pulse Problem part 1.doc 25 KB
Generate Counter Pulse.vi 153 KBAndrew,
If you want to start a counter output task based on an analog input you should use an analog trigger (if your device supports analog triggering). Take a look at the example Cont Acq Sample-Timed Loop-Analog Start.vi (in the example finder - search for "trigger") for how to set up an analog trigger in DAQmx. Also, you can use the Start.Delay property in the DAQmx Trigger property node to specify an amount of time to wait after the Start Trigger is received before generating the first sample
Michael P
National Instruments -
I've got my app prototyped quickly with the default settings in Flex Builder 4. Now I'm going back and adding/modifying features to polish the app off.
For this application I'm using PHP5 as the server side.
The data paging is really cool and simple to call using the default settings. However, I'm running into issues with customizing the data paging feature.
This is the default header of the php function that was created for me:
public function getTblbrowserrecord_paged($startIndex, $numItems){...}
Instead of dumping all data back to the function I want to be able to search on certain fields so I created a new function called:
getTblbrowserrecord_search_paged ($szName, $szIP, $szRule, $szURL, $szDateLow, $szDateHigh, $szCode, $startIndex, $numItems ) {...}
The new function is tested and operates as designed.
I set the input types of the variables and return type (Tblbrowserrecord[]) of the new function then went to enable data paging. The first screen came up and asked me for the key to use which I selected. The next screen came up and asked me for the number of records which I set to 100 then went to select the count operation.
I initially selected the automatically created count() function but it came up with the error " Count operation parameters should match the paged operation parameters list."
So I created another function to match the search function's parameter's list:
public function count_searched($szName, $szIP, $szRule, $szURL, $szDateLow, $szDateHigh, $szCode, $startIndex, $numItems) {...}
But I still ge the error "Count operation parameters should match the paged operation parameters list."
But they DO match. I looked at the default functions that were created by FB4 and noticed that the automatically generated function count() has no parameters and the paged function has the two functions $startIndex and $numItems which are not identical yet they work. I tried removing those two fields from the count function but got the same results.
What am I doing wrong?
Thanks!Nevermind... For some reason my FB4 is not updating correctly. After removing the two control fields at the end of the list AND exiting the app/re-entering everything worked ok. I've been having this issue a lot lately and am thinking that is is a bug of some sort?
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